12b27bdccSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2a0b30ca5STony Lindgren /* 3a0b30ca5STony Lindgren * Shared macros and function prototypes for the HDQ1W/1-wire IP block 4a0b30ca5STony Lindgren * 5a0b30ca5STony Lindgren * Copyright (C) 2012 Texas Instruments, Inc. 6a0b30ca5STony Lindgren * Paul Walmsley 7a0b30ca5STony Lindgren */ 8a0b30ca5STony Lindgren #ifndef ARCH_ARM_MACH_OMAP2_HDQ1W_H 9a0b30ca5STony Lindgren #define ARCH_ARM_MACH_OMAP2_HDQ1W_H 10a0b30ca5STony Lindgren 112a296c8fSTony Lindgren #include "omap_hwmod.h" 12a0b30ca5STony Lindgren 13a0b30ca5STony Lindgren /* 14a0b30ca5STony Lindgren * XXX A future cleanup patch should modify 15a0b30ca5STony Lindgren * drivers/w1/masters/omap_hdq.c to use these macros 16a0b30ca5STony Lindgren */ 17a0b30ca5STony Lindgren #define HDQ_CTRL_STATUS_OFFSET 0x0c 18a0b30ca5STony Lindgren #define HDQ_CTRL_STATUS_CLOCKENABLE_SHIFT 5 19a0b30ca5STony Lindgren 20a0b30ca5STony Lindgren 21a0b30ca5STony Lindgren extern int omap_hdq1w_reset(struct omap_hwmod *oh); 22a0b30ca5STony Lindgren 23a0b30ca5STony Lindgren #endif 24