1 /* 2 * linux/arch/arm/mach-omap2/devices.c 3 * 4 * OMAP2 platform device setup/initialization 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 */ 11 12 #include <linux/kernel.h> 13 #include <linux/init.h> 14 #include <linux/platform_device.h> 15 #include <linux/io.h> 16 #include <linux/clk.h> 17 #include <linux/err.h> 18 #include <linux/slab.h> 19 20 #include <mach/hardware.h> 21 #include <mach/irqs.h> 22 #include <asm/mach-types.h> 23 #include <asm/mach/map.h> 24 #include <asm/pmu.h> 25 26 #include <plat/tc.h> 27 #include <plat/board.h> 28 #include <plat/mcbsp.h> 29 #include <mach/gpio.h> 30 #include <plat/mmc.h> 31 #include <plat/dma.h> 32 #include <plat/omap_hwmod.h> 33 #include <plat/omap_device.h> 34 #include <plat/omap4-keypad.h> 35 36 #include "mux.h" 37 #include "control.h" 38 39 #define L3_MODULES_MAX_LEN 12 40 #define L3_MODULES 3 41 42 static int __init omap3_l3_init(void) 43 { 44 int l; 45 struct omap_hwmod *oh; 46 struct omap_device *od; 47 char oh_name[L3_MODULES_MAX_LEN]; 48 49 /* 50 * To avoid code running on other OMAPs in 51 * multi-omap builds 52 */ 53 if (!(cpu_is_omap34xx())) 54 return -ENODEV; 55 56 l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main"); 57 58 oh = omap_hwmod_lookup(oh_name); 59 60 if (!oh) 61 pr_err("could not look up %s\n", oh_name); 62 63 od = omap_device_build("omap_l3_smx", 0, oh, NULL, 0, 64 NULL, 0, 0); 65 66 WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name); 67 68 return PTR_ERR(od); 69 } 70 postcore_initcall(omap3_l3_init); 71 72 static int __init omap4_l3_init(void) 73 { 74 int l, i; 75 struct omap_hwmod *oh[3]; 76 struct omap_device *od; 77 char oh_name[L3_MODULES_MAX_LEN]; 78 79 /* 80 * To avoid code running on other OMAPs in 81 * multi-omap builds 82 */ 83 if (!(cpu_is_omap44xx())) 84 return -ENODEV; 85 86 for (i = 0; i < L3_MODULES; i++) { 87 l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1); 88 89 oh[i] = omap_hwmod_lookup(oh_name); 90 if (!(oh[i])) 91 pr_err("could not look up %s\n", oh_name); 92 } 93 94 od = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL, 95 0, NULL, 0, 0); 96 97 WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name); 98 99 return PTR_ERR(od); 100 } 101 postcore_initcall(omap4_l3_init); 102 103 #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE) 104 105 static struct resource cam_resources[] = { 106 { 107 .start = OMAP24XX_CAMERA_BASE, 108 .end = OMAP24XX_CAMERA_BASE + 0xfff, 109 .flags = IORESOURCE_MEM, 110 }, 111 { 112 .start = INT_24XX_CAM_IRQ, 113 .flags = IORESOURCE_IRQ, 114 } 115 }; 116 117 static struct platform_device omap_cam_device = { 118 .name = "omap24xxcam", 119 .id = -1, 120 .num_resources = ARRAY_SIZE(cam_resources), 121 .resource = cam_resources, 122 }; 123 124 static inline void omap_init_camera(void) 125 { 126 platform_device_register(&omap_cam_device); 127 } 128 129 #elif defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE) 130 131 static struct resource omap3isp_resources[] = { 132 { 133 .start = OMAP3430_ISP_BASE, 134 .end = OMAP3430_ISP_END, 135 .flags = IORESOURCE_MEM, 136 }, 137 { 138 .start = OMAP3430_ISP_CBUFF_BASE, 139 .end = OMAP3430_ISP_CBUFF_END, 140 .flags = IORESOURCE_MEM, 141 }, 142 { 143 .start = OMAP3430_ISP_CCP2_BASE, 144 .end = OMAP3430_ISP_CCP2_END, 145 .flags = IORESOURCE_MEM, 146 }, 147 { 148 .start = OMAP3430_ISP_CCDC_BASE, 149 .end = OMAP3430_ISP_CCDC_END, 150 .flags = IORESOURCE_MEM, 151 }, 152 { 153 .start = OMAP3430_ISP_HIST_BASE, 154 .end = OMAP3430_ISP_HIST_END, 155 .flags = IORESOURCE_MEM, 156 }, 157 { 158 .start = OMAP3430_ISP_H3A_BASE, 159 .end = OMAP3430_ISP_H3A_END, 160 .flags = IORESOURCE_MEM, 161 }, 162 { 163 .start = OMAP3430_ISP_PREV_BASE, 164 .end = OMAP3430_ISP_PREV_END, 165 .flags = IORESOURCE_MEM, 166 }, 167 { 168 .start = OMAP3430_ISP_RESZ_BASE, 169 .end = OMAP3430_ISP_RESZ_END, 170 .flags = IORESOURCE_MEM, 171 }, 172 { 173 .start = OMAP3430_ISP_SBL_BASE, 174 .end = OMAP3430_ISP_SBL_END, 175 .flags = IORESOURCE_MEM, 176 }, 177 { 178 .start = OMAP3430_ISP_CSI2A_BASE, 179 .end = OMAP3430_ISP_CSI2A_END, 180 .flags = IORESOURCE_MEM, 181 }, 182 { 183 .start = OMAP3430_ISP_CSI2PHY_BASE, 184 .end = OMAP3430_ISP_CSI2PHY_END, 185 .flags = IORESOURCE_MEM, 186 }, 187 { 188 .start = INT_34XX_CAM_IRQ, 189 .flags = IORESOURCE_IRQ, 190 } 191 }; 192 193 static struct platform_device omap3isp_device = { 194 .name = "omap3isp", 195 .id = -1, 196 .num_resources = ARRAY_SIZE(omap3isp_resources), 197 .resource = omap3isp_resources, 198 }; 199 200 static inline void omap_init_camera(void) 201 { 202 platform_device_register(&omap3isp_device); 203 } 204 #else 205 static inline void omap_init_camera(void) 206 { 207 } 208 #endif 209 210 struct omap_device_pm_latency omap_keyboard_latency[] = { 211 { 212 .deactivate_func = omap_device_idle_hwmods, 213 .activate_func = omap_device_enable_hwmods, 214 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, 215 }, 216 }; 217 218 int __init omap4_keyboard_init(struct omap4_keypad_platform_data 219 *sdp4430_keypad_data) 220 { 221 struct omap_device *od; 222 struct omap_hwmod *oh; 223 struct omap4_keypad_platform_data *keypad_data; 224 unsigned int id = -1; 225 char *oh_name = "kbd"; 226 char *name = "omap4-keypad"; 227 228 oh = omap_hwmod_lookup(oh_name); 229 if (!oh) { 230 pr_err("Could not look up %s\n", oh_name); 231 return -ENODEV; 232 } 233 234 keypad_data = sdp4430_keypad_data; 235 236 od = omap_device_build(name, id, oh, keypad_data, 237 sizeof(struct omap4_keypad_platform_data), 238 omap_keyboard_latency, 239 ARRAY_SIZE(omap_keyboard_latency), 0); 240 241 if (IS_ERR(od)) { 242 WARN(1, "Cant build omap_device for %s:%s.\n", 243 name, oh->name); 244 return PTR_ERR(od); 245 } 246 247 return 0; 248 } 249 250 #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE) 251 static struct omap_device_pm_latency mbox_latencies[] = { 252 [0] = { 253 .activate_func = omap_device_enable_hwmods, 254 .deactivate_func = omap_device_idle_hwmods, 255 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, 256 }, 257 }; 258 259 static inline void omap_init_mbox(void) 260 { 261 struct omap_hwmod *oh; 262 struct omap_device *od; 263 264 oh = omap_hwmod_lookup("mailbox"); 265 if (!oh) { 266 pr_err("%s: unable to find hwmod\n", __func__); 267 return; 268 } 269 270 od = omap_device_build("omap-mailbox", -1, oh, NULL, 0, 271 mbox_latencies, ARRAY_SIZE(mbox_latencies), 0); 272 WARN(IS_ERR(od), "%s: could not build device, err %ld\n", 273 __func__, PTR_ERR(od)); 274 } 275 #else 276 static inline void omap_init_mbox(void) { } 277 #endif /* CONFIG_OMAP_MBOX_FWK */ 278 279 static inline void omap_init_sti(void) {} 280 281 #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE) 282 283 static struct platform_device omap_pcm = { 284 .name = "omap-pcm-audio", 285 .id = -1, 286 }; 287 288 /* 289 * OMAP2420 has 2 McBSP ports 290 * OMAP2430 has 5 McBSP ports 291 * OMAP3 has 5 McBSP ports 292 * OMAP4 has 4 McBSP ports 293 */ 294 OMAP_MCBSP_PLATFORM_DEVICE(1); 295 OMAP_MCBSP_PLATFORM_DEVICE(2); 296 OMAP_MCBSP_PLATFORM_DEVICE(3); 297 OMAP_MCBSP_PLATFORM_DEVICE(4); 298 OMAP_MCBSP_PLATFORM_DEVICE(5); 299 300 static void omap_init_audio(void) 301 { 302 platform_device_register(&omap_mcbsp1); 303 platform_device_register(&omap_mcbsp2); 304 if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) { 305 platform_device_register(&omap_mcbsp3); 306 platform_device_register(&omap_mcbsp4); 307 } 308 if (cpu_is_omap243x() || cpu_is_omap34xx()) 309 platform_device_register(&omap_mcbsp5); 310 311 platform_device_register(&omap_pcm); 312 } 313 314 #else 315 static inline void omap_init_audio(void) {} 316 #endif 317 318 #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE) 319 320 #include <plat/mcspi.h> 321 322 struct omap_device_pm_latency omap_mcspi_latency[] = { 323 [0] = { 324 .deactivate_func = omap_device_idle_hwmods, 325 .activate_func = omap_device_enable_hwmods, 326 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, 327 }, 328 }; 329 330 static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) 331 { 332 struct omap_device *od; 333 char *name = "omap2_mcspi"; 334 struct omap2_mcspi_platform_config *pdata; 335 static int spi_num; 336 struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr; 337 338 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); 339 if (!pdata) { 340 pr_err("Memory allocation for McSPI device failed\n"); 341 return -ENOMEM; 342 } 343 344 pdata->num_cs = mcspi_attrib->num_chipselect; 345 switch (oh->class->rev) { 346 case OMAP2_MCSPI_REV: 347 case OMAP3_MCSPI_REV: 348 pdata->regs_offset = 0; 349 break; 350 case OMAP4_MCSPI_REV: 351 pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET; 352 break; 353 default: 354 pr_err("Invalid McSPI Revision value\n"); 355 return -EINVAL; 356 } 357 358 spi_num++; 359 od = omap_device_build(name, spi_num, oh, pdata, 360 sizeof(*pdata), omap_mcspi_latency, 361 ARRAY_SIZE(omap_mcspi_latency), 0); 362 WARN(IS_ERR(od), "Cant build omap_device for %s:%s\n", 363 name, oh->name); 364 kfree(pdata); 365 return 0; 366 } 367 368 static void omap_init_mcspi(void) 369 { 370 omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL); 371 } 372 373 #else 374 static inline void omap_init_mcspi(void) {} 375 #endif 376 377 static struct resource omap2_pmu_resource = { 378 .start = 3, 379 .end = 3, 380 .flags = IORESOURCE_IRQ, 381 }; 382 383 static struct resource omap3_pmu_resource = { 384 .start = INT_34XX_BENCH_MPU_EMUL, 385 .end = INT_34XX_BENCH_MPU_EMUL, 386 .flags = IORESOURCE_IRQ, 387 }; 388 389 static struct platform_device omap_pmu_device = { 390 .name = "arm-pmu", 391 .id = ARM_PMU_DEVICE_CPU, 392 .num_resources = 1, 393 }; 394 395 static void omap_init_pmu(void) 396 { 397 if (cpu_is_omap24xx()) 398 omap_pmu_device.resource = &omap2_pmu_resource; 399 else if (cpu_is_omap34xx()) 400 omap_pmu_device.resource = &omap3_pmu_resource; 401 else 402 return; 403 404 platform_device_register(&omap_pmu_device); 405 } 406 407 408 #if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE) 409 410 #ifdef CONFIG_ARCH_OMAP2 411 static struct resource omap2_sham_resources[] = { 412 { 413 .start = OMAP24XX_SEC_SHA1MD5_BASE, 414 .end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64, 415 .flags = IORESOURCE_MEM, 416 }, 417 { 418 .start = INT_24XX_SHA1MD5, 419 .flags = IORESOURCE_IRQ, 420 } 421 }; 422 static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources); 423 #else 424 #define omap2_sham_resources NULL 425 #define omap2_sham_resources_sz 0 426 #endif 427 428 #ifdef CONFIG_ARCH_OMAP3 429 static struct resource omap3_sham_resources[] = { 430 { 431 .start = OMAP34XX_SEC_SHA1MD5_BASE, 432 .end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64, 433 .flags = IORESOURCE_MEM, 434 }, 435 { 436 .start = INT_34XX_SHA1MD52_IRQ, 437 .flags = IORESOURCE_IRQ, 438 }, 439 { 440 .start = OMAP34XX_DMA_SHA1MD5_RX, 441 .flags = IORESOURCE_DMA, 442 } 443 }; 444 static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources); 445 #else 446 #define omap3_sham_resources NULL 447 #define omap3_sham_resources_sz 0 448 #endif 449 450 static struct platform_device sham_device = { 451 .name = "omap-sham", 452 .id = -1, 453 }; 454 455 static void omap_init_sham(void) 456 { 457 if (cpu_is_omap24xx()) { 458 sham_device.resource = omap2_sham_resources; 459 sham_device.num_resources = omap2_sham_resources_sz; 460 } else if (cpu_is_omap34xx()) { 461 sham_device.resource = omap3_sham_resources; 462 sham_device.num_resources = omap3_sham_resources_sz; 463 } else { 464 pr_err("%s: platform not supported\n", __func__); 465 return; 466 } 467 platform_device_register(&sham_device); 468 } 469 #else 470 static inline void omap_init_sham(void) { } 471 #endif 472 473 #if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE) 474 475 #ifdef CONFIG_ARCH_OMAP2 476 static struct resource omap2_aes_resources[] = { 477 { 478 .start = OMAP24XX_SEC_AES_BASE, 479 .end = OMAP24XX_SEC_AES_BASE + 0x4C, 480 .flags = IORESOURCE_MEM, 481 }, 482 { 483 .start = OMAP24XX_DMA_AES_TX, 484 .flags = IORESOURCE_DMA, 485 }, 486 { 487 .start = OMAP24XX_DMA_AES_RX, 488 .flags = IORESOURCE_DMA, 489 } 490 }; 491 static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources); 492 #else 493 #define omap2_aes_resources NULL 494 #define omap2_aes_resources_sz 0 495 #endif 496 497 #ifdef CONFIG_ARCH_OMAP3 498 static struct resource omap3_aes_resources[] = { 499 { 500 .start = OMAP34XX_SEC_AES_BASE, 501 .end = OMAP34XX_SEC_AES_BASE + 0x4C, 502 .flags = IORESOURCE_MEM, 503 }, 504 { 505 .start = OMAP34XX_DMA_AES2_TX, 506 .flags = IORESOURCE_DMA, 507 }, 508 { 509 .start = OMAP34XX_DMA_AES2_RX, 510 .flags = IORESOURCE_DMA, 511 } 512 }; 513 static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources); 514 #else 515 #define omap3_aes_resources NULL 516 #define omap3_aes_resources_sz 0 517 #endif 518 519 static struct platform_device aes_device = { 520 .name = "omap-aes", 521 .id = -1, 522 }; 523 524 static void omap_init_aes(void) 525 { 526 if (cpu_is_omap24xx()) { 527 aes_device.resource = omap2_aes_resources; 528 aes_device.num_resources = omap2_aes_resources_sz; 529 } else if (cpu_is_omap34xx()) { 530 aes_device.resource = omap3_aes_resources; 531 aes_device.num_resources = omap3_aes_resources_sz; 532 } else { 533 pr_err("%s: platform not supported\n", __func__); 534 return; 535 } 536 platform_device_register(&aes_device); 537 } 538 539 #else 540 static inline void omap_init_aes(void) { } 541 #endif 542 543 /*-------------------------------------------------------------------------*/ 544 545 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) 546 547 static inline void omap242x_mmc_mux(struct omap_mmc_platform_data 548 *mmc_controller) 549 { 550 if ((mmc_controller->slots[0].switch_pin > 0) && \ 551 (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES)) 552 omap_mux_init_gpio(mmc_controller->slots[0].switch_pin, 553 OMAP_PIN_INPUT_PULLUP); 554 if ((mmc_controller->slots[0].gpio_wp > 0) && \ 555 (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES)) 556 omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp, 557 OMAP_PIN_INPUT_PULLUP); 558 559 omap_mux_init_signal("sdmmc_cmd", 0); 560 omap_mux_init_signal("sdmmc_clki", 0); 561 omap_mux_init_signal("sdmmc_clko", 0); 562 omap_mux_init_signal("sdmmc_dat0", 0); 563 omap_mux_init_signal("sdmmc_dat_dir0", 0); 564 omap_mux_init_signal("sdmmc_cmd_dir", 0); 565 if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) { 566 omap_mux_init_signal("sdmmc_dat1", 0); 567 omap_mux_init_signal("sdmmc_dat2", 0); 568 omap_mux_init_signal("sdmmc_dat3", 0); 569 omap_mux_init_signal("sdmmc_dat_dir1", 0); 570 omap_mux_init_signal("sdmmc_dat_dir2", 0); 571 omap_mux_init_signal("sdmmc_dat_dir3", 0); 572 } 573 574 /* 575 * Use internal loop-back in MMC/SDIO Module Input Clock 576 * selection 577 */ 578 if (mmc_controller->slots[0].internal_clock) { 579 u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); 580 v |= (1 << 24); 581 omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0); 582 } 583 } 584 585 void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data) 586 { 587 char *name = "mmci-omap"; 588 589 if (!mmc_data[0]) { 590 pr_err("%s fails: Incomplete platform data\n", __func__); 591 return; 592 } 593 594 omap242x_mmc_mux(mmc_data[0]); 595 omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE, 596 INT_24XX_MMC_IRQ, mmc_data[0]); 597 } 598 599 #endif 600 601 /*-------------------------------------------------------------------------*/ 602 603 #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE) 604 #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430) 605 #define OMAP_HDQ_BASE 0x480B2000 606 #endif 607 static struct resource omap_hdq_resources[] = { 608 { 609 .start = OMAP_HDQ_BASE, 610 .end = OMAP_HDQ_BASE + 0x1C, 611 .flags = IORESOURCE_MEM, 612 }, 613 { 614 .start = INT_24XX_HDQ_IRQ, 615 .flags = IORESOURCE_IRQ, 616 }, 617 }; 618 static struct platform_device omap_hdq_dev = { 619 .name = "omap_hdq", 620 .id = 0, 621 .dev = { 622 .platform_data = NULL, 623 }, 624 .num_resources = ARRAY_SIZE(omap_hdq_resources), 625 .resource = omap_hdq_resources, 626 }; 627 static inline void omap_hdq_init(void) 628 { 629 (void) platform_device_register(&omap_hdq_dev); 630 } 631 #else 632 static inline void omap_hdq_init(void) {} 633 #endif 634 635 /*---------------------------------------------------------------------------*/ 636 637 #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \ 638 defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE) 639 #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE) 640 static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = { 641 }; 642 #else 643 static struct resource omap_vout_resource[2] = { 644 }; 645 #endif 646 647 static struct platform_device omap_vout_device = { 648 .name = "omap_vout", 649 .num_resources = ARRAY_SIZE(omap_vout_resource), 650 .resource = &omap_vout_resource[0], 651 .id = -1, 652 }; 653 static void omap_init_vout(void) 654 { 655 if (platform_device_register(&omap_vout_device) < 0) 656 printk(KERN_ERR "Unable to register OMAP-VOUT device\n"); 657 } 658 #else 659 static inline void omap_init_vout(void) {} 660 #endif 661 662 /*-------------------------------------------------------------------------*/ 663 664 static int __init omap2_init_devices(void) 665 { 666 /* 667 * please keep these calls, and their implementations above, 668 * in alphabetical order so they're easier to sort through. 669 */ 670 omap_init_audio(); 671 omap_init_camera(); 672 omap_init_mbox(); 673 omap_init_mcspi(); 674 omap_init_pmu(); 675 omap_hdq_init(); 676 omap_init_sti(); 677 omap_init_sham(); 678 omap_init_aes(); 679 omap_init_vout(); 680 681 return 0; 682 } 683 arch_initcall(omap2_init_devices); 684 685 #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) 686 static struct omap_device_pm_latency omap_wdt_latency[] = { 687 [0] = { 688 .deactivate_func = omap_device_idle_hwmods, 689 .activate_func = omap_device_enable_hwmods, 690 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, 691 }, 692 }; 693 694 static int __init omap_init_wdt(void) 695 { 696 int id = -1; 697 struct omap_device *od; 698 struct omap_hwmod *oh; 699 char *oh_name = "wd_timer2"; 700 char *dev_name = "omap_wdt"; 701 702 if (!cpu_class_is_omap2()) 703 return 0; 704 705 oh = omap_hwmod_lookup(oh_name); 706 if (!oh) { 707 pr_err("Could not look up wd_timer%d hwmod\n", id); 708 return -EINVAL; 709 } 710 711 od = omap_device_build(dev_name, id, oh, NULL, 0, 712 omap_wdt_latency, 713 ARRAY_SIZE(omap_wdt_latency), 0); 714 WARN(IS_ERR(od), "Cant build omap_device for %s:%s.\n", 715 dev_name, oh->name); 716 return 0; 717 } 718 subsys_initcall(omap_init_wdt); 719 #endif 720