1 /*
2  * OMAP4+ CPU idle Routines
3  *
4  * Copyright (C) 2011-2013 Texas Instruments, Inc.
5  * Santosh Shilimkar <santosh.shilimkar@ti.com>
6  * Rajendra Nayak <rnayak@ti.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 
13 #include <linux/sched.h>
14 #include <linux/cpuidle.h>
15 #include <linux/cpu_pm.h>
16 #include <linux/export.h>
17 
18 #include <asm/cpuidle.h>
19 #include <asm/proc-fns.h>
20 
21 #include "common.h"
22 #include "pm.h"
23 #include "prm.h"
24 #include "clockdomain.h"
25 
26 #define MAX_CPUS	2
27 
28 /* Machine specific information */
29 struct idle_statedata {
30 	u32 cpu_state;
31 	u32 mpu_logic_state;
32 	u32 mpu_state;
33 };
34 
35 static struct idle_statedata omap4_idle_data[] = {
36 	{
37 		.cpu_state = PWRDM_POWER_ON,
38 		.mpu_state = PWRDM_POWER_ON,
39 		.mpu_logic_state = PWRDM_POWER_RET,
40 	},
41 	{
42 		.cpu_state = PWRDM_POWER_OFF,
43 		.mpu_state = PWRDM_POWER_RET,
44 		.mpu_logic_state = PWRDM_POWER_RET,
45 	},
46 	{
47 		.cpu_state = PWRDM_POWER_OFF,
48 		.mpu_state = PWRDM_POWER_RET,
49 		.mpu_logic_state = PWRDM_POWER_OFF,
50 	},
51 };
52 
53 static struct powerdomain *mpu_pd, *cpu_pd[MAX_CPUS];
54 static struct clockdomain *cpu_clkdm[MAX_CPUS];
55 
56 static atomic_t abort_barrier;
57 static bool cpu_done[MAX_CPUS];
58 static struct idle_statedata *state_ptr = &omap4_idle_data[0];
59 
60 /* Private functions */
61 
62 /**
63  * omap_enter_idle_[simple/coupled] - OMAP4PLUS cpuidle entry functions
64  * @dev: cpuidle device
65  * @drv: cpuidle driver
66  * @index: the index of state to be entered
67  *
68  * Called from the CPUidle framework to program the device to the
69  * specified low power state selected by the governor.
70  * Returns the amount of time spent in the low power state.
71  */
72 static int omap_enter_idle_simple(struct cpuidle_device *dev,
73 			struct cpuidle_driver *drv,
74 			int index)
75 {
76 	omap_do_wfi();
77 	return index;
78 }
79 
80 static int omap_enter_idle_coupled(struct cpuidle_device *dev,
81 			struct cpuidle_driver *drv,
82 			int index)
83 {
84 	struct idle_statedata *cx = state_ptr + index;
85 	u32 mpuss_can_lose_context = 0;
86 
87 	/*
88 	 * CPU0 has to wait and stay ON until CPU1 is OFF state.
89 	 * This is necessary to honour hardware recommondation
90 	 * of triggeing all the possible low power modes once CPU1 is
91 	 * out of coherency and in OFF mode.
92 	 */
93 	if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
94 		while (pwrdm_read_pwrst(cpu_pd[1]) != PWRDM_POWER_OFF) {
95 			cpu_relax();
96 
97 			/*
98 			 * CPU1 could have already entered & exited idle
99 			 * without hitting off because of a wakeup
100 			 * or a failed attempt to hit off mode.  Check for
101 			 * that here, otherwise we could spin forever
102 			 * waiting for CPU1 off.
103 			 */
104 			if (cpu_done[1])
105 			    goto fail;
106 
107 		}
108 	}
109 
110 	mpuss_can_lose_context = (cx->mpu_state == PWRDM_POWER_RET) &&
111 				 (cx->mpu_logic_state == PWRDM_POWER_OFF);
112 
113 	/*
114 	 * Call idle CPU PM enter notifier chain so that
115 	 * VFP and per CPU interrupt context is saved.
116 	 */
117 	cpu_pm_enter();
118 
119 	if (dev->cpu == 0) {
120 		pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
121 		omap_set_pwrdm_state(mpu_pd, cx->mpu_state);
122 
123 		/*
124 		 * Call idle CPU cluster PM enter notifier chain
125 		 * to save GIC and wakeupgen context.
126 		 */
127 		if (mpuss_can_lose_context)
128 			cpu_cluster_pm_enter();
129 	}
130 
131 	omap4_enter_lowpower(dev->cpu, cx->cpu_state);
132 	cpu_done[dev->cpu] = true;
133 
134 	/* Wakeup CPU1 only if it is not offlined */
135 	if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
136 
137 		if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) &&
138 		    mpuss_can_lose_context)
139 			gic_dist_disable();
140 
141 		clkdm_wakeup(cpu_clkdm[1]);
142 		omap_set_pwrdm_state(cpu_pd[1], PWRDM_POWER_ON);
143 		clkdm_allow_idle(cpu_clkdm[1]);
144 
145 		if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) &&
146 		    mpuss_can_lose_context) {
147 			while (gic_dist_disabled()) {
148 				udelay(1);
149 				cpu_relax();
150 			}
151 			gic_timer_retrigger();
152 		}
153 	}
154 
155 	/*
156 	 * Call idle CPU PM exit notifier chain to restore
157 	 * VFP and per CPU IRQ context.
158 	 */
159 	cpu_pm_exit();
160 
161 	/*
162 	 * Call idle CPU cluster PM exit notifier chain
163 	 * to restore GIC and wakeupgen context.
164 	 */
165 	if (dev->cpu == 0 && mpuss_can_lose_context)
166 		cpu_cluster_pm_exit();
167 
168 fail:
169 	cpuidle_coupled_parallel_barrier(dev, &abort_barrier);
170 	cpu_done[dev->cpu] = false;
171 
172 	return index;
173 }
174 
175 static struct cpuidle_driver omap4_idle_driver = {
176 	.name				= "omap4_idle",
177 	.owner				= THIS_MODULE,
178 	.states = {
179 		{
180 			/* C1 - CPU0 ON + CPU1 ON + MPU ON */
181 			.exit_latency = 2 + 2,
182 			.target_residency = 5,
183 			.flags = CPUIDLE_FLAG_TIME_VALID,
184 			.enter = omap_enter_idle_simple,
185 			.name = "C1",
186 			.desc = "CPUx ON, MPUSS ON"
187 		},
188 		{
189 			/* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */
190 			.exit_latency = 328 + 440,
191 			.target_residency = 960,
192 			.flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED |
193 			         CPUIDLE_FLAG_TIMER_STOP,
194 			.enter = omap_enter_idle_coupled,
195 			.name = "C2",
196 			.desc = "CPUx OFF, MPUSS CSWR",
197 		},
198 		{
199 			/* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
200 			.exit_latency = 460 + 518,
201 			.target_residency = 1100,
202 			.flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED |
203 			         CPUIDLE_FLAG_TIMER_STOP,
204 			.enter = omap_enter_idle_coupled,
205 			.name = "C3",
206 			.desc = "CPUx OFF, MPUSS OSWR",
207 		},
208 	},
209 	.state_count = ARRAY_SIZE(omap4_idle_data),
210 	.safe_state_index = 0,
211 };
212 
213 /* Public functions */
214 
215 /**
216  * omap4_idle_init - Init routine for OMAP4+ idle
217  *
218  * Registers the OMAP4+ specific cpuidle driver to the cpuidle
219  * framework with the valid set of states.
220  */
221 int __init omap4_idle_init(void)
222 {
223 	mpu_pd = pwrdm_lookup("mpu_pwrdm");
224 	cpu_pd[0] = pwrdm_lookup("cpu0_pwrdm");
225 	cpu_pd[1] = pwrdm_lookup("cpu1_pwrdm");
226 	if ((!mpu_pd) || (!cpu_pd[0]) || (!cpu_pd[1]))
227 		return -ENODEV;
228 
229 	cpu_clkdm[0] = clkdm_lookup("mpu0_clkdm");
230 	cpu_clkdm[1] = clkdm_lookup("mpu1_clkdm");
231 	if (!cpu_clkdm[0] || !cpu_clkdm[1])
232 		return -ENODEV;
233 
234 	return cpuidle_register(&omap4_idle_driver, cpu_online_mask);
235 }
236