1 /*
2  * OMAP4+ CPU idle Routines
3  *
4  * Copyright (C) 2011-2013 Texas Instruments, Inc.
5  * Santosh Shilimkar <santosh.shilimkar@ti.com>
6  * Rajendra Nayak <rnayak@ti.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 
13 #include <linux/sched.h>
14 #include <linux/cpuidle.h>
15 #include <linux/cpu_pm.h>
16 #include <linux/export.h>
17 
18 #include <asm/cpuidle.h>
19 #include <asm/proc-fns.h>
20 
21 #include "common.h"
22 #include "pm.h"
23 #include "prm.h"
24 #include "clockdomain.h"
25 
26 /* Machine specific information */
27 struct idle_statedata {
28 	u32 cpu_state;
29 	u32 mpu_logic_state;
30 	u32 mpu_state;
31 };
32 
33 static struct idle_statedata omap4_idle_data[] = {
34 	{
35 		.cpu_state = PWRDM_POWER_ON,
36 		.mpu_state = PWRDM_POWER_ON,
37 		.mpu_logic_state = PWRDM_POWER_RET,
38 	},
39 	{
40 		.cpu_state = PWRDM_POWER_OFF,
41 		.mpu_state = PWRDM_POWER_RET,
42 		.mpu_logic_state = PWRDM_POWER_RET,
43 	},
44 	{
45 		.cpu_state = PWRDM_POWER_OFF,
46 		.mpu_state = PWRDM_POWER_RET,
47 		.mpu_logic_state = PWRDM_POWER_OFF,
48 	},
49 };
50 
51 static struct powerdomain *mpu_pd, *cpu_pd[NR_CPUS];
52 static struct clockdomain *cpu_clkdm[NR_CPUS];
53 
54 static atomic_t abort_barrier;
55 static bool cpu_done[NR_CPUS];
56 static struct idle_statedata *state_ptr = &omap4_idle_data[0];
57 
58 /* Private functions */
59 
60 /**
61  * omap_enter_idle_[simple/coupled] - OMAP4PLUS cpuidle entry functions
62  * @dev: cpuidle device
63  * @drv: cpuidle driver
64  * @index: the index of state to be entered
65  *
66  * Called from the CPUidle framework to program the device to the
67  * specified low power state selected by the governor.
68  * Returns the amount of time spent in the low power state.
69  */
70 static int omap_enter_idle_simple(struct cpuidle_device *dev,
71 			struct cpuidle_driver *drv,
72 			int index)
73 {
74 	omap_do_wfi();
75 	return index;
76 }
77 
78 static int omap_enter_idle_coupled(struct cpuidle_device *dev,
79 			struct cpuidle_driver *drv,
80 			int index)
81 {
82 	struct idle_statedata *cx = state_ptr + index;
83 	u32 mpuss_can_lose_context = 0;
84 
85 	/*
86 	 * CPU0 has to wait and stay ON until CPU1 is OFF state.
87 	 * This is necessary to honour hardware recommondation
88 	 * of triggeing all the possible low power modes once CPU1 is
89 	 * out of coherency and in OFF mode.
90 	 */
91 	if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
92 		while (pwrdm_read_pwrst(cpu_pd[1]) != PWRDM_POWER_OFF) {
93 			cpu_relax();
94 
95 			/*
96 			 * CPU1 could have already entered & exited idle
97 			 * without hitting off because of a wakeup
98 			 * or a failed attempt to hit off mode.  Check for
99 			 * that here, otherwise we could spin forever
100 			 * waiting for CPU1 off.
101 			 */
102 			if (cpu_done[1])
103 			    goto fail;
104 
105 		}
106 	}
107 
108 	mpuss_can_lose_context = (cx->mpu_state == PWRDM_POWER_RET) &&
109 				 (cx->mpu_logic_state == PWRDM_POWER_OFF);
110 
111 	/*
112 	 * Call idle CPU PM enter notifier chain so that
113 	 * VFP and per CPU interrupt context is saved.
114 	 */
115 	cpu_pm_enter();
116 
117 	if (dev->cpu == 0) {
118 		pwrdm_set_logic_retst(mpu_pd, cx->mpu_logic_state);
119 		omap_set_pwrdm_state(mpu_pd, cx->mpu_state);
120 
121 		/*
122 		 * Call idle CPU cluster PM enter notifier chain
123 		 * to save GIC and wakeupgen context.
124 		 */
125 		if (mpuss_can_lose_context)
126 			cpu_cluster_pm_enter();
127 	}
128 
129 	omap4_enter_lowpower(dev->cpu, cx->cpu_state);
130 	cpu_done[dev->cpu] = true;
131 
132 	/* Wakeup CPU1 only if it is not offlined */
133 	if (dev->cpu == 0 && cpumask_test_cpu(1, cpu_online_mask)) {
134 
135 		if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) &&
136 		    mpuss_can_lose_context)
137 			gic_dist_disable();
138 
139 		clkdm_wakeup(cpu_clkdm[1]);
140 		omap_set_pwrdm_state(cpu_pd[1], PWRDM_POWER_ON);
141 		clkdm_allow_idle(cpu_clkdm[1]);
142 
143 		if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD) &&
144 		    mpuss_can_lose_context) {
145 			while (gic_dist_disabled()) {
146 				udelay(1);
147 				cpu_relax();
148 			}
149 			gic_timer_retrigger();
150 		}
151 	}
152 
153 	/*
154 	 * Call idle CPU PM exit notifier chain to restore
155 	 * VFP and per CPU IRQ context.
156 	 */
157 	cpu_pm_exit();
158 
159 	/*
160 	 * Call idle CPU cluster PM exit notifier chain
161 	 * to restore GIC and wakeupgen context.
162 	 */
163 	if (dev->cpu == 0 && mpuss_can_lose_context)
164 		cpu_cluster_pm_exit();
165 
166 fail:
167 	cpuidle_coupled_parallel_barrier(dev, &abort_barrier);
168 	cpu_done[dev->cpu] = false;
169 
170 	return index;
171 }
172 
173 static struct cpuidle_driver omap4_idle_driver = {
174 	.name				= "omap4_idle",
175 	.owner				= THIS_MODULE,
176 	.states = {
177 		{
178 			/* C1 - CPU0 ON + CPU1 ON + MPU ON */
179 			.exit_latency = 2 + 2,
180 			.target_residency = 5,
181 			.flags = CPUIDLE_FLAG_TIME_VALID,
182 			.enter = omap_enter_idle_simple,
183 			.name = "C1",
184 			.desc = "CPUx ON, MPUSS ON"
185 		},
186 		{
187 			/* C2 - CPU0 OFF + CPU1 OFF + MPU CSWR */
188 			.exit_latency = 328 + 440,
189 			.target_residency = 960,
190 			.flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED |
191 			         CPUIDLE_FLAG_TIMER_STOP,
192 			.enter = omap_enter_idle_coupled,
193 			.name = "C2",
194 			.desc = "CPUx OFF, MPUSS CSWR",
195 		},
196 		{
197 			/* C3 - CPU0 OFF + CPU1 OFF + MPU OSWR */
198 			.exit_latency = 460 + 518,
199 			.target_residency = 1100,
200 			.flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_COUPLED |
201 			         CPUIDLE_FLAG_TIMER_STOP,
202 			.enter = omap_enter_idle_coupled,
203 			.name = "C3",
204 			.desc = "CPUx OFF, MPUSS OSWR",
205 		},
206 	},
207 	.state_count = ARRAY_SIZE(omap4_idle_data),
208 	.safe_state_index = 0,
209 };
210 
211 /* Public functions */
212 
213 /**
214  * omap4_idle_init - Init routine for OMAP4+ idle
215  *
216  * Registers the OMAP4+ specific cpuidle driver to the cpuidle
217  * framework with the valid set of states.
218  */
219 int __init omap4_idle_init(void)
220 {
221 	mpu_pd = pwrdm_lookup("mpu_pwrdm");
222 	cpu_pd[0] = pwrdm_lookup("cpu0_pwrdm");
223 	cpu_pd[1] = pwrdm_lookup("cpu1_pwrdm");
224 	if ((!mpu_pd) || (!cpu_pd[0]) || (!cpu_pd[1]))
225 		return -ENODEV;
226 
227 	cpu_clkdm[0] = clkdm_lookup("mpu0_clkdm");
228 	cpu_clkdm[1] = clkdm_lookup("mpu1_clkdm");
229 	if (!cpu_clkdm[0] || !cpu_clkdm[1])
230 		return -ENODEV;
231 
232 	return cpuidle_register(&omap4_idle_driver, cpu_online_mask);
233 }
234