1 /* 2 * Header for code common to all OMAP2+ machines. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the 6 * Free Software Foundation; either version 2 of the License, or (at your 7 * option) any later version. 8 * 9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 19 * 20 * You should have received a copy of the GNU General Public License along 21 * with this program; if not, write to the Free Software Foundation, Inc., 22 * 675 Mass Ave, Cambridge, MA 02139, USA. 23 */ 24 25 #ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H 26 #define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H 27 #ifndef __ASSEMBLER__ 28 29 #include <linux/irq.h> 30 #include <linux/delay.h> 31 #include <linux/i2c.h> 32 #include <linux/mfd/twl.h> 33 #include <linux/i2c-omap.h> 34 #include <linux/reboot.h> 35 #include <linux/irqchip/irq-omap-intc.h> 36 37 #include <asm/proc-fns.h> 38 #include <asm/hardware/cache-l2x0.h> 39 40 #include "i2c.h" 41 #include "serial.h" 42 43 #include "usb.h" 44 45 #define OMAP_INTC_START NR_IRQS 46 47 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2) 48 int omap2_pm_init(void); 49 #else 50 static inline int omap2_pm_init(void) 51 { 52 return 0; 53 } 54 #endif 55 56 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) 57 int omap3_pm_init(void); 58 #else 59 static inline int omap3_pm_init(void) 60 { 61 return 0; 62 } 63 #endif 64 65 #if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)) 66 int omap4_pm_init(void); 67 int omap4_pm_init_early(void); 68 #else 69 static inline int omap4_pm_init(void) 70 { 71 return 0; 72 } 73 74 static inline int omap4_pm_init_early(void) 75 { 76 return 0; 77 } 78 #endif 79 80 #if defined(CONFIG_PM) && (defined(CONFIG_SOC_AM33XX) || \ 81 defined(CONFIG_SOC_AM43XX)) 82 void amx3_common_pm_init(void); 83 #else 84 static inline void amx3_common_pm_init(void) { } 85 #endif 86 87 extern void omap2_init_common_infrastructure(void); 88 89 extern void omap_init_time(void); 90 extern void omap3_secure_sync32k_timer_init(void); 91 extern void omap3_gptimer_timer_init(void); 92 extern void omap4_local_timer_init(void); 93 #ifdef CONFIG_CACHE_L2X0 94 int omap_l2_cache_init(void); 95 #define OMAP_L2C_AUX_CTRL (L2C_AUX_CTRL_SHARED_OVERRIDE | \ 96 L310_AUX_CTRL_DATA_PREFETCH | \ 97 L310_AUX_CTRL_INSTR_PREFETCH) 98 void omap4_l2c310_write_sec(unsigned long val, unsigned reg); 99 #else 100 static inline int omap_l2_cache_init(void) 101 { 102 return 0; 103 } 104 105 #define OMAP_L2C_AUX_CTRL 0 106 #define omap4_l2c310_write_sec NULL 107 #endif 108 extern void omap5_realtime_timer_init(void); 109 110 void omap2420_init_early(void); 111 void omap2430_init_early(void); 112 void omap3430_init_early(void); 113 void omap35xx_init_early(void); 114 void omap3630_init_early(void); 115 void omap3_init_early(void); /* Do not use this one */ 116 void am33xx_init_early(void); 117 void am35xx_init_early(void); 118 void ti814x_init_early(void); 119 void ti816x_init_early(void); 120 void am33xx_init_early(void); 121 void am43xx_init_early(void); 122 void am43xx_init_late(void); 123 void omap4430_init_early(void); 124 void omap5_init_early(void); 125 void omap3_init_late(void); /* Do not use this one */ 126 void omap4430_init_late(void); 127 void omap2420_init_late(void); 128 void omap2430_init_late(void); 129 void omap3430_init_late(void); 130 void omap35xx_init_late(void); 131 void omap3630_init_late(void); 132 void am35xx_init_late(void); 133 void ti81xx_init_late(void); 134 void am33xx_init_late(void); 135 void omap5_init_late(void); 136 int omap2_common_pm_late_init(void); 137 void dra7xx_init_early(void); 138 void dra7xx_init_late(void); 139 140 #ifdef CONFIG_SOC_BUS 141 void omap_soc_device_init(void); 142 #else 143 static inline void omap_soc_device_init(void) 144 { 145 } 146 #endif 147 148 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430) 149 void omap2xxx_restart(enum reboot_mode mode, const char *cmd); 150 #else 151 static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd) 152 { 153 } 154 #endif 155 156 #ifdef CONFIG_SOC_AM33XX 157 void am33xx_restart(enum reboot_mode mode, const char *cmd); 158 #else 159 static inline void am33xx_restart(enum reboot_mode mode, const char *cmd) 160 { 161 } 162 #endif 163 164 #ifdef CONFIG_ARCH_OMAP3 165 void omap3xxx_restart(enum reboot_mode mode, const char *cmd); 166 #else 167 static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd) 168 { 169 } 170 #endif 171 172 #ifdef CONFIG_SOC_TI81XX 173 void ti81xx_restart(enum reboot_mode mode, const char *cmd); 174 #else 175 static inline void ti81xx_restart(enum reboot_mode mode, const char *cmd) 176 { 177 } 178 #endif 179 180 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \ 181 defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX) 182 void omap44xx_restart(enum reboot_mode mode, const char *cmd); 183 #else 184 static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd) 185 { 186 } 187 #endif 188 189 #ifdef CONFIG_OMAP_INTERCONNECT_BARRIER 190 void omap_barrier_reserve_memblock(void); 191 void omap_barriers_init(void); 192 #else 193 static inline void omap_barrier_reserve_memblock(void) 194 { 195 } 196 #endif 197 198 /* This gets called from mach-omap2/io.c, do not call this */ 199 void __init omap2_set_globals_tap(u32 class, void __iomem *tap); 200 201 void __init omap242x_map_io(void); 202 void __init omap243x_map_io(void); 203 void __init omap3_map_io(void); 204 void __init am33xx_map_io(void); 205 void __init omap4_map_io(void); 206 void __init omap5_map_io(void); 207 void __init dra7xx_map_io(void); 208 void __init ti81xx_map_io(void); 209 210 /** 211 * omap_test_timeout - busy-loop, testing a condition 212 * @cond: condition to test until it evaluates to true 213 * @timeout: maximum number of microseconds in the timeout 214 * @index: loop index (integer) 215 * 216 * Loop waiting for @cond to become true or until at least @timeout 217 * microseconds have passed. To use, define some integer @index in the 218 * calling code. After running, if @index == @timeout, then the loop has 219 * timed out. 220 */ 221 #define omap_test_timeout(cond, timeout, index) \ 222 ({ \ 223 for (index = 0; index < timeout; index++) { \ 224 if (cond) \ 225 break; \ 226 udelay(1); \ 227 } \ 228 }) 229 230 extern struct device *omap2_get_mpuss_device(void); 231 extern struct device *omap2_get_iva_device(void); 232 extern struct device *omap2_get_l3_device(void); 233 extern struct device *omap4_get_dsp_device(void); 234 235 void omap_gic_of_init(void); 236 237 #ifdef CONFIG_CACHE_L2X0 238 extern void __iomem *omap4_get_l2cache_base(void); 239 #endif 240 241 struct device_node; 242 243 #ifdef CONFIG_SMP 244 extern void __iomem *omap4_get_scu_base(void); 245 #else 246 static inline void __iomem *omap4_get_scu_base(void) 247 { 248 return NULL; 249 } 250 #endif 251 252 extern void gic_dist_disable(void); 253 extern void gic_dist_enable(void); 254 extern bool gic_dist_disabled(void); 255 extern void gic_timer_retrigger(void); 256 extern void omap_smc1(u32 fn, u32 arg); 257 extern void omap4_sar_ram_init(void); 258 extern void __iomem *omap4_get_sar_ram_base(void); 259 extern void omap4_mpuss_early_init(void); 260 extern void omap_do_wfi(void); 261 262 263 #ifdef CONFIG_SMP 264 /* Needed for secondary core boot */ 265 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask); 266 extern void omap_auxcoreboot_addr(u32 cpu_addr); 267 extern u32 omap_read_auxcoreboot0(void); 268 269 extern void omap4_cpu_die(unsigned int cpu); 270 extern int omap4_cpu_kill(unsigned int cpu); 271 272 extern const struct smp_operations omap4_smp_ops; 273 #endif 274 275 extern u32 omap4_get_cpu1_ns_pa_addr(void); 276 277 #if defined(CONFIG_SMP) && defined(CONFIG_PM) 278 extern int omap4_mpuss_init(void); 279 extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state); 280 extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state); 281 #else 282 static inline int omap4_enter_lowpower(unsigned int cpu, 283 unsigned int power_state) 284 { 285 cpu_do_idle(); 286 return 0; 287 } 288 289 static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state) 290 { 291 cpu_do_idle(); 292 return 0; 293 } 294 295 static inline int omap4_mpuss_init(void) 296 { 297 return 0; 298 } 299 300 #endif 301 302 #ifdef CONFIG_ARCH_OMAP4 303 void omap4_secondary_startup(void); 304 void omap4460_secondary_startup(void); 305 int omap4_finish_suspend(unsigned long cpu_state); 306 void omap4_cpu_resume(void); 307 #else 308 static inline void omap4_secondary_startup(void) 309 { 310 } 311 312 static inline void omap4460_secondary_startup(void) 313 { 314 } 315 static inline int omap4_finish_suspend(unsigned long cpu_state) 316 { 317 return 0; 318 } 319 static inline void omap4_cpu_resume(void) 320 { 321 } 322 #endif 323 324 #if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX) 325 void omap5_secondary_startup(void); 326 void omap5_secondary_hyp_startup(void); 327 #else 328 static inline void omap5_secondary_startup(void) 329 { 330 } 331 332 static inline void omap5_secondary_hyp_startup(void) 333 { 334 } 335 #endif 336 337 void pdata_quirks_init(const struct of_device_id *); 338 void omap_auxdata_legacy_init(struct device *dev); 339 void omap_pcs_legacy_init(int irq, void (*rearm)(void)); 340 341 struct omap_sdrc_params; 342 extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, 343 struct omap_sdrc_params *sdrc_cs1); 344 struct omap2_hsmmc_info; 345 extern void omap_reserve(void); 346 347 struct omap_hwmod; 348 extern int omap_dss_reset(struct omap_hwmod *); 349 350 /* SoC specific clock initializer */ 351 int omap_clk_init(void); 352 353 int __init omapdss_init_of(void); 354 355 #endif /* __ASSEMBLER__ */ 356 #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ 357