1 /* 2 * Header for code common to all OMAP2+ machines. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the 6 * Free Software Foundation; either version 2 of the License, or (at your 7 * option) any later version. 8 * 9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 19 * 20 * You should have received a copy of the GNU General Public License along 21 * with this program; if not, write to the Free Software Foundation, Inc., 22 * 675 Mass Ave, Cambridge, MA 02139, USA. 23 */ 24 25 #ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H 26 #define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H 27 #ifndef __ASSEMBLER__ 28 29 #include <linux/irq.h> 30 #include <linux/delay.h> 31 #include <linux/i2c.h> 32 #include <linux/i2c/twl.h> 33 #include <linux/i2c-omap.h> 34 #include <linux/reboot.h> 35 36 #include <asm/proc-fns.h> 37 38 #include "i2c.h" 39 #include "serial.h" 40 41 #include "usb.h" 42 43 #define OMAP_INTC_START NR_IRQS 44 45 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2) 46 int omap2_pm_init(void); 47 #else 48 static inline int omap2_pm_init(void) 49 { 50 return 0; 51 } 52 #endif 53 54 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) 55 int omap3_pm_init(void); 56 #else 57 static inline int omap3_pm_init(void) 58 { 59 return 0; 60 } 61 #endif 62 63 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4) 64 int omap4_pm_init(void); 65 int omap4_pm_init_early(void); 66 #else 67 static inline int omap4_pm_init(void) 68 { 69 return 0; 70 } 71 72 static inline int omap4_pm_init_early(void) 73 { 74 return 0; 75 } 76 #endif 77 78 #ifdef CONFIG_OMAP_MUX 79 int omap_mux_late_init(void); 80 #else 81 static inline int omap_mux_late_init(void) 82 { 83 return 0; 84 } 85 #endif 86 87 extern void omap2_init_common_infrastructure(void); 88 89 extern void omap2_sync32k_timer_init(void); 90 extern void omap3_sync32k_timer_init(void); 91 extern void omap3_secure_sync32k_timer_init(void); 92 extern void omap3_gptimer_timer_init(void); 93 extern void omap4_local_timer_init(void); 94 extern void omap5_realtime_timer_init(void); 95 96 void omap2420_init_early(void); 97 void omap2430_init_early(void); 98 void omap3430_init_early(void); 99 void omap35xx_init_early(void); 100 void omap3630_init_early(void); 101 void omap3_init_early(void); /* Do not use this one */ 102 void am33xx_init_early(void); 103 void am35xx_init_early(void); 104 void ti81xx_init_early(void); 105 void am33xx_init_early(void); 106 void am43xx_init_early(void); 107 void am43xx_init_late(void); 108 void omap4430_init_early(void); 109 void omap5_init_early(void); 110 void omap3_init_late(void); /* Do not use this one */ 111 void omap4430_init_late(void); 112 void omap2420_init_late(void); 113 void omap2430_init_late(void); 114 void omap3430_init_late(void); 115 void omap35xx_init_late(void); 116 void omap3630_init_late(void); 117 void am35xx_init_late(void); 118 void ti81xx_init_late(void); 119 void am33xx_init_late(void); 120 void omap5_init_late(void); 121 int omap2_common_pm_late_init(void); 122 void dra7xx_init_early(void); 123 void dra7xx_init_late(void); 124 125 #ifdef CONFIG_SOC_BUS 126 void omap_soc_device_init(void); 127 #else 128 static inline void omap_soc_device_init(void) 129 { 130 } 131 #endif 132 133 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430) 134 void omap2xxx_restart(enum reboot_mode mode, const char *cmd); 135 #else 136 static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd) 137 { 138 } 139 #endif 140 141 #ifdef CONFIG_SOC_AM33XX 142 void am33xx_restart(enum reboot_mode mode, const char *cmd); 143 #else 144 static inline void am33xx_restart(enum reboot_mode mode, const char *cmd) 145 { 146 } 147 #endif 148 149 #ifdef CONFIG_ARCH_OMAP3 150 void omap3xxx_restart(enum reboot_mode mode, const char *cmd); 151 #else 152 static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd) 153 { 154 } 155 #endif 156 157 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) 158 void omap44xx_restart(enum reboot_mode mode, const char *cmd); 159 #else 160 static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd) 161 { 162 } 163 #endif 164 165 /* This gets called from mach-omap2/io.c, do not call this */ 166 void __init omap2_set_globals_tap(u32 class, void __iomem *tap); 167 168 void __init omap242x_map_io(void); 169 void __init omap243x_map_io(void); 170 void __init omap3_map_io(void); 171 void __init am33xx_map_io(void); 172 void __init omap4_map_io(void); 173 void __init omap5_map_io(void); 174 void __init ti81xx_map_io(void); 175 176 /* omap_barriers_init() is OMAP4 only */ 177 void omap_barriers_init(void); 178 179 /** 180 * omap_test_timeout - busy-loop, testing a condition 181 * @cond: condition to test until it evaluates to true 182 * @timeout: maximum number of microseconds in the timeout 183 * @index: loop index (integer) 184 * 185 * Loop waiting for @cond to become true or until at least @timeout 186 * microseconds have passed. To use, define some integer @index in the 187 * calling code. After running, if @index == @timeout, then the loop has 188 * timed out. 189 */ 190 #define omap_test_timeout(cond, timeout, index) \ 191 ({ \ 192 for (index = 0; index < timeout; index++) { \ 193 if (cond) \ 194 break; \ 195 udelay(1); \ 196 } \ 197 }) 198 199 extern struct device *omap2_get_mpuss_device(void); 200 extern struct device *omap2_get_iva_device(void); 201 extern struct device *omap2_get_l3_device(void); 202 extern struct device *omap4_get_dsp_device(void); 203 204 void omap2_init_irq(void); 205 void omap3_init_irq(void); 206 void ti81xx_init_irq(void); 207 extern int omap_irq_pending(void); 208 void omap_intc_save_context(void); 209 void omap_intc_restore_context(void); 210 void omap3_intc_suspend(void); 211 void omap3_intc_prepare_idle(void); 212 void omap3_intc_resume_idle(void); 213 void omap2_intc_handle_irq(struct pt_regs *regs); 214 void omap3_intc_handle_irq(struct pt_regs *regs); 215 void omap_intc_of_init(void); 216 void omap_gic_of_init(void); 217 218 #ifdef CONFIG_CACHE_L2X0 219 extern void __iomem *omap4_get_l2cache_base(void); 220 #endif 221 222 struct device_node; 223 #ifdef CONFIG_OF 224 int __init intc_of_init(struct device_node *node, 225 struct device_node *parent); 226 #else 227 int __init intc_of_init(struct device_node *node, 228 struct device_node *parent) 229 { 230 return 0; 231 } 232 #endif 233 234 #ifdef CONFIG_SMP 235 extern void __iomem *omap4_get_scu_base(void); 236 #else 237 static inline void __iomem *omap4_get_scu_base(void) 238 { 239 return NULL; 240 } 241 #endif 242 243 extern void __init gic_init_irq(void); 244 extern void gic_dist_disable(void); 245 extern void gic_dist_enable(void); 246 extern bool gic_dist_disabled(void); 247 extern void gic_timer_retrigger(void); 248 extern void omap_smc1(u32 fn, u32 arg); 249 extern void __iomem *omap4_get_sar_ram_base(void); 250 extern void omap_do_wfi(void); 251 252 #ifdef CONFIG_SMP 253 /* Needed for secondary core boot */ 254 extern void omap4_secondary_startup(void); 255 extern void omap4460_secondary_startup(void); 256 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask); 257 extern void omap_auxcoreboot_addr(u32 cpu_addr); 258 extern u32 omap_read_auxcoreboot0(void); 259 260 extern void omap4_cpu_die(unsigned int cpu); 261 262 extern struct smp_operations omap4_smp_ops; 263 264 extern void omap5_secondary_startup(void); 265 #endif 266 267 #if defined(CONFIG_SMP) && defined(CONFIG_PM) 268 extern int omap4_mpuss_init(void); 269 extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state); 270 extern int omap4_finish_suspend(unsigned long cpu_state); 271 extern void omap4_cpu_resume(void); 272 extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state); 273 #else 274 static inline int omap4_enter_lowpower(unsigned int cpu, 275 unsigned int power_state) 276 { 277 cpu_do_idle(); 278 return 0; 279 } 280 281 static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state) 282 { 283 cpu_do_idle(); 284 return 0; 285 } 286 287 static inline int omap4_mpuss_init(void) 288 { 289 return 0; 290 } 291 292 static inline int omap4_finish_suspend(unsigned long cpu_state) 293 { 294 return 0; 295 } 296 297 static inline void omap4_cpu_resume(void) 298 {} 299 300 #endif 301 302 void pdata_quirks_init(struct of_device_id *); 303 void omap_auxdata_legacy_init(struct device *dev); 304 void omap_pcs_legacy_init(int irq, void (*rearm)(void)); 305 306 struct omap_sdrc_params; 307 extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, 308 struct omap_sdrc_params *sdrc_cs1); 309 struct omap2_hsmmc_info; 310 extern void omap_reserve(void); 311 312 struct omap_hwmod; 313 extern int omap_dss_reset(struct omap_hwmod *); 314 315 /* SoC specific clock initializer */ 316 int omap_clk_init(void); 317 318 int __init omapdss_init_of(void); 319 void __init omapdss_early_init_of(void); 320 321 #endif /* __ASSEMBLER__ */ 322 #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ 323