xref: /openbmc/linux/arch/arm/mach-omap2/common.h (revision 82e6fdd6)
1 /*
2  * Header for code common to all OMAP2+ machines.
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms of the GNU General Public License as published by the
6  * Free Software Foundation; either version 2 of the License, or (at your
7  * option) any later version.
8  *
9  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12  * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19  *
20  * You should have received a copy of the  GNU General Public License along
21  * with this program; if not, write  to the Free Software Foundation, Inc.,
22  * 675 Mass Ave, Cambridge, MA 02139, USA.
23  */
24 
25 #ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
26 #define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
27 #ifndef __ASSEMBLER__
28 
29 #include <linux/irq.h>
30 #include <linux/delay.h>
31 #include <linux/i2c.h>
32 #include <linux/mfd/twl.h>
33 #include <linux/i2c-omap.h>
34 #include <linux/reboot.h>
35 #include <linux/irqchip/irq-omap-intc.h>
36 
37 #include <asm/proc-fns.h>
38 #include <asm/hardware/cache-l2x0.h>
39 
40 #include "i2c.h"
41 #include "serial.h"
42 
43 #include "usb.h"
44 
45 #define OMAP_INTC_START		NR_IRQS
46 
47 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
48 int omap2_pm_init(void);
49 #else
50 static inline int omap2_pm_init(void)
51 {
52 	return 0;
53 }
54 #endif
55 
56 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
57 int omap3_pm_init(void);
58 #else
59 static inline int omap3_pm_init(void)
60 {
61 	return 0;
62 }
63 #endif
64 
65 #if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
66 int omap4_pm_init(void);
67 int omap4_pm_init_early(void);
68 #else
69 static inline int omap4_pm_init(void)
70 {
71 	return 0;
72 }
73 
74 static inline int omap4_pm_init_early(void)
75 {
76 	return 0;
77 }
78 #endif
79 
80 extern void omap2_init_common_infrastructure(void);
81 
82 extern void omap_init_time(void);
83 extern void omap3_secure_sync32k_timer_init(void);
84 extern void omap3_gptimer_timer_init(void);
85 extern void omap4_local_timer_init(void);
86 #ifdef CONFIG_CACHE_L2X0
87 int omap_l2_cache_init(void);
88 #define OMAP_L2C_AUX_CTRL	(L2C_AUX_CTRL_SHARED_OVERRIDE | \
89 				 L310_AUX_CTRL_DATA_PREFETCH | \
90 				 L310_AUX_CTRL_INSTR_PREFETCH)
91 void omap4_l2c310_write_sec(unsigned long val, unsigned reg);
92 #else
93 static inline int omap_l2_cache_init(void)
94 {
95 	return 0;
96 }
97 
98 #define OMAP_L2C_AUX_CTRL	0
99 #define omap4_l2c310_write_sec	NULL
100 #endif
101 extern void omap5_realtime_timer_init(void);
102 
103 void omap2420_init_early(void);
104 void omap2430_init_early(void);
105 void omap3430_init_early(void);
106 void omap35xx_init_early(void);
107 void omap3630_init_early(void);
108 void omap3_init_early(void);	/* Do not use this one */
109 void am33xx_init_early(void);
110 void am35xx_init_early(void);
111 void ti814x_init_early(void);
112 void ti816x_init_early(void);
113 void am33xx_init_early(void);
114 void am43xx_init_early(void);
115 void am43xx_init_late(void);
116 void omap4430_init_early(void);
117 void omap5_init_early(void);
118 void omap3_init_late(void);	/* Do not use this one */
119 void omap4430_init_late(void);
120 void omap2420_init_late(void);
121 void omap2430_init_late(void);
122 void omap3430_init_late(void);
123 void omap35xx_init_late(void);
124 void omap3630_init_late(void);
125 void am35xx_init_late(void);
126 void ti81xx_init_late(void);
127 void am33xx_init_late(void);
128 void omap5_init_late(void);
129 int omap2_common_pm_late_init(void);
130 void dra7xx_init_early(void);
131 void dra7xx_init_late(void);
132 
133 #ifdef CONFIG_SOC_BUS
134 void omap_soc_device_init(void);
135 #else
136 static inline void omap_soc_device_init(void)
137 {
138 }
139 #endif
140 
141 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
142 void omap2xxx_restart(enum reboot_mode mode, const char *cmd);
143 #else
144 static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
145 {
146 }
147 #endif
148 
149 #ifdef CONFIG_SOC_AM33XX
150 void am33xx_restart(enum reboot_mode mode, const char *cmd);
151 #else
152 static inline void am33xx_restart(enum reboot_mode mode, const char *cmd)
153 {
154 }
155 #endif
156 
157 #ifdef CONFIG_ARCH_OMAP3
158 void omap3xxx_restart(enum reboot_mode mode, const char *cmd);
159 #else
160 static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
161 {
162 }
163 #endif
164 
165 #ifdef CONFIG_SOC_TI81XX
166 void ti81xx_restart(enum reboot_mode mode, const char *cmd);
167 #else
168 static inline void ti81xx_restart(enum reboot_mode mode, const char *cmd)
169 {
170 }
171 #endif
172 
173 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
174 	defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
175 void omap44xx_restart(enum reboot_mode mode, const char *cmd);
176 #else
177 static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd)
178 {
179 }
180 #endif
181 
182 #ifdef CONFIG_OMAP_INTERCONNECT_BARRIER
183 void omap_barrier_reserve_memblock(void);
184 void omap_barriers_init(void);
185 #else
186 static inline void omap_barrier_reserve_memblock(void)
187 {
188 }
189 #endif
190 
191 /* This gets called from mach-omap2/io.c, do not call this */
192 void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
193 
194 void __init omap242x_map_io(void);
195 void __init omap243x_map_io(void);
196 void __init omap3_map_io(void);
197 void __init am33xx_map_io(void);
198 void __init omap4_map_io(void);
199 void __init omap5_map_io(void);
200 void __init dra7xx_map_io(void);
201 void __init ti81xx_map_io(void);
202 
203 /**
204  * omap_test_timeout - busy-loop, testing a condition
205  * @cond: condition to test until it evaluates to true
206  * @timeout: maximum number of microseconds in the timeout
207  * @index: loop index (integer)
208  *
209  * Loop waiting for @cond to become true or until at least @timeout
210  * microseconds have passed.  To use, define some integer @index in the
211  * calling code.  After running, if @index == @timeout, then the loop has
212  * timed out.
213  */
214 #define omap_test_timeout(cond, timeout, index)			\
215 ({								\
216 	for (index = 0; index < timeout; index++) {		\
217 		if (cond)					\
218 			break;					\
219 		udelay(1);					\
220 	}							\
221 })
222 
223 extern struct device *omap2_get_mpuss_device(void);
224 extern struct device *omap2_get_iva_device(void);
225 extern struct device *omap2_get_l3_device(void);
226 extern struct device *omap4_get_dsp_device(void);
227 
228 void omap_gic_of_init(void);
229 
230 #ifdef CONFIG_CACHE_L2X0
231 extern void __iomem *omap4_get_l2cache_base(void);
232 #endif
233 
234 struct device_node;
235 
236 #ifdef CONFIG_SMP
237 extern void __iomem *omap4_get_scu_base(void);
238 #else
239 static inline void __iomem *omap4_get_scu_base(void)
240 {
241 	return NULL;
242 }
243 #endif
244 
245 extern void gic_dist_disable(void);
246 extern void gic_dist_enable(void);
247 extern bool gic_dist_disabled(void);
248 extern void gic_timer_retrigger(void);
249 extern void omap_smc1(u32 fn, u32 arg);
250 extern void omap4_sar_ram_init(void);
251 extern void __iomem *omap4_get_sar_ram_base(void);
252 extern void omap4_mpuss_early_init(void);
253 extern void omap_do_wfi(void);
254 
255 
256 #ifdef CONFIG_SMP
257 /* Needed for secondary core boot */
258 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
259 extern void omap_auxcoreboot_addr(u32 cpu_addr);
260 extern u32 omap_read_auxcoreboot0(void);
261 
262 extern void omap4_cpu_die(unsigned int cpu);
263 extern int omap4_cpu_kill(unsigned int cpu);
264 
265 extern const struct smp_operations omap4_smp_ops;
266 #endif
267 
268 extern u32 omap4_get_cpu1_ns_pa_addr(void);
269 
270 #if defined(CONFIG_SMP) && defined(CONFIG_PM)
271 extern int omap4_mpuss_init(void);
272 extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
273 extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
274 #else
275 static inline int omap4_enter_lowpower(unsigned int cpu,
276 					unsigned int power_state)
277 {
278 	cpu_do_idle();
279 	return 0;
280 }
281 
282 static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
283 {
284 	cpu_do_idle();
285 	return 0;
286 }
287 
288 static inline int omap4_mpuss_init(void)
289 {
290 	return 0;
291 }
292 
293 #endif
294 
295 #ifdef CONFIG_ARCH_OMAP4
296 void omap4_secondary_startup(void);
297 void omap4460_secondary_startup(void);
298 int omap4_finish_suspend(unsigned long cpu_state);
299 void omap4_cpu_resume(void);
300 #else
301 static inline void omap4_secondary_startup(void)
302 {
303 }
304 
305 static inline void omap4460_secondary_startup(void)
306 {
307 }
308 static inline int omap4_finish_suspend(unsigned long cpu_state)
309 {
310 	return 0;
311 }
312 static inline void omap4_cpu_resume(void)
313 {
314 }
315 #endif
316 
317 #if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
318 void omap5_secondary_startup(void);
319 void omap5_secondary_hyp_startup(void);
320 #else
321 static inline void omap5_secondary_startup(void)
322 {
323 }
324 
325 static inline void omap5_secondary_hyp_startup(void)
326 {
327 }
328 #endif
329 
330 void pdata_quirks_init(const struct of_device_id *);
331 void omap_auxdata_legacy_init(struct device *dev);
332 void omap_pcs_legacy_init(int irq, void (*rearm)(void));
333 
334 struct omap_sdrc_params;
335 extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
336 				      struct omap_sdrc_params *sdrc_cs1);
337 struct omap2_hsmmc_info;
338 extern void omap_reserve(void);
339 
340 struct omap_hwmod;
341 extern int omap_dss_reset(struct omap_hwmod *);
342 
343 /* SoC specific clock initializer */
344 int omap_clk_init(void);
345 
346 int __init omapdss_init_of(void);
347 
348 #endif /* __ASSEMBLER__ */
349 #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
350