xref: /openbmc/linux/arch/arm/mach-omap2/common.h (revision 6d99a79c)
1 /*
2  * Header for code common to all OMAP2+ machines.
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms of the GNU General Public License as published by the
6  * Free Software Foundation; either version 2 of the License, or (at your
7  * option) any later version.
8  *
9  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12  * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19  *
20  * You should have received a copy of the  GNU General Public License along
21  * with this program; if not, write  to the Free Software Foundation, Inc.,
22  * 675 Mass Ave, Cambridge, MA 02139, USA.
23  */
24 
25 #ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
26 #define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
27 #ifndef __ASSEMBLER__
28 
29 #include <linux/irq.h>
30 #include <linux/delay.h>
31 #include <linux/i2c.h>
32 #include <linux/mfd/twl.h>
33 #include <linux/platform_data/i2c-omap.h>
34 #include <linux/reboot.h>
35 #include <linux/irqchip/irq-omap-intc.h>
36 
37 #include <asm/proc-fns.h>
38 #include <asm/hardware/cache-l2x0.h>
39 
40 #include "i2c.h"
41 #include "serial.h"
42 
43 #include "usb.h"
44 
45 #define OMAP_INTC_START		NR_IRQS
46 
47 extern int (*omap_pm_soc_init)(void);
48 int omap_pm_nop_init(void);
49 
50 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
51 int omap2_pm_init(void);
52 #else
53 static inline int omap2_pm_init(void)
54 {
55 	return 0;
56 }
57 #endif
58 
59 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
60 int omap3_pm_init(void);
61 #else
62 static inline int omap3_pm_init(void)
63 {
64 	return 0;
65 }
66 #endif
67 
68 #if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
69 int omap4_pm_init(void);
70 int omap4_pm_init_early(void);
71 #else
72 static inline int omap4_pm_init(void)
73 {
74 	return 0;
75 }
76 
77 static inline int omap4_pm_init_early(void)
78 {
79 	return 0;
80 }
81 #endif
82 
83 #if defined(CONFIG_PM) && (defined(CONFIG_SOC_AM33XX) || \
84 	defined(CONFIG_SOC_AM43XX))
85 int amx3_common_pm_init(void);
86 #else
87 static inline int amx3_common_pm_init(void)
88 {
89 	return 0;
90 }
91 #endif
92 
93 extern void omap2_init_common_infrastructure(void);
94 
95 extern void omap_init_time(void);
96 extern void omap3_secure_sync32k_timer_init(void);
97 extern void omap3_gptimer_timer_init(void);
98 extern void omap4_local_timer_init(void);
99 #ifdef CONFIG_CACHE_L2X0
100 int omap_l2_cache_init(void);
101 #define OMAP_L2C_AUX_CTRL	(L2C_AUX_CTRL_SHARED_OVERRIDE | \
102 				 L310_AUX_CTRL_DATA_PREFETCH | \
103 				 L310_AUX_CTRL_INSTR_PREFETCH)
104 void omap4_l2c310_write_sec(unsigned long val, unsigned reg);
105 #else
106 static inline int omap_l2_cache_init(void)
107 {
108 	return 0;
109 }
110 
111 #define OMAP_L2C_AUX_CTRL	0
112 #define omap4_l2c310_write_sec	NULL
113 #endif
114 extern void omap5_realtime_timer_init(void);
115 
116 void omap2420_init_early(void);
117 void omap2430_init_early(void);
118 void omap3430_init_early(void);
119 void omap35xx_init_early(void);
120 void omap3630_init_early(void);
121 void omap3_init_early(void);	/* Do not use this one */
122 void am33xx_init_early(void);
123 void am35xx_init_early(void);
124 void ti814x_init_early(void);
125 void ti816x_init_early(void);
126 void am33xx_init_early(void);
127 void am43xx_init_early(void);
128 void am43xx_init_late(void);
129 void omap4430_init_early(void);
130 void omap5_init_early(void);
131 void omap3_init_late(void);
132 void omap4430_init_late(void);
133 void omap2420_init_late(void);
134 void omap2430_init_late(void);
135 void ti81xx_init_late(void);
136 void am33xx_init_late(void);
137 void omap5_init_late(void);
138 int omap2_common_pm_late_init(void);
139 void dra7xx_init_early(void);
140 void dra7xx_init_late(void);
141 
142 #ifdef CONFIG_SOC_BUS
143 void omap_soc_device_init(void);
144 #else
145 static inline void omap_soc_device_init(void)
146 {
147 }
148 #endif
149 
150 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
151 void omap2xxx_restart(enum reboot_mode mode, const char *cmd);
152 #else
153 static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd)
154 {
155 }
156 #endif
157 
158 #ifdef CONFIG_SOC_AM33XX
159 void am33xx_restart(enum reboot_mode mode, const char *cmd);
160 #else
161 static inline void am33xx_restart(enum reboot_mode mode, const char *cmd)
162 {
163 }
164 #endif
165 
166 #ifdef CONFIG_ARCH_OMAP3
167 void omap3xxx_restart(enum reboot_mode mode, const char *cmd);
168 #else
169 static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd)
170 {
171 }
172 #endif
173 
174 #ifdef CONFIG_SOC_TI81XX
175 void ti81xx_restart(enum reboot_mode mode, const char *cmd);
176 #else
177 static inline void ti81xx_restart(enum reboot_mode mode, const char *cmd)
178 {
179 }
180 #endif
181 
182 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
183 	defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX)
184 void omap44xx_restart(enum reboot_mode mode, const char *cmd);
185 #else
186 static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd)
187 {
188 }
189 #endif
190 
191 #ifdef CONFIG_OMAP_INTERCONNECT_BARRIER
192 void omap_barrier_reserve_memblock(void);
193 void omap_barriers_init(void);
194 #else
195 static inline void omap_barrier_reserve_memblock(void)
196 {
197 }
198 #endif
199 
200 /* This gets called from mach-omap2/io.c, do not call this */
201 void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
202 
203 void __init omap242x_map_io(void);
204 void __init omap243x_map_io(void);
205 void __init omap3_map_io(void);
206 void __init am33xx_map_io(void);
207 void __init omap4_map_io(void);
208 void __init omap5_map_io(void);
209 void __init dra7xx_map_io(void);
210 void __init ti81xx_map_io(void);
211 
212 /**
213  * omap_test_timeout - busy-loop, testing a condition
214  * @cond: condition to test until it evaluates to true
215  * @timeout: maximum number of microseconds in the timeout
216  * @index: loop index (integer)
217  *
218  * Loop waiting for @cond to become true or until at least @timeout
219  * microseconds have passed.  To use, define some integer @index in the
220  * calling code.  After running, if @index == @timeout, then the loop has
221  * timed out.
222  */
223 #define omap_test_timeout(cond, timeout, index)			\
224 ({								\
225 	for (index = 0; index < timeout; index++) {		\
226 		if (cond)					\
227 			break;					\
228 		udelay(1);					\
229 	}							\
230 })
231 
232 extern struct device *omap2_get_mpuss_device(void);
233 extern struct device *omap2_get_iva_device(void);
234 extern struct device *omap2_get_l3_device(void);
235 extern struct device *omap4_get_dsp_device(void);
236 
237 void omap_gic_of_init(void);
238 
239 #ifdef CONFIG_CACHE_L2X0
240 extern void __iomem *omap4_get_l2cache_base(void);
241 #endif
242 
243 struct device_node;
244 
245 #ifdef CONFIG_SMP
246 extern void __iomem *omap4_get_scu_base(void);
247 #else
248 static inline void __iomem *omap4_get_scu_base(void)
249 {
250 	return NULL;
251 }
252 #endif
253 
254 extern void gic_dist_disable(void);
255 extern void gic_dist_enable(void);
256 extern bool gic_dist_disabled(void);
257 extern void gic_timer_retrigger(void);
258 extern void omap_smc1(u32 fn, u32 arg);
259 extern void omap4_sar_ram_init(void);
260 extern void __iomem *omap4_get_sar_ram_base(void);
261 extern void omap4_mpuss_early_init(void);
262 extern void omap_do_wfi(void);
263 
264 
265 #ifdef CONFIG_SMP
266 /* Needed for secondary core boot */
267 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
268 extern void omap_auxcoreboot_addr(u32 cpu_addr);
269 extern u32 omap_read_auxcoreboot0(void);
270 
271 extern void omap4_cpu_die(unsigned int cpu);
272 extern int omap4_cpu_kill(unsigned int cpu);
273 
274 extern const struct smp_operations omap4_smp_ops;
275 #endif
276 
277 extern u32 omap4_get_cpu1_ns_pa_addr(void);
278 
279 #if defined(CONFIG_SMP) && defined(CONFIG_PM)
280 extern int omap4_mpuss_init(void);
281 extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
282 extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
283 #else
284 static inline int omap4_enter_lowpower(unsigned int cpu,
285 					unsigned int power_state)
286 {
287 	cpu_do_idle();
288 	return 0;
289 }
290 
291 static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
292 {
293 	cpu_do_idle();
294 	return 0;
295 }
296 
297 static inline int omap4_mpuss_init(void)
298 {
299 	return 0;
300 }
301 
302 #endif
303 
304 #ifdef CONFIG_ARCH_OMAP4
305 void omap4_secondary_startup(void);
306 void omap4460_secondary_startup(void);
307 int omap4_finish_suspend(unsigned long cpu_state);
308 void omap4_cpu_resume(void);
309 #else
310 static inline void omap4_secondary_startup(void)
311 {
312 }
313 
314 static inline void omap4460_secondary_startup(void)
315 {
316 }
317 static inline int omap4_finish_suspend(unsigned long cpu_state)
318 {
319 	return 0;
320 }
321 static inline void omap4_cpu_resume(void)
322 {
323 }
324 #endif
325 
326 #if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)
327 void omap5_secondary_startup(void);
328 void omap5_secondary_hyp_startup(void);
329 #else
330 static inline void omap5_secondary_startup(void)
331 {
332 }
333 
334 static inline void omap5_secondary_hyp_startup(void)
335 {
336 }
337 #endif
338 
339 void pdata_quirks_init(const struct of_device_id *);
340 void omap_auxdata_legacy_init(struct device *dev);
341 void omap_pcs_legacy_init(int irq, void (*rearm)(void));
342 
343 struct omap_sdrc_params;
344 extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
345 				      struct omap_sdrc_params *sdrc_cs1);
346 struct omap2_hsmmc_info;
347 extern void omap_reserve(void);
348 
349 struct omap_hwmod;
350 extern int omap_dss_reset(struct omap_hwmod *);
351 
352 /* SoC specific clock initializer */
353 int omap_clk_init(void);
354 
355 #endif /* __ASSEMBLER__ */
356 #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
357