1 /* 2 * linux/arch/arm/mach-omap2/common.c 3 * 4 * Code common to all OMAP2+ machines. 5 * 6 * Copyright (C) 2009 Texas Instruments 7 * Copyright (C) 2010 Nokia Corporation 8 * Tony Lindgren <tony@atomide.com> 9 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License version 2 as 13 * published by the Free Software Foundation. 14 */ 15 #include <linux/kernel.h> 16 #include <linux/init.h> 17 #include <linux/clk.h> 18 #include <linux/io.h> 19 20 #include <plat/clock.h> 21 22 #include "soc.h" 23 #include "iomap.h" 24 #include "common.h" 25 #include "sdrc.h" 26 #include "control.h" 27 28 /* Global address base setup code */ 29 30 static void __init __omap2_set_globals(struct omap_globals *omap2_globals) 31 { 32 omap2_set_globals_tap(omap2_globals); 33 omap2_set_globals_sdrc(omap2_globals); 34 omap2_set_globals_control(omap2_globals); 35 omap2_set_globals_prcm(omap2_globals); 36 } 37 38 #if defined(CONFIG_SOC_OMAP2420) 39 40 static struct omap_globals omap242x_globals = { 41 .class = OMAP242X_CLASS, 42 .tap = OMAP2_L4_IO_ADDRESS(0x48014000), 43 .sdrc = OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE), 44 .sms = OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE), 45 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE), 46 .prm = OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE), 47 .cm = OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), 48 }; 49 50 void __init omap2_set_globals_242x(void) 51 { 52 __omap2_set_globals(&omap242x_globals); 53 } 54 55 void __init omap242x_map_io(void) 56 { 57 omap242x_map_common_io(); 58 } 59 #endif 60 61 #if defined(CONFIG_SOC_OMAP2430) 62 63 static struct omap_globals omap243x_globals = { 64 .class = OMAP243X_CLASS, 65 .tap = OMAP2_L4_IO_ADDRESS(0x4900a000), 66 .sdrc = OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE), 67 .sms = OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE), 68 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE), 69 .prm = OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE), 70 .cm = OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), 71 }; 72 73 void __init omap2_set_globals_243x(void) 74 { 75 __omap2_set_globals(&omap243x_globals); 76 } 77 78 void __init omap243x_map_io(void) 79 { 80 omap243x_map_common_io(); 81 } 82 #endif 83 84 #if defined(CONFIG_ARCH_OMAP3) 85 86 static struct omap_globals omap3_globals = { 87 .class = OMAP343X_CLASS, 88 .tap = OMAP2_L4_IO_ADDRESS(0x4830A000), 89 .sdrc = OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE), 90 .sms = OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE), 91 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE), 92 .prm = OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE), 93 .cm = OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), 94 }; 95 96 void __init omap2_set_globals_3xxx(void) 97 { 98 __omap2_set_globals(&omap3_globals); 99 } 100 101 void __init omap3_map_io(void) 102 { 103 omap34xx_map_common_io(); 104 } 105 106 /* 107 * Adjust TAP register base such that omap3_check_revision accesses the correct 108 * TI81XX register for checking device ID (it adds 0x204 to tap base while 109 * TI81XX DEVICE ID register is at offset 0x600 from control base). 110 */ 111 #define TI81XX_TAP_BASE (TI81XX_CTRL_BASE + \ 112 TI81XX_CONTROL_DEVICE_ID - 0x204) 113 114 static struct omap_globals ti81xx_globals = { 115 .class = OMAP343X_CLASS, 116 .tap = OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE), 117 .ctrl = OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE), 118 .prm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), 119 .cm = OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), 120 }; 121 122 void __init omap2_set_globals_ti81xx(void) 123 { 124 __omap2_set_globals(&ti81xx_globals); 125 } 126 127 void __init ti81xx_map_io(void) 128 { 129 omapti81xx_map_common_io(); 130 } 131 #endif 132 133 #if defined(CONFIG_SOC_AM33XX) 134 #define AM33XX_TAP_BASE (AM33XX_CTRL_BASE + \ 135 TI81XX_CONTROL_DEVICE_ID - 0x204) 136 137 static struct omap_globals am33xx_globals = { 138 .class = AM335X_CLASS, 139 .tap = AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE), 140 .ctrl = AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE), 141 .prm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), 142 .cm = AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), 143 }; 144 145 void __init omap2_set_globals_am33xx(void) 146 { 147 __omap2_set_globals(&am33xx_globals); 148 } 149 150 void __init am33xx_map_io(void) 151 { 152 omapam33xx_map_common_io(); 153 } 154 #endif 155 156 #if defined(CONFIG_ARCH_OMAP4) 157 static struct omap_globals omap4_globals = { 158 .class = OMAP443X_CLASS, 159 .tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE), 160 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE), 161 .ctrl_pad = OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE), 162 .prm = OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE), 163 .cm = OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE), 164 .cm2 = OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE), 165 .prcm_mpu = OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE), 166 }; 167 168 void __init omap2_set_globals_443x(void) 169 { 170 __omap2_set_globals(&omap4_globals); 171 } 172 173 void __init omap4_map_io(void) 174 { 175 omap44xx_map_common_io(); 176 } 177 #endif 178 179 #if defined(CONFIG_SOC_OMAP5) 180 static struct omap_globals omap5_globals = { 181 .class = OMAP54XX_CLASS, 182 .tap = OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), 183 .ctrl = OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE), 184 .ctrl_pad = OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE), 185 .prm = OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE), 186 .cm = OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE), 187 .cm2 = OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE), 188 .prcm_mpu = OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE), 189 }; 190 191 void __init omap2_set_globals_5xxx(void) 192 { 193 omap2_set_globals_tap(&omap5_globals); 194 omap2_set_globals_control(&omap5_globals); 195 omap2_set_globals_prcm(&omap5_globals); 196 } 197 198 void __init omap5_map_io(void) 199 { 200 omap5_map_common_io(); 201 } 202 #endif 203