1d2912cb1SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2d198b514SPaul Walmsley /* 3d198b514SPaul Walmsley * OMAP44xx CM1 instance offset macros 4d198b514SPaul Walmsley * 5ad98a18bSBenoit Cousson * Copyright (C) 2009-2011 Texas Instruments, Inc. 6d198b514SPaul Walmsley * Copyright (C) 2009-2010 Nokia Corporation 7d198b514SPaul Walmsley * 8d198b514SPaul Walmsley * Paul Walmsley (paul@pwsan.com) 9d198b514SPaul Walmsley * Rajendra Nayak (rnayak@ti.com) 10d198b514SPaul Walmsley * Benoit Cousson (b-cousson@ti.com) 11d198b514SPaul Walmsley * 12d198b514SPaul Walmsley * This file is automatically generated from the OMAP hardware databases. 13d198b514SPaul Walmsley * We respectfully ask that any modifications to this file be coordinated 14d198b514SPaul Walmsley * with the public linux-omap@vger.kernel.org mailing list and the 15d198b514SPaul Walmsley * authors above to ensure that the autogeneration scripts are kept 16d198b514SPaul Walmsley * up-to-date with the file contents. 17d198b514SPaul Walmsley * 18d198b514SPaul Walmsley * XXX This file needs to be updated to align on one of "OMAP4", "OMAP44XX", 19d198b514SPaul Walmsley * or "OMAP4430". 20d198b514SPaul Walmsley */ 21d198b514SPaul Walmsley 22d198b514SPaul Walmsley #ifndef __ARCH_ARM_MACH_OMAP2_CM1_44XX_H 23d198b514SPaul Walmsley #define __ARCH_ARM_MACH_OMAP2_CM1_44XX_H 24d198b514SPaul Walmsley 25d198b514SPaul Walmsley /* CM1 base address */ 26d198b514SPaul Walmsley #define OMAP4430_CM1_BASE 0x4a004000 27d198b514SPaul Walmsley 28cdb54c44SPaul Walmsley #define OMAP44XX_CM1_REGADDR(inst, reg) \ 29cdb54c44SPaul Walmsley OMAP2_L4_IO_ADDRESS(OMAP4430_CM1_BASE + (inst) + (reg)) 30d198b514SPaul Walmsley 31d198b514SPaul Walmsley /* CM1 instances */ 32cdb54c44SPaul Walmsley #define OMAP4430_CM1_OCP_SOCKET_INST 0x0000 33cdb54c44SPaul Walmsley #define OMAP4430_CM1_CKGEN_INST 0x0100 34cdb54c44SPaul Walmsley #define OMAP4430_CM1_MPU_INST 0x0300 35cdb54c44SPaul Walmsley #define OMAP4430_CM1_TESLA_INST 0x0400 36cdb54c44SPaul Walmsley #define OMAP4430_CM1_ABE_INST 0x0500 37d198b514SPaul Walmsley 38e4156ee5SPaul Walmsley /* CM1 clockdomain register offsets (from instance start) */ 39e4156ee5SPaul Walmsley #define OMAP4430_CM1_MPU_MPU_CDOFFS 0x0000 40e4156ee5SPaul Walmsley #define OMAP4430_CM1_TESLA_TESLA_CDOFFS 0x0000 41ad98a18bSBenoit Cousson #define OMAP4430_CM1_ABE_ABE_CDOFFS 0x0000 42e4156ee5SPaul Walmsley 43d198b514SPaul Walmsley #endif 44