1c595713dSTony Lindgren #ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_34XX_H 2c595713dSTony Lindgren #define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_34XX_H 3c595713dSTony Lindgren 4c595713dSTony Lindgren /* 5c595713dSTony Lindgren * OMAP3430 Clock Management register bits 6c595713dSTony Lindgren * 7c595713dSTony Lindgren * Copyright (C) 2007-2008 Texas Instruments, Inc. 8c595713dSTony Lindgren * Copyright (C) 2007-2008 Nokia Corporation 9c595713dSTony Lindgren * 10c595713dSTony Lindgren * Written by Paul Walmsley 11c595713dSTony Lindgren * 12c595713dSTony Lindgren * This program is free software; you can redistribute it and/or modify 13c595713dSTony Lindgren * it under the terms of the GNU General Public License version 2 as 14c595713dSTony Lindgren * published by the Free Software Foundation. 15c595713dSTony Lindgren */ 16c595713dSTony Lindgren 17c595713dSTony Lindgren /* Bits shared between registers */ 18c595713dSTony Lindgren 19c595713dSTony Lindgren /* CM_FCLKEN1_CORE and CM_ICLKEN1_CORE shared bits */ 20c595713dSTony Lindgren #define OMAP3430ES2_EN_MMC3_MASK (1 << 30) 21c595713dSTony Lindgren #define OMAP3430ES2_EN_MMC3_SHIFT 30 222bc4ef71SPaul Walmsley #define OMAP3430_EN_MSPRO_MASK (1 << 23) 23c595713dSTony Lindgren #define OMAP3430_EN_MSPRO_SHIFT 23 242bc4ef71SPaul Walmsley #define OMAP3430_EN_HDQ_MASK (1 << 22) 25c595713dSTony Lindgren #define OMAP3430_EN_HDQ_SHIFT 22 262bc4ef71SPaul Walmsley #define OMAP3430ES1_EN_FSHOSTUSB_MASK (1 << 5) 27c595713dSTony Lindgren #define OMAP3430ES1_EN_FSHOSTUSB_SHIFT 5 282bc4ef71SPaul Walmsley #define OMAP3430ES1_EN_D2D_MASK (1 << 3) 29c595713dSTony Lindgren #define OMAP3430ES1_EN_D2D_SHIFT 3 302bc4ef71SPaul Walmsley #define OMAP3430_EN_SSI_MASK (1 << 0) 31c595713dSTony Lindgren #define OMAP3430_EN_SSI_SHIFT 0 32c595713dSTony Lindgren 33c595713dSTony Lindgren /* CM_FCLKEN3_CORE and CM_ICLKEN3_CORE shared bits */ 34c595713dSTony Lindgren #define OMAP3430ES2_EN_USBTLL_SHIFT 2 35c595713dSTony Lindgren #define OMAP3430ES2_EN_USBTLL_MASK (1 << 2) 36c595713dSTony Lindgren 37c595713dSTony Lindgren /* CM_FCLKEN_WKUP and CM_ICLKEN_WKUP shared bits */ 382bc4ef71SPaul Walmsley #define OMAP3430_EN_WDT2_MASK (1 << 5) 39c595713dSTony Lindgren #define OMAP3430_EN_WDT2_SHIFT 5 40c595713dSTony Lindgren 41c595713dSTony Lindgren /* CM_ICLKEN_CAM, CM_FCLKEN_CAM shared bits */ 422bc4ef71SPaul Walmsley #define OMAP3430_EN_CAM_MASK (1 << 0) 43c595713dSTony Lindgren #define OMAP3430_EN_CAM_SHIFT 0 44c595713dSTony Lindgren 45c595713dSTony Lindgren /* CM_FCLKEN_PER, CM_ICLKEN_PER shared bits */ 462bc4ef71SPaul Walmsley #define OMAP3430_EN_WDT3_MASK (1 << 12) 47c595713dSTony Lindgren #define OMAP3430_EN_WDT3_SHIFT 12 48c595713dSTony Lindgren 49c595713dSTony Lindgren /* CM_CLKSEL2_EMU, CM_CLKSEL3_EMU shared bits */ 502bc4ef71SPaul Walmsley #define OMAP3430_OVERRIDE_ENABLE_MASK (1 << 19) 51c595713dSTony Lindgren 52c595713dSTony Lindgren 53c595713dSTony Lindgren /* Bits specific to each register */ 54c595713dSTony Lindgren 55c595713dSTony Lindgren /* CM_FCLKEN_IVA2 */ 56dfa6d6f8SKevin Hilman #define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_MASK (1 << 0) 5731c203d4SHiroshi DOYU #define OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT 0 58c595713dSTony Lindgren 59c595713dSTony Lindgren /* CM_CLKEN_PLL_IVA2 */ 60c595713dSTony Lindgren #define OMAP3430_IVA2_DPLL_RAMPTIME_SHIFT 8 61c595713dSTony Lindgren #define OMAP3430_IVA2_DPLL_RAMPTIME_MASK (0x3 << 8) 62c595713dSTony Lindgren #define OMAP3430_IVA2_DPLL_FREQSEL_SHIFT 4 63c595713dSTony Lindgren #define OMAP3430_IVA2_DPLL_FREQSEL_MASK (0xf << 4) 64c595713dSTony Lindgren #define OMAP3430_EN_IVA2_DPLL_DRIFTGUARD_SHIFT 3 65c595713dSTony Lindgren #define OMAP3430_EN_IVA2_DPLL_DRIFTGUARD_MASK (1 << 3) 66c595713dSTony Lindgren #define OMAP3430_EN_IVA2_DPLL_SHIFT 0 67c595713dSTony Lindgren #define OMAP3430_EN_IVA2_DPLL_MASK (0x7 << 0) 68c595713dSTony Lindgren 69c595713dSTony Lindgren /* CM_IDLEST_IVA2 */ 70ed733619STero Kristo #define OMAP3430_ST_IVA2_SHIFT 0 712bc4ef71SPaul Walmsley #define OMAP3430_ST_IVA2_MASK (1 << 0) 72c595713dSTony Lindgren 73c595713dSTony Lindgren /* CM_IDLEST_PLL_IVA2 */ 74542313ccSPaul Walmsley #define OMAP3430_ST_IVA2_CLK_SHIFT 0 75542313ccSPaul Walmsley #define OMAP3430_ST_IVA2_CLK_MASK (1 << 0) 76c595713dSTony Lindgren 77c595713dSTony Lindgren /* CM_AUTOIDLE_PLL_IVA2 */ 78c595713dSTony Lindgren #define OMAP3430_AUTO_IVA2_DPLL_SHIFT 0 79c595713dSTony Lindgren #define OMAP3430_AUTO_IVA2_DPLL_MASK (0x7 << 0) 80c595713dSTony Lindgren 81c595713dSTony Lindgren /* CM_CLKSEL1_PLL_IVA2 */ 82c595713dSTony Lindgren #define OMAP3430_IVA2_CLK_SRC_SHIFT 19 834e68f5a7SRajendra Nayak #define OMAP3430_IVA2_CLK_SRC_MASK (0x7 << 19) 84c595713dSTony Lindgren #define OMAP3430_IVA2_DPLL_MULT_SHIFT 8 85c595713dSTony Lindgren #define OMAP3430_IVA2_DPLL_MULT_MASK (0x7ff << 8) 86c595713dSTony Lindgren #define OMAP3430_IVA2_DPLL_DIV_SHIFT 0 87c595713dSTony Lindgren #define OMAP3430_IVA2_DPLL_DIV_MASK (0x7f << 0) 88c595713dSTony Lindgren 89c595713dSTony Lindgren /* CM_CLKSEL2_PLL_IVA2 */ 90c595713dSTony Lindgren #define OMAP3430_IVA2_DPLL_CLKOUT_DIV_SHIFT 0 91c595713dSTony Lindgren #define OMAP3430_IVA2_DPLL_CLKOUT_DIV_MASK (0x1f << 0) 92c595713dSTony Lindgren 93c595713dSTony Lindgren /* CM_CLKSTCTRL_IVA2 */ 94c595713dSTony Lindgren #define OMAP3430_CLKTRCTRL_IVA2_SHIFT 0 95c595713dSTony Lindgren #define OMAP3430_CLKTRCTRL_IVA2_MASK (0x3 << 0) 96c595713dSTony Lindgren 97c595713dSTony Lindgren /* CM_CLKSTST_IVA2 */ 98801954d3SPaul Walmsley #define OMAP3430_CLKACTIVITY_IVA2_SHIFT 0 99801954d3SPaul Walmsley #define OMAP3430_CLKACTIVITY_IVA2_MASK (1 << 0) 100c595713dSTony Lindgren 101c595713dSTony Lindgren /* CM_REVISION specific bits */ 102c595713dSTony Lindgren 103c595713dSTony Lindgren /* CM_SYSCONFIG specific bits */ 104c595713dSTony Lindgren 105c595713dSTony Lindgren /* CM_CLKEN_PLL_MPU */ 106c595713dSTony Lindgren #define OMAP3430_MPU_DPLL_RAMPTIME_SHIFT 8 107c595713dSTony Lindgren #define OMAP3430_MPU_DPLL_RAMPTIME_MASK (0x3 << 8) 108c595713dSTony Lindgren #define OMAP3430_MPU_DPLL_FREQSEL_SHIFT 4 109c595713dSTony Lindgren #define OMAP3430_MPU_DPLL_FREQSEL_MASK (0xf << 4) 110c595713dSTony Lindgren #define OMAP3430_EN_MPU_DPLL_DRIFTGUARD_SHIFT 3 111c595713dSTony Lindgren #define OMAP3430_EN_MPU_DPLL_DRIFTGUARD_MASK (1 << 3) 112c595713dSTony Lindgren #define OMAP3430_EN_MPU_DPLL_SHIFT 0 113c595713dSTony Lindgren #define OMAP3430_EN_MPU_DPLL_MASK (0x7 << 0) 114c595713dSTony Lindgren 115c595713dSTony Lindgren /* CM_IDLEST_MPU */ 1162bc4ef71SPaul Walmsley #define OMAP3430_ST_MPU_MASK (1 << 0) 117c595713dSTony Lindgren 118c595713dSTony Lindgren /* CM_IDLEST_PLL_MPU */ 119542313ccSPaul Walmsley #define OMAP3430_ST_MPU_CLK_SHIFT 0 1203760d31fSRoman Tereshonkov #define OMAP3430_ST_MPU_CLK_MASK (1 << 0) 121c595713dSTony Lindgren 122c595713dSTony Lindgren /* CM_AUTOIDLE_PLL_MPU */ 123c595713dSTony Lindgren #define OMAP3430_AUTO_MPU_DPLL_SHIFT 0 124c595713dSTony Lindgren #define OMAP3430_AUTO_MPU_DPLL_MASK (0x7 << 0) 125c595713dSTony Lindgren 126c595713dSTony Lindgren /* CM_CLKSEL1_PLL_MPU */ 127c595713dSTony Lindgren #define OMAP3430_MPU_CLK_SRC_SHIFT 19 1284e68f5a7SRajendra Nayak #define OMAP3430_MPU_CLK_SRC_MASK (0x7 << 19) 129c595713dSTony Lindgren #define OMAP3430_MPU_DPLL_MULT_SHIFT 8 130c595713dSTony Lindgren #define OMAP3430_MPU_DPLL_MULT_MASK (0x7ff << 8) 131c595713dSTony Lindgren #define OMAP3430_MPU_DPLL_DIV_SHIFT 0 132c595713dSTony Lindgren #define OMAP3430_MPU_DPLL_DIV_MASK (0x7f << 0) 133c595713dSTony Lindgren 134c595713dSTony Lindgren /* CM_CLKSEL2_PLL_MPU */ 135c595713dSTony Lindgren #define OMAP3430_MPU_DPLL_CLKOUT_DIV_SHIFT 0 136c595713dSTony Lindgren #define OMAP3430_MPU_DPLL_CLKOUT_DIV_MASK (0x1f << 0) 137c595713dSTony Lindgren 138c595713dSTony Lindgren /* CM_CLKSTCTRL_MPU */ 139c595713dSTony Lindgren #define OMAP3430_CLKTRCTRL_MPU_SHIFT 0 140c595713dSTony Lindgren #define OMAP3430_CLKTRCTRL_MPU_MASK (0x3 << 0) 141c595713dSTony Lindgren 142c595713dSTony Lindgren /* CM_CLKSTST_MPU */ 143801954d3SPaul Walmsley #define OMAP3430_CLKACTIVITY_MPU_SHIFT 0 144801954d3SPaul Walmsley #define OMAP3430_CLKACTIVITY_MPU_MASK (1 << 0) 145c595713dSTony Lindgren 146c595713dSTony Lindgren /* CM_FCLKEN1_CORE specific bits */ 1472bc4ef71SPaul Walmsley #define OMAP3430_EN_MODEM_MASK (1 << 31) 1488111b221SKevin Hilman #define OMAP3430_EN_MODEM_SHIFT 31 149c595713dSTony Lindgren 150c595713dSTony Lindgren /* CM_ICLKEN1_CORE specific bits */ 1512bc4ef71SPaul Walmsley #define OMAP3430_EN_ICR_MASK (1 << 29) 152c595713dSTony Lindgren #define OMAP3430_EN_ICR_SHIFT 29 1532bc4ef71SPaul Walmsley #define OMAP3430_EN_AES2_MASK (1 << 28) 154c595713dSTony Lindgren #define OMAP3430_EN_AES2_SHIFT 28 1552bc4ef71SPaul Walmsley #define OMAP3430_EN_SHA12_MASK (1 << 27) 156c595713dSTony Lindgren #define OMAP3430_EN_SHA12_SHIFT 27 1572bc4ef71SPaul Walmsley #define OMAP3430_EN_DES2_MASK (1 << 26) 158c595713dSTony Lindgren #define OMAP3430_EN_DES2_SHIFT 26 1592bc4ef71SPaul Walmsley #define OMAP3430ES1_EN_FAC_MASK (1 << 8) 160c595713dSTony Lindgren #define OMAP3430ES1_EN_FAC_SHIFT 8 1612bc4ef71SPaul Walmsley #define OMAP3430_EN_MAILBOXES_MASK (1 << 7) 162c595713dSTony Lindgren #define OMAP3430_EN_MAILBOXES_SHIFT 7 1632bc4ef71SPaul Walmsley #define OMAP3430_EN_OMAPCTRL_MASK (1 << 6) 164c595713dSTony Lindgren #define OMAP3430_EN_OMAPCTRL_SHIFT 6 1652bc4ef71SPaul Walmsley #define OMAP3430_EN_SAD2D_MASK (1 << 3) 1668111b221SKevin Hilman #define OMAP3430_EN_SAD2D_SHIFT 3 1672bc4ef71SPaul Walmsley #define OMAP3430_EN_SDRC_MASK (1 << 1) 168c595713dSTony Lindgren #define OMAP3430_EN_SDRC_SHIFT 1 169c595713dSTony Lindgren 1703cc4a2fcSRanjith Lohithakshan /* AM35XX specific CM_ICLKEN1_CORE bits */ 1713cc4a2fcSRanjith Lohithakshan #define AM35XX_EN_IPSS_MASK (1 << 4) 1723cc4a2fcSRanjith Lohithakshan #define AM35XX_EN_IPSS_SHIFT 4 1733cc4a2fcSRanjith Lohithakshan 174c595713dSTony Lindgren /* CM_ICLKEN2_CORE */ 1752bc4ef71SPaul Walmsley #define OMAP3430_EN_PKA_MASK (1 << 4) 176c595713dSTony Lindgren #define OMAP3430_EN_PKA_SHIFT 4 1772bc4ef71SPaul Walmsley #define OMAP3430_EN_AES1_MASK (1 << 3) 178c595713dSTony Lindgren #define OMAP3430_EN_AES1_SHIFT 3 1792bc4ef71SPaul Walmsley #define OMAP3430_EN_RNG_MASK (1 << 2) 180c595713dSTony Lindgren #define OMAP3430_EN_RNG_SHIFT 2 1812bc4ef71SPaul Walmsley #define OMAP3430_EN_SHA11_MASK (1 << 1) 182c595713dSTony Lindgren #define OMAP3430_EN_SHA11_SHIFT 1 1832bc4ef71SPaul Walmsley #define OMAP3430_EN_DES1_MASK (1 << 0) 184c595713dSTony Lindgren #define OMAP3430_EN_DES1_SHIFT 0 185c595713dSTony Lindgren 1868111b221SKevin Hilman /* CM_ICLKEN3_CORE */ 1878111b221SKevin Hilman #define OMAP3430_EN_MAD2D_SHIFT 3 1882bc4ef71SPaul Walmsley #define OMAP3430_EN_MAD2D_MASK (1 << 3) 1898111b221SKevin Hilman 190c595713dSTony Lindgren /* CM_FCLKEN3_CORE specific bits */ 191c595713dSTony Lindgren #define OMAP3430ES2_EN_TS_SHIFT 1 192c595713dSTony Lindgren #define OMAP3430ES2_EN_TS_MASK (1 << 1) 193c595713dSTony Lindgren #define OMAP3430ES2_EN_CPEFUSE_SHIFT 0 194c595713dSTony Lindgren #define OMAP3430ES2_EN_CPEFUSE_MASK (1 << 0) 195c595713dSTony Lindgren 196c595713dSTony Lindgren /* CM_IDLEST1_CORE specific bits */ 197da0747d4SPaul Walmsley #define OMAP3430ES2_ST_MMC3_SHIFT 30 198da0747d4SPaul Walmsley #define OMAP3430ES2_ST_MMC3_MASK (1 << 30) 199da0747d4SPaul Walmsley #define OMAP3430_ST_ICR_SHIFT 29 200da0747d4SPaul Walmsley #define OMAP3430_ST_ICR_MASK (1 << 29) 201da0747d4SPaul Walmsley #define OMAP3430_ST_AES2_SHIFT 28 202da0747d4SPaul Walmsley #define OMAP3430_ST_AES2_MASK (1 << 28) 203da0747d4SPaul Walmsley #define OMAP3430_ST_SHA12_SHIFT 27 204da0747d4SPaul Walmsley #define OMAP3430_ST_SHA12_MASK (1 << 27) 205da0747d4SPaul Walmsley #define OMAP3430_ST_DES2_SHIFT 26 206da0747d4SPaul Walmsley #define OMAP3430_ST_DES2_MASK (1 << 26) 207da0747d4SPaul Walmsley #define OMAP3430_ST_MSPRO_SHIFT 23 208da0747d4SPaul Walmsley #define OMAP3430_ST_MSPRO_MASK (1 << 23) 209bf765237SPaul Walmsley #define AM35XX_ST_UART4_SHIFT 23 210bf765237SPaul Walmsley #define AM35XX_ST_UART4_MASK (1 << 23) 211da0747d4SPaul Walmsley #define OMAP3430_ST_HDQ_SHIFT 22 212da0747d4SPaul Walmsley #define OMAP3430_ST_HDQ_MASK (1 << 22) 213da0747d4SPaul Walmsley #define OMAP3430ES1_ST_FAC_SHIFT 8 214da0747d4SPaul Walmsley #define OMAP3430ES1_ST_FAC_MASK (1 << 8) 215da0747d4SPaul Walmsley #define OMAP3430ES2_ST_SSI_IDLE_SHIFT 8 216da0747d4SPaul Walmsley #define OMAP3430ES2_ST_SSI_IDLE_MASK (1 << 8) 217da0747d4SPaul Walmsley #define OMAP3430_ST_MAILBOXES_SHIFT 7 218da0747d4SPaul Walmsley #define OMAP3430_ST_MAILBOXES_MASK (1 << 7) 219da0747d4SPaul Walmsley #define OMAP3430_ST_OMAPCTRL_SHIFT 6 220da0747d4SPaul Walmsley #define OMAP3430_ST_OMAPCTRL_MASK (1 << 6) 221da0747d4SPaul Walmsley #define OMAP3430_ST_SDMA_SHIFT 2 222da0747d4SPaul Walmsley #define OMAP3430_ST_SDMA_MASK (1 << 2) 223da0747d4SPaul Walmsley #define OMAP3430_ST_SDRC_SHIFT 1 224da0747d4SPaul Walmsley #define OMAP3430_ST_SDRC_MASK (1 << 1) 225da0747d4SPaul Walmsley #define OMAP3430_ST_SSI_STDBY_SHIFT 0 226da0747d4SPaul Walmsley #define OMAP3430_ST_SSI_STDBY_MASK (1 << 0) 227c595713dSTony Lindgren 2283cc4a2fcSRanjith Lohithakshan /* AM35xx specific CM_IDLEST1_CORE bits */ 2293cc4a2fcSRanjith Lohithakshan #define AM35XX_ST_IPSS_SHIFT 5 2303cc4a2fcSRanjith Lohithakshan #define AM35XX_ST_IPSS_MASK (1 << 5) 2313cc4a2fcSRanjith Lohithakshan 232c595713dSTony Lindgren /* CM_IDLEST2_CORE */ 233da0747d4SPaul Walmsley #define OMAP3430_ST_PKA_SHIFT 4 234da0747d4SPaul Walmsley #define OMAP3430_ST_PKA_MASK (1 << 4) 235da0747d4SPaul Walmsley #define OMAP3430_ST_AES1_SHIFT 3 236da0747d4SPaul Walmsley #define OMAP3430_ST_AES1_MASK (1 << 3) 237da0747d4SPaul Walmsley #define OMAP3430_ST_RNG_SHIFT 2 238da0747d4SPaul Walmsley #define OMAP3430_ST_RNG_MASK (1 << 2) 239da0747d4SPaul Walmsley #define OMAP3430_ST_SHA11_SHIFT 1 240da0747d4SPaul Walmsley #define OMAP3430_ST_SHA11_MASK (1 << 1) 241da0747d4SPaul Walmsley #define OMAP3430_ST_DES1_SHIFT 0 242da0747d4SPaul Walmsley #define OMAP3430_ST_DES1_MASK (1 << 0) 243c595713dSTony Lindgren 244c595713dSTony Lindgren /* CM_IDLEST3_CORE */ 245c595713dSTony Lindgren #define OMAP3430ES2_ST_USBTLL_SHIFT 2 246c595713dSTony Lindgren #define OMAP3430ES2_ST_USBTLL_MASK (1 << 2) 247da0747d4SPaul Walmsley #define OMAP3430ES2_ST_CPEFUSE_SHIFT 0 248da0747d4SPaul Walmsley #define OMAP3430ES2_ST_CPEFUSE_MASK (1 << 0) 249c595713dSTony Lindgren 250c595713dSTony Lindgren /* CM_AUTOIDLE1_CORE */ 2512bc4ef71SPaul Walmsley #define OMAP3430_AUTO_MODEM_MASK (1 << 31) 2528111b221SKevin Hilman #define OMAP3430_AUTO_MODEM_SHIFT 31 2532bc4ef71SPaul Walmsley #define OMAP3430ES2_AUTO_MMC3_MASK (1 << 30) 254027d8dedSJouni Hogander #define OMAP3430ES2_AUTO_MMC3_SHIFT 30 2552bc4ef71SPaul Walmsley #define OMAP3430ES2_AUTO_ICR_MASK (1 << 29) 256027d8dedSJouni Hogander #define OMAP3430ES2_AUTO_ICR_SHIFT 29 2572bc4ef71SPaul Walmsley #define OMAP3430_AUTO_AES2_MASK (1 << 28) 258c595713dSTony Lindgren #define OMAP3430_AUTO_AES2_SHIFT 28 2592bc4ef71SPaul Walmsley #define OMAP3430_AUTO_SHA12_MASK (1 << 27) 260c595713dSTony Lindgren #define OMAP3430_AUTO_SHA12_SHIFT 27 2612bc4ef71SPaul Walmsley #define OMAP3430_AUTO_DES2_MASK (1 << 26) 262c595713dSTony Lindgren #define OMAP3430_AUTO_DES2_SHIFT 26 2632bc4ef71SPaul Walmsley #define OMAP3430_AUTO_MMC2_MASK (1 << 25) 264c595713dSTony Lindgren #define OMAP3430_AUTO_MMC2_SHIFT 25 2652bc4ef71SPaul Walmsley #define OMAP3430_AUTO_MMC1_MASK (1 << 24) 266c595713dSTony Lindgren #define OMAP3430_AUTO_MMC1_SHIFT 24 2672bc4ef71SPaul Walmsley #define OMAP3430_AUTO_MSPRO_MASK (1 << 23) 268c595713dSTony Lindgren #define OMAP3430_AUTO_MSPRO_SHIFT 23 2692bc4ef71SPaul Walmsley #define OMAP3430_AUTO_HDQ_MASK (1 << 22) 270c595713dSTony Lindgren #define OMAP3430_AUTO_HDQ_SHIFT 22 2712bc4ef71SPaul Walmsley #define OMAP3430_AUTO_MCSPI4_MASK (1 << 21) 272c595713dSTony Lindgren #define OMAP3430_AUTO_MCSPI4_SHIFT 21 2732bc4ef71SPaul Walmsley #define OMAP3430_AUTO_MCSPI3_MASK (1 << 20) 274c595713dSTony Lindgren #define OMAP3430_AUTO_MCSPI3_SHIFT 20 2752bc4ef71SPaul Walmsley #define OMAP3430_AUTO_MCSPI2_MASK (1 << 19) 276c595713dSTony Lindgren #define OMAP3430_AUTO_MCSPI2_SHIFT 19 2772bc4ef71SPaul Walmsley #define OMAP3430_AUTO_MCSPI1_MASK (1 << 18) 278c595713dSTony Lindgren #define OMAP3430_AUTO_MCSPI1_SHIFT 18 2792bc4ef71SPaul Walmsley #define OMAP3430_AUTO_I2C3_MASK (1 << 17) 280c595713dSTony Lindgren #define OMAP3430_AUTO_I2C3_SHIFT 17 2812bc4ef71SPaul Walmsley #define OMAP3430_AUTO_I2C2_MASK (1 << 16) 282c595713dSTony Lindgren #define OMAP3430_AUTO_I2C2_SHIFT 16 2832bc4ef71SPaul Walmsley #define OMAP3430_AUTO_I2C1_MASK (1 << 15) 284c595713dSTony Lindgren #define OMAP3430_AUTO_I2C1_SHIFT 15 2852bc4ef71SPaul Walmsley #define OMAP3430_AUTO_UART2_MASK (1 << 14) 286c595713dSTony Lindgren #define OMAP3430_AUTO_UART2_SHIFT 14 2872bc4ef71SPaul Walmsley #define OMAP3430_AUTO_UART1_MASK (1 << 13) 288c595713dSTony Lindgren #define OMAP3430_AUTO_UART1_SHIFT 13 2892bc4ef71SPaul Walmsley #define OMAP3430_AUTO_GPT11_MASK (1 << 12) 290c595713dSTony Lindgren #define OMAP3430_AUTO_GPT11_SHIFT 12 2912bc4ef71SPaul Walmsley #define OMAP3430_AUTO_GPT10_MASK (1 << 11) 292c595713dSTony Lindgren #define OMAP3430_AUTO_GPT10_SHIFT 11 2932bc4ef71SPaul Walmsley #define OMAP3430_AUTO_MCBSP5_MASK (1 << 10) 294c595713dSTony Lindgren #define OMAP3430_AUTO_MCBSP5_SHIFT 10 2952bc4ef71SPaul Walmsley #define OMAP3430_AUTO_MCBSP1_MASK (1 << 9) 296c595713dSTony Lindgren #define OMAP3430_AUTO_MCBSP1_SHIFT 9 2972bc4ef71SPaul Walmsley #define OMAP3430ES1_AUTO_FAC_MASK (1 << 8) 298c595713dSTony Lindgren #define OMAP3430ES1_AUTO_FAC_SHIFT 8 2992bc4ef71SPaul Walmsley #define OMAP3430_AUTO_MAILBOXES_MASK (1 << 7) 300c595713dSTony Lindgren #define OMAP3430_AUTO_MAILBOXES_SHIFT 7 3012bc4ef71SPaul Walmsley #define OMAP3430_AUTO_OMAPCTRL_MASK (1 << 6) 302c595713dSTony Lindgren #define OMAP3430_AUTO_OMAPCTRL_SHIFT 6 3032bc4ef71SPaul Walmsley #define OMAP3430ES1_AUTO_FSHOSTUSB_MASK (1 << 5) 304c595713dSTony Lindgren #define OMAP3430ES1_AUTO_FSHOSTUSB_SHIFT 5 3052bc4ef71SPaul Walmsley #define OMAP3430_AUTO_HSOTGUSB_MASK (1 << 4) 306c595713dSTony Lindgren #define OMAP3430_AUTO_HSOTGUSB_SHIFT 4 3072bc4ef71SPaul Walmsley #define OMAP3430ES1_AUTO_D2D_MASK (1 << 3) 308c595713dSTony Lindgren #define OMAP3430ES1_AUTO_D2D_SHIFT 3 3092bc4ef71SPaul Walmsley #define OMAP3430_AUTO_SAD2D_MASK (1 << 3) 3108111b221SKevin Hilman #define OMAP3430_AUTO_SAD2D_SHIFT 3 3112bc4ef71SPaul Walmsley #define OMAP3430_AUTO_SSI_MASK (1 << 0) 312c595713dSTony Lindgren #define OMAP3430_AUTO_SSI_SHIFT 0 313c595713dSTony Lindgren 314c595713dSTony Lindgren /* CM_AUTOIDLE2_CORE */ 3152bc4ef71SPaul Walmsley #define OMAP3430_AUTO_PKA_MASK (1 << 4) 316c595713dSTony Lindgren #define OMAP3430_AUTO_PKA_SHIFT 4 3172bc4ef71SPaul Walmsley #define OMAP3430_AUTO_AES1_MASK (1 << 3) 318c595713dSTony Lindgren #define OMAP3430_AUTO_AES1_SHIFT 3 3192bc4ef71SPaul Walmsley #define OMAP3430_AUTO_RNG_MASK (1 << 2) 320c595713dSTony Lindgren #define OMAP3430_AUTO_RNG_SHIFT 2 3212bc4ef71SPaul Walmsley #define OMAP3430_AUTO_SHA11_MASK (1 << 1) 322c595713dSTony Lindgren #define OMAP3430_AUTO_SHA11_SHIFT 1 3232bc4ef71SPaul Walmsley #define OMAP3430_AUTO_DES1_MASK (1 << 0) 324c595713dSTony Lindgren #define OMAP3430_AUTO_DES1_SHIFT 0 325c595713dSTony Lindgren 326c595713dSTony Lindgren /* CM_AUTOIDLE3_CORE */ 327027d8dedSJouni Hogander #define OMAP3430ES2_AUTO_USBHOST (1 << 0) 328027d8dedSJouni Hogander #define OMAP3430ES2_AUTO_USBHOST_SHIFT 0 329027d8dedSJouni Hogander #define OMAP3430ES2_AUTO_USBTLL (1 << 2) 330c595713dSTony Lindgren #define OMAP3430ES2_AUTO_USBTLL_SHIFT 2 331c595713dSTony Lindgren #define OMAP3430ES2_AUTO_USBTLL_MASK (1 << 2) 3328111b221SKevin Hilman #define OMAP3430_AUTO_MAD2D_SHIFT 3 3332bc4ef71SPaul Walmsley #define OMAP3430_AUTO_MAD2D_MASK (1 << 3) 334c595713dSTony Lindgren 335c595713dSTony Lindgren /* CM_CLKSEL_CORE */ 336c595713dSTony Lindgren #define OMAP3430_CLKSEL_SSI_SHIFT 8 337c595713dSTony Lindgren #define OMAP3430_CLKSEL_SSI_MASK (0xf << 8) 338c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT11_MASK (1 << 7) 339c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT11_SHIFT 7 340c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT10_MASK (1 << 6) 341c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT10_SHIFT 6 342c595713dSTony Lindgren #define OMAP3430ES1_CLKSEL_FSHOSTUSB_SHIFT 4 343c595713dSTony Lindgren #define OMAP3430ES1_CLKSEL_FSHOSTUSB_MASK (0x3 << 4) 344c595713dSTony Lindgren #define OMAP3430_CLKSEL_L4_SHIFT 2 345c595713dSTony Lindgren #define OMAP3430_CLKSEL_L4_MASK (0x3 << 2) 346c595713dSTony Lindgren #define OMAP3430_CLKSEL_L3_SHIFT 0 347c595713dSTony Lindgren #define OMAP3430_CLKSEL_L3_MASK (0x3 << 0) 3487356f0b2SVishwanath BS #define OMAP3630_CLKSEL_96M_SHIFT 12 3497356f0b2SVishwanath BS #define OMAP3630_CLKSEL_96M_MASK (0x3 << 12) 350c595713dSTony Lindgren 351c595713dSTony Lindgren /* CM_CLKSTCTRL_CORE */ 352c595713dSTony Lindgren #define OMAP3430ES1_CLKTRCTRL_D2D_SHIFT 4 353c595713dSTony Lindgren #define OMAP3430ES1_CLKTRCTRL_D2D_MASK (0x3 << 4) 354c595713dSTony Lindgren #define OMAP3430_CLKTRCTRL_L4_SHIFT 2 355c595713dSTony Lindgren #define OMAP3430_CLKTRCTRL_L4_MASK (0x3 << 2) 356c595713dSTony Lindgren #define OMAP3430_CLKTRCTRL_L3_SHIFT 0 357c595713dSTony Lindgren #define OMAP3430_CLKTRCTRL_L3_MASK (0x3 << 0) 358c595713dSTony Lindgren 359c595713dSTony Lindgren /* CM_CLKSTST_CORE */ 360801954d3SPaul Walmsley #define OMAP3430ES1_CLKACTIVITY_D2D_SHIFT 2 361801954d3SPaul Walmsley #define OMAP3430ES1_CLKACTIVITY_D2D_MASK (1 << 2) 362801954d3SPaul Walmsley #define OMAP3430_CLKACTIVITY_L4_SHIFT 1 363801954d3SPaul Walmsley #define OMAP3430_CLKACTIVITY_L4_MASK (1 << 1) 364801954d3SPaul Walmsley #define OMAP3430_CLKACTIVITY_L3_SHIFT 0 365801954d3SPaul Walmsley #define OMAP3430_CLKACTIVITY_L3_MASK (1 << 0) 366c595713dSTony Lindgren 367c595713dSTony Lindgren /* CM_FCLKEN_GFX */ 3682bc4ef71SPaul Walmsley #define OMAP3430ES1_EN_3D_MASK (1 << 2) 369c595713dSTony Lindgren #define OMAP3430ES1_EN_3D_SHIFT 2 3702bc4ef71SPaul Walmsley #define OMAP3430ES1_EN_2D_MASK (1 << 1) 371c595713dSTony Lindgren #define OMAP3430ES1_EN_2D_SHIFT 1 372c595713dSTony Lindgren 373c595713dSTony Lindgren /* CM_ICLKEN_GFX specific bits */ 374c595713dSTony Lindgren 375c595713dSTony Lindgren /* CM_IDLEST_GFX specific bits */ 376c595713dSTony Lindgren 377c595713dSTony Lindgren /* CM_CLKSEL_GFX specific bits */ 378c595713dSTony Lindgren 379c595713dSTony Lindgren /* CM_SLEEPDEP_GFX specific bits */ 380c595713dSTony Lindgren 381c595713dSTony Lindgren /* CM_CLKSTCTRL_GFX */ 382c595713dSTony Lindgren #define OMAP3430ES1_CLKTRCTRL_GFX_SHIFT 0 383c595713dSTony Lindgren #define OMAP3430ES1_CLKTRCTRL_GFX_MASK (0x3 << 0) 384c595713dSTony Lindgren 385c595713dSTony Lindgren /* CM_CLKSTST_GFX */ 386801954d3SPaul Walmsley #define OMAP3430ES1_CLKACTIVITY_GFX_SHIFT 0 387801954d3SPaul Walmsley #define OMAP3430ES1_CLKACTIVITY_GFX_MASK (1 << 0) 388c595713dSTony Lindgren 389c595713dSTony Lindgren /* CM_FCLKEN_SGX */ 390712d7c86SDaniel Stone #define OMAP3430ES2_CM_FCLKEN_SGX_EN_SGX_SHIFT 1 391712d7c86SDaniel Stone #define OMAP3430ES2_CM_FCLKEN_SGX_EN_SGX_MASK (1 << 1) 392712d7c86SDaniel Stone 393b024b542STero Kristo /* CM_IDLEST_SGX */ 394b024b542STero Kristo #define OMAP3430ES2_ST_SGX_SHIFT 1 395b024b542STero Kristo #define OMAP3430ES2_ST_SGX_MASK (1 << 1) 396b024b542STero Kristo 397712d7c86SDaniel Stone /* CM_ICLKEN_SGX */ 398712d7c86SDaniel Stone #define OMAP3430ES2_CM_ICLKEN_SGX_EN_SGX_SHIFT 0 399712d7c86SDaniel Stone #define OMAP3430ES2_CM_ICLKEN_SGX_EN_SGX_MASK (1 << 0) 400c595713dSTony Lindgren 401c595713dSTony Lindgren /* CM_CLKSEL_SGX */ 402c595713dSTony Lindgren #define OMAP3430ES2_CLKSEL_SGX_SHIFT 0 403c595713dSTony Lindgren #define OMAP3430ES2_CLKSEL_SGX_MASK (0x7 << 0) 404c595713dSTony Lindgren 405801954d3SPaul Walmsley /* CM_CLKSTCTRL_SGX */ 406801954d3SPaul Walmsley #define OMAP3430ES2_CLKTRCTRL_SGX_SHIFT 0 407801954d3SPaul Walmsley #define OMAP3430ES2_CLKTRCTRL_SGX_MASK (0x3 << 0) 408801954d3SPaul Walmsley 409801954d3SPaul Walmsley /* CM_CLKSTST_SGX */ 410801954d3SPaul Walmsley #define OMAP3430ES2_CLKACTIVITY_SGX_SHIFT 0 411801954d3SPaul Walmsley #define OMAP3430ES2_CLKACTIVITY_SGX_MASK (1 << 0) 412801954d3SPaul Walmsley 413c595713dSTony Lindgren /* CM_FCLKEN_WKUP specific bits */ 414c595713dSTony Lindgren #define OMAP3430ES2_EN_USIMOCP_SHIFT 9 415da0747d4SPaul Walmsley #define OMAP3430ES2_EN_USIMOCP_MASK (1 << 9) 416c595713dSTony Lindgren 417c595713dSTony Lindgren /* CM_ICLKEN_WKUP specific bits */ 4182bc4ef71SPaul Walmsley #define OMAP3430_EN_WDT1_MASK (1 << 4) 419c595713dSTony Lindgren #define OMAP3430_EN_WDT1_SHIFT 4 4202bc4ef71SPaul Walmsley #define OMAP3430_EN_32KSYNC_MASK (1 << 2) 421c595713dSTony Lindgren #define OMAP3430_EN_32KSYNC_SHIFT 2 422c595713dSTony Lindgren 423c595713dSTony Lindgren /* CM_IDLEST_WKUP specific bits */ 424da0747d4SPaul Walmsley #define OMAP3430ES2_ST_USIMOCP_SHIFT 9 425da0747d4SPaul Walmsley #define OMAP3430ES2_ST_USIMOCP_MASK (1 << 9) 426da0747d4SPaul Walmsley #define OMAP3430_ST_WDT2_SHIFT 5 427da0747d4SPaul Walmsley #define OMAP3430_ST_WDT2_MASK (1 << 5) 428da0747d4SPaul Walmsley #define OMAP3430_ST_WDT1_SHIFT 4 429da0747d4SPaul Walmsley #define OMAP3430_ST_WDT1_MASK (1 << 4) 430da0747d4SPaul Walmsley #define OMAP3430_ST_32KSYNC_SHIFT 2 431da0747d4SPaul Walmsley #define OMAP3430_ST_32KSYNC_MASK (1 << 2) 432c595713dSTony Lindgren 433c595713dSTony Lindgren /* CM_AUTOIDLE_WKUP */ 4342bc4ef71SPaul Walmsley #define OMAP3430ES2_AUTO_USIMOCP_MASK (1 << 9) 435da0747d4SPaul Walmsley #define OMAP3430ES2_AUTO_USIMOCP_SHIFT 9 4362bc4ef71SPaul Walmsley #define OMAP3430_AUTO_WDT2_MASK (1 << 5) 437c595713dSTony Lindgren #define OMAP3430_AUTO_WDT2_SHIFT 5 4382bc4ef71SPaul Walmsley #define OMAP3430_AUTO_WDT1_MASK (1 << 4) 439c595713dSTony Lindgren #define OMAP3430_AUTO_WDT1_SHIFT 4 4402bc4ef71SPaul Walmsley #define OMAP3430_AUTO_GPIO1_MASK (1 << 3) 441c595713dSTony Lindgren #define OMAP3430_AUTO_GPIO1_SHIFT 3 4422bc4ef71SPaul Walmsley #define OMAP3430_AUTO_32KSYNC_MASK (1 << 2) 443c595713dSTony Lindgren #define OMAP3430_AUTO_32KSYNC_SHIFT 2 4442bc4ef71SPaul Walmsley #define OMAP3430_AUTO_GPT12_MASK (1 << 1) 445c595713dSTony Lindgren #define OMAP3430_AUTO_GPT12_SHIFT 1 4462bc4ef71SPaul Walmsley #define OMAP3430_AUTO_GPT1_MASK (1 << 0) 447c595713dSTony Lindgren #define OMAP3430_AUTO_GPT1_SHIFT 0 448c595713dSTony Lindgren 449c595713dSTony Lindgren /* CM_CLKSEL_WKUP */ 450c595713dSTony Lindgren #define OMAP3430ES2_CLKSEL_USIMOCP_MASK (0xf << 3) 451c595713dSTony Lindgren #define OMAP3430_CLKSEL_RM_SHIFT 1 452c595713dSTony Lindgren #define OMAP3430_CLKSEL_RM_MASK (0x3 << 1) 453c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT1_SHIFT 0 454c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT1_MASK (1 << 0) 455c595713dSTony Lindgren 456c595713dSTony Lindgren /* CM_CLKEN_PLL */ 457c595713dSTony Lindgren #define OMAP3430_PWRDN_EMU_PERIPH_SHIFT 31 458c595713dSTony Lindgren #define OMAP3430_PWRDN_CAM_SHIFT 30 459c595713dSTony Lindgren #define OMAP3430_PWRDN_DSS1_SHIFT 29 460c595713dSTony Lindgren #define OMAP3430_PWRDN_TV_SHIFT 28 461c595713dSTony Lindgren #define OMAP3430_PWRDN_96M_SHIFT 27 462c595713dSTony Lindgren #define OMAP3430_PERIPH_DPLL_RAMPTIME_SHIFT 24 463c595713dSTony Lindgren #define OMAP3430_PERIPH_DPLL_RAMPTIME_MASK (0x3 << 24) 464c595713dSTony Lindgren #define OMAP3430_PERIPH_DPLL_FREQSEL_SHIFT 20 465c595713dSTony Lindgren #define OMAP3430_PERIPH_DPLL_FREQSEL_MASK (0xf << 20) 466c595713dSTony Lindgren #define OMAP3430_EN_PERIPH_DPLL_DRIFTGUARD_SHIFT 19 467c595713dSTony Lindgren #define OMAP3430_EN_PERIPH_DPLL_DRIFTGUARD_MASK (1 << 19) 468c595713dSTony Lindgren #define OMAP3430_EN_PERIPH_DPLL_SHIFT 16 469c595713dSTony Lindgren #define OMAP3430_EN_PERIPH_DPLL_MASK (0x7 << 16) 470c595713dSTony Lindgren #define OMAP3430_PWRDN_EMU_CORE_SHIFT 12 471c595713dSTony Lindgren #define OMAP3430_CORE_DPLL_RAMPTIME_SHIFT 8 472c595713dSTony Lindgren #define OMAP3430_CORE_DPLL_RAMPTIME_MASK (0x3 << 8) 473c595713dSTony Lindgren #define OMAP3430_CORE_DPLL_FREQSEL_SHIFT 4 474c595713dSTony Lindgren #define OMAP3430_CORE_DPLL_FREQSEL_MASK (0xf << 4) 475c595713dSTony Lindgren #define OMAP3430_EN_CORE_DPLL_DRIFTGUARD_SHIFT 3 476c595713dSTony Lindgren #define OMAP3430_EN_CORE_DPLL_DRIFTGUARD_MASK (1 << 3) 477c595713dSTony Lindgren #define OMAP3430_EN_CORE_DPLL_SHIFT 0 478c595713dSTony Lindgren #define OMAP3430_EN_CORE_DPLL_MASK (0x7 << 0) 479c595713dSTony Lindgren 480c595713dSTony Lindgren /* CM_CLKEN2_PLL */ 481c595713dSTony Lindgren #define OMAP3430ES2_EN_PERIPH2_DPLL_LPMODE_SHIFT 10 482c595713dSTony Lindgren #define OMAP3430ES2_PERIPH2_DPLL_RAMPTIME_MASK (0x3 << 8) 483c595713dSTony Lindgren #define OMAP3430ES2_PERIPH2_DPLL_FREQSEL_SHIFT 4 484c595713dSTony Lindgren #define OMAP3430ES2_PERIPH2_DPLL_FREQSEL_MASK (0xf << 4) 485c595713dSTony Lindgren #define OMAP3430ES2_EN_PERIPH2_DPLL_DRIFTGUARD_SHIFT 3 486c595713dSTony Lindgren #define OMAP3430ES2_EN_PERIPH2_DPLL_SHIFT 0 487c595713dSTony Lindgren #define OMAP3430ES2_EN_PERIPH2_DPLL_MASK (0x7 << 0) 488c595713dSTony Lindgren 489c595713dSTony Lindgren /* CM_IDLEST_CKGEN */ 4902bc4ef71SPaul Walmsley #define OMAP3430_ST_54M_CLK_MASK (1 << 5) 4912bc4ef71SPaul Walmsley #define OMAP3430_ST_12M_CLK_MASK (1 << 4) 4922bc4ef71SPaul Walmsley #define OMAP3430_ST_48M_CLK_MASK (1 << 3) 4932bc4ef71SPaul Walmsley #define OMAP3430_ST_96M_CLK_MASK (1 << 2) 494542313ccSPaul Walmsley #define OMAP3430_ST_PERIPH_CLK_SHIFT 1 495542313ccSPaul Walmsley #define OMAP3430_ST_PERIPH_CLK_MASK (1 << 1) 496542313ccSPaul Walmsley #define OMAP3430_ST_CORE_CLK_SHIFT 0 497542313ccSPaul Walmsley #define OMAP3430_ST_CORE_CLK_MASK (1 << 0) 498c595713dSTony Lindgren 499c595713dSTony Lindgren /* CM_IDLEST2_CKGEN */ 500da0747d4SPaul Walmsley #define OMAP3430ES2_ST_USIM_CLK_SHIFT 2 501da0747d4SPaul Walmsley #define OMAP3430ES2_ST_USIM_CLK_MASK (1 << 2) 502c595713dSTony Lindgren #define OMAP3430ES2_ST_120M_CLK_SHIFT 1 503c595713dSTony Lindgren #define OMAP3430ES2_ST_120M_CLK_MASK (1 << 1) 504c595713dSTony Lindgren #define OMAP3430ES2_ST_PERIPH2_CLK_SHIFT 0 505c595713dSTony Lindgren #define OMAP3430ES2_ST_PERIPH2_CLK_MASK (1 << 0) 506c595713dSTony Lindgren 507c595713dSTony Lindgren /* CM_AUTOIDLE_PLL */ 508c595713dSTony Lindgren #define OMAP3430_AUTO_PERIPH_DPLL_SHIFT 3 509c595713dSTony Lindgren #define OMAP3430_AUTO_PERIPH_DPLL_MASK (0x7 << 3) 510c595713dSTony Lindgren #define OMAP3430_AUTO_CORE_DPLL_SHIFT 0 511c595713dSTony Lindgren #define OMAP3430_AUTO_CORE_DPLL_MASK (0x7 << 0) 512c595713dSTony Lindgren 513542313ccSPaul Walmsley /* CM_AUTOIDLE2_PLL */ 514542313ccSPaul Walmsley #define OMAP3430ES2_AUTO_PERIPH2_DPLL_SHIFT 0 515542313ccSPaul Walmsley #define OMAP3430ES2_AUTO_PERIPH2_DPLL_MASK (0x7 << 0) 516542313ccSPaul Walmsley 517c595713dSTony Lindgren /* CM_CLKSEL1_PLL */ 518c595713dSTony Lindgren /* Note that OMAP3430_CORE_DPLL_CLKOUT_DIV_MASK was (0x3 << 27) on 3430ES1 */ 519c595713dSTony Lindgren #define OMAP3430_CORE_DPLL_CLKOUT_DIV_SHIFT 27 520c595713dSTony Lindgren #define OMAP3430_CORE_DPLL_CLKOUT_DIV_MASK (0x1f << 27) 521c595713dSTony Lindgren #define OMAP3430_CORE_DPLL_MULT_SHIFT 16 522c595713dSTony Lindgren #define OMAP3430_CORE_DPLL_MULT_MASK (0x7ff << 16) 523c595713dSTony Lindgren #define OMAP3430_CORE_DPLL_DIV_SHIFT 8 524c595713dSTony Lindgren #define OMAP3430_CORE_DPLL_DIV_MASK (0x7f << 8) 5259cfd985eSPaul Walmsley #define OMAP3430_SOURCE_96M_SHIFT 6 5269cfd985eSPaul Walmsley #define OMAP3430_SOURCE_96M_MASK (1 << 6) 5279cfd985eSPaul Walmsley #define OMAP3430_SOURCE_54M_SHIFT 5 5289cfd985eSPaul Walmsley #define OMAP3430_SOURCE_54M_MASK (1 << 5) 5299cfd985eSPaul Walmsley #define OMAP3430_SOURCE_48M_SHIFT 3 5309cfd985eSPaul Walmsley #define OMAP3430_SOURCE_48M_MASK (1 << 3) 531c595713dSTony Lindgren 532c595713dSTony Lindgren /* CM_CLKSEL2_PLL */ 533c595713dSTony Lindgren #define OMAP3430_PERIPH_DPLL_MULT_SHIFT 8 534c595713dSTony Lindgren #define OMAP3430_PERIPH_DPLL_MULT_MASK (0x7ff << 8) 535358965d7SRichard Woodruff #define OMAP3630_PERIPH_DPLL_MULT_MASK (0xfff << 8) 536c595713dSTony Lindgren #define OMAP3430_PERIPH_DPLL_DIV_SHIFT 0 537c595713dSTony Lindgren #define OMAP3430_PERIPH_DPLL_DIV_MASK (0x7f << 0) 538358965d7SRichard Woodruff #define OMAP3630_PERIPH_DPLL_DCO_SEL_SHIFT 21 539358965d7SRichard Woodruff #define OMAP3630_PERIPH_DPLL_DCO_SEL_MASK (0x7 << 21) 540358965d7SRichard Woodruff #define OMAP3630_PERIPH_DPLL_SD_DIV_SHIFT 24 541358965d7SRichard Woodruff #define OMAP3630_PERIPH_DPLL_SD_DIV_MASK (0xff << 24) 542c595713dSTony Lindgren 543c595713dSTony Lindgren /* CM_CLKSEL3_PLL */ 544c595713dSTony Lindgren #define OMAP3430_DIV_96M_SHIFT 0 545c595713dSTony Lindgren #define OMAP3430_DIV_96M_MASK (0x1f << 0) 546678bc9a2SVishwanath BS #define OMAP3630_DIV_96M_MASK (0x3f << 0) 547c595713dSTony Lindgren 548c595713dSTony Lindgren /* CM_CLKSEL4_PLL */ 549c595713dSTony Lindgren #define OMAP3430ES2_PERIPH2_DPLL_MULT_SHIFT 8 550c595713dSTony Lindgren #define OMAP3430ES2_PERIPH2_DPLL_MULT_MASK (0x7ff << 8) 551c595713dSTony Lindgren #define OMAP3430ES2_PERIPH2_DPLL_DIV_SHIFT 0 552c595713dSTony Lindgren #define OMAP3430ES2_PERIPH2_DPLL_DIV_MASK (0x7f << 0) 553c595713dSTony Lindgren 554c595713dSTony Lindgren /* CM_CLKSEL5_PLL */ 555c595713dSTony Lindgren #define OMAP3430ES2_DIV_120M_SHIFT 0 556c595713dSTony Lindgren #define OMAP3430ES2_DIV_120M_MASK (0x1f << 0) 557c595713dSTony Lindgren 558c595713dSTony Lindgren /* CM_CLKOUT_CTRL */ 559c595713dSTony Lindgren #define OMAP3430_CLKOUT2_EN_SHIFT 7 5602bc4ef71SPaul Walmsley #define OMAP3430_CLKOUT2_EN_MASK (1 << 7) 561c595713dSTony Lindgren #define OMAP3430_CLKOUT2_DIV_SHIFT 3 562c595713dSTony Lindgren #define OMAP3430_CLKOUT2_DIV_MASK (0x7 << 3) 563c595713dSTony Lindgren #define OMAP3430_CLKOUT2SOURCE_SHIFT 0 564c595713dSTony Lindgren #define OMAP3430_CLKOUT2SOURCE_MASK (0x3 << 0) 565c595713dSTony Lindgren 566c595713dSTony Lindgren /* CM_FCLKEN_DSS */ 5672bc4ef71SPaul Walmsley #define OMAP3430_EN_TV_MASK (1 << 2) 568c595713dSTony Lindgren #define OMAP3430_EN_TV_SHIFT 2 5692bc4ef71SPaul Walmsley #define OMAP3430_EN_DSS2_MASK (1 << 1) 570c595713dSTony Lindgren #define OMAP3430_EN_DSS2_SHIFT 1 5712bc4ef71SPaul Walmsley #define OMAP3430_EN_DSS1_MASK (1 << 0) 572c595713dSTony Lindgren #define OMAP3430_EN_DSS1_SHIFT 0 573c595713dSTony Lindgren 574c595713dSTony Lindgren /* CM_ICLKEN_DSS */ 5752bc4ef71SPaul Walmsley #define OMAP3430_CM_ICLKEN_DSS_EN_DSS_MASK (1 << 0) 576c595713dSTony Lindgren #define OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT 0 577c595713dSTony Lindgren 578c595713dSTony Lindgren /* CM_IDLEST_DSS */ 579da0747d4SPaul Walmsley #define OMAP3430ES2_ST_DSS_IDLE_SHIFT 1 580da0747d4SPaul Walmsley #define OMAP3430ES2_ST_DSS_IDLE_MASK (1 << 1) 581da0747d4SPaul Walmsley #define OMAP3430ES2_ST_DSS_STDBY_SHIFT 0 582da0747d4SPaul Walmsley #define OMAP3430ES2_ST_DSS_STDBY_MASK (1 << 0) 583da0747d4SPaul Walmsley #define OMAP3430ES1_ST_DSS_SHIFT 0 584da0747d4SPaul Walmsley #define OMAP3430ES1_ST_DSS_MASK (1 << 0) 585c595713dSTony Lindgren 586c595713dSTony Lindgren /* CM_AUTOIDLE_DSS */ 5872bc4ef71SPaul Walmsley #define OMAP3430_AUTO_DSS_MASK (1 << 0) 588c595713dSTony Lindgren #define OMAP3430_AUTO_DSS_SHIFT 0 589c595713dSTony Lindgren 590c595713dSTony Lindgren /* CM_CLKSEL_DSS */ 591c595713dSTony Lindgren #define OMAP3430_CLKSEL_TV_SHIFT 8 592c595713dSTony Lindgren #define OMAP3430_CLKSEL_TV_MASK (0x1f << 8) 593678bc9a2SVishwanath BS #define OMAP3630_CLKSEL_TV_MASK (0x3f << 8) 594c595713dSTony Lindgren #define OMAP3430_CLKSEL_DSS1_SHIFT 0 595c595713dSTony Lindgren #define OMAP3430_CLKSEL_DSS1_MASK (0x1f << 0) 596678bc9a2SVishwanath BS #define OMAP3630_CLKSEL_DSS1_MASK (0x3f << 0) 597c595713dSTony Lindgren 598c595713dSTony Lindgren /* CM_SLEEPDEP_DSS specific bits */ 599c595713dSTony Lindgren 600c595713dSTony Lindgren /* CM_CLKSTCTRL_DSS */ 601c595713dSTony Lindgren #define OMAP3430_CLKTRCTRL_DSS_SHIFT 0 602c595713dSTony Lindgren #define OMAP3430_CLKTRCTRL_DSS_MASK (0x3 << 0) 603c595713dSTony Lindgren 604c595713dSTony Lindgren /* CM_CLKSTST_DSS */ 605801954d3SPaul Walmsley #define OMAP3430_CLKACTIVITY_DSS_SHIFT 0 606801954d3SPaul Walmsley #define OMAP3430_CLKACTIVITY_DSS_MASK (1 << 0) 607c595713dSTony Lindgren 608c595713dSTony Lindgren /* CM_FCLKEN_CAM specific bits */ 6092bc4ef71SPaul Walmsley #define OMAP3430_EN_CSI2_MASK (1 << 1) 6106c8fe0b9SSergio Aguirre #define OMAP3430_EN_CSI2_SHIFT 1 611c595713dSTony Lindgren 612c595713dSTony Lindgren /* CM_ICLKEN_CAM specific bits */ 613c595713dSTony Lindgren 614c595713dSTony Lindgren /* CM_IDLEST_CAM */ 6152bc4ef71SPaul Walmsley #define OMAP3430_ST_CAM_MASK (1 << 0) 616c595713dSTony Lindgren 617c595713dSTony Lindgren /* CM_AUTOIDLE_CAM */ 6182bc4ef71SPaul Walmsley #define OMAP3430_AUTO_CAM_MASK (1 << 0) 619c595713dSTony Lindgren #define OMAP3430_AUTO_CAM_SHIFT 0 620c595713dSTony Lindgren 621c595713dSTony Lindgren /* CM_CLKSEL_CAM */ 622c595713dSTony Lindgren #define OMAP3430_CLKSEL_CAM_SHIFT 0 623c595713dSTony Lindgren #define OMAP3430_CLKSEL_CAM_MASK (0x1f << 0) 624678bc9a2SVishwanath BS #define OMAP3630_CLKSEL_CAM_MASK (0x3f << 0) 625c595713dSTony Lindgren 626c595713dSTony Lindgren /* CM_SLEEPDEP_CAM specific bits */ 627c595713dSTony Lindgren 628c595713dSTony Lindgren /* CM_CLKSTCTRL_CAM */ 629c595713dSTony Lindgren #define OMAP3430_CLKTRCTRL_CAM_SHIFT 0 630c595713dSTony Lindgren #define OMAP3430_CLKTRCTRL_CAM_MASK (0x3 << 0) 631c595713dSTony Lindgren 632c595713dSTony Lindgren /* CM_CLKSTST_CAM */ 633801954d3SPaul Walmsley #define OMAP3430_CLKACTIVITY_CAM_SHIFT 0 634801954d3SPaul Walmsley #define OMAP3430_CLKACTIVITY_CAM_MASK (1 << 0) 635c595713dSTony Lindgren 636c595713dSTony Lindgren /* CM_FCLKEN_PER specific bits */ 637c595713dSTony Lindgren 638c595713dSTony Lindgren /* CM_ICLKEN_PER specific bits */ 639c595713dSTony Lindgren 640c595713dSTony Lindgren /* CM_IDLEST_PER */ 641da0747d4SPaul Walmsley #define OMAP3430_ST_WDT3_SHIFT 12 642da0747d4SPaul Walmsley #define OMAP3430_ST_WDT3_MASK (1 << 12) 643da0747d4SPaul Walmsley #define OMAP3430_ST_MCBSP4_SHIFT 2 644da0747d4SPaul Walmsley #define OMAP3430_ST_MCBSP4_MASK (1 << 2) 645da0747d4SPaul Walmsley #define OMAP3430_ST_MCBSP3_SHIFT 1 646da0747d4SPaul Walmsley #define OMAP3430_ST_MCBSP3_MASK (1 << 1) 647da0747d4SPaul Walmsley #define OMAP3430_ST_MCBSP2_SHIFT 0 648da0747d4SPaul Walmsley #define OMAP3430_ST_MCBSP2_MASK (1 << 0) 649c595713dSTony Lindgren 650c595713dSTony Lindgren /* CM_AUTOIDLE_PER */ 651e5863689SGovindraj.R #define OMAP3630_AUTO_UART4_MASK (1 << 18) 652e5863689SGovindraj.R #define OMAP3630_AUTO_UART4_SHIFT 18 6532bc4ef71SPaul Walmsley #define OMAP3430_AUTO_GPIO6_MASK (1 << 17) 654c595713dSTony Lindgren #define OMAP3430_AUTO_GPIO6_SHIFT 17 6552bc4ef71SPaul Walmsley #define OMAP3430_AUTO_GPIO5_MASK (1 << 16) 656c595713dSTony Lindgren #define OMAP3430_AUTO_GPIO5_SHIFT 16 6572bc4ef71SPaul Walmsley #define OMAP3430_AUTO_GPIO4_MASK (1 << 15) 658c595713dSTony Lindgren #define OMAP3430_AUTO_GPIO4_SHIFT 15 6592bc4ef71SPaul Walmsley #define OMAP3430_AUTO_GPIO3_MASK (1 << 14) 660c595713dSTony Lindgren #define OMAP3430_AUTO_GPIO3_SHIFT 14 6612bc4ef71SPaul Walmsley #define OMAP3430_AUTO_GPIO2_MASK (1 << 13) 662c595713dSTony Lindgren #define OMAP3430_AUTO_GPIO2_SHIFT 13 6632bc4ef71SPaul Walmsley #define OMAP3430_AUTO_WDT3_MASK (1 << 12) 664c595713dSTony Lindgren #define OMAP3430_AUTO_WDT3_SHIFT 12 6652bc4ef71SPaul Walmsley #define OMAP3430_AUTO_UART3_MASK (1 << 11) 666c595713dSTony Lindgren #define OMAP3430_AUTO_UART3_SHIFT 11 6672bc4ef71SPaul Walmsley #define OMAP3430_AUTO_GPT9_MASK (1 << 10) 668c595713dSTony Lindgren #define OMAP3430_AUTO_GPT9_SHIFT 10 6692bc4ef71SPaul Walmsley #define OMAP3430_AUTO_GPT8_MASK (1 << 9) 670c595713dSTony Lindgren #define OMAP3430_AUTO_GPT8_SHIFT 9 6712bc4ef71SPaul Walmsley #define OMAP3430_AUTO_GPT7_MASK (1 << 8) 672c595713dSTony Lindgren #define OMAP3430_AUTO_GPT7_SHIFT 8 6732bc4ef71SPaul Walmsley #define OMAP3430_AUTO_GPT6_MASK (1 << 7) 674c595713dSTony Lindgren #define OMAP3430_AUTO_GPT6_SHIFT 7 6752bc4ef71SPaul Walmsley #define OMAP3430_AUTO_GPT5_MASK (1 << 6) 676c595713dSTony Lindgren #define OMAP3430_AUTO_GPT5_SHIFT 6 6772bc4ef71SPaul Walmsley #define OMAP3430_AUTO_GPT4_MASK (1 << 5) 678c595713dSTony Lindgren #define OMAP3430_AUTO_GPT4_SHIFT 5 6792bc4ef71SPaul Walmsley #define OMAP3430_AUTO_GPT3_MASK (1 << 4) 680c595713dSTony Lindgren #define OMAP3430_AUTO_GPT3_SHIFT 4 6812bc4ef71SPaul Walmsley #define OMAP3430_AUTO_GPT2_MASK (1 << 3) 682c595713dSTony Lindgren #define OMAP3430_AUTO_GPT2_SHIFT 3 6832bc4ef71SPaul Walmsley #define OMAP3430_AUTO_MCBSP4_MASK (1 << 2) 684c595713dSTony Lindgren #define OMAP3430_AUTO_MCBSP4_SHIFT 2 6852bc4ef71SPaul Walmsley #define OMAP3430_AUTO_MCBSP3_MASK (1 << 1) 686c595713dSTony Lindgren #define OMAP3430_AUTO_MCBSP3_SHIFT 1 6872bc4ef71SPaul Walmsley #define OMAP3430_AUTO_MCBSP2_MASK (1 << 0) 688c595713dSTony Lindgren #define OMAP3430_AUTO_MCBSP2_SHIFT 0 689c595713dSTony Lindgren 690c595713dSTony Lindgren /* CM_CLKSEL_PER */ 691c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT9_MASK (1 << 7) 692c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT9_SHIFT 7 693c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT8_MASK (1 << 6) 694c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT8_SHIFT 6 695c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT7_MASK (1 << 5) 696c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT7_SHIFT 5 697c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT6_MASK (1 << 4) 698c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT6_SHIFT 4 699c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT5_MASK (1 << 3) 700c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT5_SHIFT 3 701c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT4_MASK (1 << 2) 702c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT4_SHIFT 2 703c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT3_MASK (1 << 1) 704c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT3_SHIFT 1 705c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT2_MASK (1 << 0) 706c595713dSTony Lindgren #define OMAP3430_CLKSEL_GPT2_SHIFT 0 707c595713dSTony Lindgren 708c595713dSTony Lindgren /* CM_SLEEPDEP_PER specific bits */ 7092bc4ef71SPaul Walmsley #define OMAP3430_CM_SLEEPDEP_PER_EN_IVA2_MASK (1 << 2) 710c595713dSTony Lindgren 711c595713dSTony Lindgren /* CM_CLKSTCTRL_PER */ 712c595713dSTony Lindgren #define OMAP3430_CLKTRCTRL_PER_SHIFT 0 713c595713dSTony Lindgren #define OMAP3430_CLKTRCTRL_PER_MASK (0x3 << 0) 714c595713dSTony Lindgren 715c595713dSTony Lindgren /* CM_CLKSTST_PER */ 716801954d3SPaul Walmsley #define OMAP3430_CLKACTIVITY_PER_SHIFT 0 717801954d3SPaul Walmsley #define OMAP3430_CLKACTIVITY_PER_MASK (1 << 0) 718c595713dSTony Lindgren 719c595713dSTony Lindgren /* CM_CLKSEL1_EMU */ 720c595713dSTony Lindgren #define OMAP3430_DIV_DPLL4_SHIFT 24 721c595713dSTony Lindgren #define OMAP3430_DIV_DPLL4_MASK (0x1f << 24) 722678bc9a2SVishwanath BS #define OMAP3630_DIV_DPLL4_MASK (0x3f << 24) 723c595713dSTony Lindgren #define OMAP3430_DIV_DPLL3_SHIFT 16 724c595713dSTony Lindgren #define OMAP3430_DIV_DPLL3_MASK (0x1f << 16) 725c595713dSTony Lindgren #define OMAP3430_CLKSEL_TRACECLK_SHIFT 11 726c595713dSTony Lindgren #define OMAP3430_CLKSEL_TRACECLK_MASK (0x7 << 11) 727c595713dSTony Lindgren #define OMAP3430_CLKSEL_PCLK_SHIFT 8 728c595713dSTony Lindgren #define OMAP3430_CLKSEL_PCLK_MASK (0x7 << 8) 729c595713dSTony Lindgren #define OMAP3430_CLKSEL_PCLKX2_SHIFT 6 730c595713dSTony Lindgren #define OMAP3430_CLKSEL_PCLKX2_MASK (0x3 << 6) 731c595713dSTony Lindgren #define OMAP3430_CLKSEL_ATCLK_SHIFT 4 732c595713dSTony Lindgren #define OMAP3430_CLKSEL_ATCLK_MASK (0x3 << 4) 733c595713dSTony Lindgren #define OMAP3430_TRACE_MUX_CTRL_SHIFT 2 734c595713dSTony Lindgren #define OMAP3430_TRACE_MUX_CTRL_MASK (0x3 << 2) 735c595713dSTony Lindgren #define OMAP3430_MUX_CTRL_SHIFT 0 736c595713dSTony Lindgren #define OMAP3430_MUX_CTRL_MASK (0x3 << 0) 737c595713dSTony Lindgren 738c595713dSTony Lindgren /* CM_CLKSTCTRL_EMU */ 739c595713dSTony Lindgren #define OMAP3430_CLKTRCTRL_EMU_SHIFT 0 740c595713dSTony Lindgren #define OMAP3430_CLKTRCTRL_EMU_MASK (0x3 << 0) 741c595713dSTony Lindgren 742c595713dSTony Lindgren /* CM_CLKSTST_EMU */ 743801954d3SPaul Walmsley #define OMAP3430_CLKACTIVITY_EMU_SHIFT 0 744801954d3SPaul Walmsley #define OMAP3430_CLKACTIVITY_EMU_MASK (1 << 0) 745c595713dSTony Lindgren 746c595713dSTony Lindgren /* CM_CLKSEL2_EMU specific bits */ 747c595713dSTony Lindgren #define OMAP3430_CORE_DPLL_EMU_MULT_SHIFT 8 748c595713dSTony Lindgren #define OMAP3430_CORE_DPLL_EMU_MULT_MASK (0x7ff << 8) 749c595713dSTony Lindgren #define OMAP3430_CORE_DPLL_EMU_DIV_SHIFT 0 750c595713dSTony Lindgren #define OMAP3430_CORE_DPLL_EMU_DIV_MASK (0x7f << 0) 751c595713dSTony Lindgren 752c595713dSTony Lindgren /* CM_CLKSEL3_EMU specific bits */ 753c595713dSTony Lindgren #define OMAP3430_PERIPH_DPLL_EMU_MULT_SHIFT 8 754c595713dSTony Lindgren #define OMAP3430_PERIPH_DPLL_EMU_MULT_MASK (0x7ff << 8) 755c595713dSTony Lindgren #define OMAP3430_PERIPH_DPLL_EMU_DIV_SHIFT 0 756c595713dSTony Lindgren #define OMAP3430_PERIPH_DPLL_EMU_DIV_MASK (0x7f << 0) 757c595713dSTony Lindgren 758c595713dSTony Lindgren /* CM_POLCTRL */ 7592bc4ef71SPaul Walmsley #define OMAP3430_CLKOUT2_POL_MASK (1 << 0) 760c595713dSTony Lindgren 761c595713dSTony Lindgren /* CM_IDLEST_NEON */ 7622bc4ef71SPaul Walmsley #define OMAP3430_ST_NEON_MASK (1 << 0) 763c595713dSTony Lindgren 764c595713dSTony Lindgren /* CM_CLKSTCTRL_NEON */ 765c595713dSTony Lindgren #define OMAP3430_CLKTRCTRL_NEON_SHIFT 0 766c595713dSTony Lindgren #define OMAP3430_CLKTRCTRL_NEON_MASK (0x3 << 0) 767c595713dSTony Lindgren 768c595713dSTony Lindgren /* CM_FCLKEN_USBHOST */ 769c595713dSTony Lindgren #define OMAP3430ES2_EN_USBHOST2_SHIFT 1 770c595713dSTony Lindgren #define OMAP3430ES2_EN_USBHOST2_MASK (1 << 1) 771c595713dSTony Lindgren #define OMAP3430ES2_EN_USBHOST1_SHIFT 0 772c595713dSTony Lindgren #define OMAP3430ES2_EN_USBHOST1_MASK (1 << 0) 773c595713dSTony Lindgren 774c595713dSTony Lindgren /* CM_ICLKEN_USBHOST */ 775c595713dSTony Lindgren #define OMAP3430ES2_EN_USBHOST_SHIFT 0 776c595713dSTony Lindgren #define OMAP3430ES2_EN_USBHOST_MASK (1 << 0) 777c595713dSTony Lindgren 778c595713dSTony Lindgren /* CM_IDLEST_USBHOST */ 779da0747d4SPaul Walmsley #define OMAP3430ES2_ST_USBHOST_IDLE_SHIFT 1 780da0747d4SPaul Walmsley #define OMAP3430ES2_ST_USBHOST_IDLE_MASK (1 << 1) 781da0747d4SPaul Walmsley #define OMAP3430ES2_ST_USBHOST_STDBY_SHIFT 0 782da0747d4SPaul Walmsley #define OMAP3430ES2_ST_USBHOST_STDBY_MASK (1 << 0) 783c595713dSTony Lindgren 784c595713dSTony Lindgren /* CM_AUTOIDLE_USBHOST */ 785c595713dSTony Lindgren #define OMAP3430ES2_AUTO_USBHOST_SHIFT 0 786c595713dSTony Lindgren #define OMAP3430ES2_AUTO_USBHOST_MASK (1 << 0) 787c595713dSTony Lindgren 788c595713dSTony Lindgren /* CM_SLEEPDEP_USBHOST */ 789c595713dSTony Lindgren #define OMAP3430ES2_EN_MPU_SHIFT 1 790c595713dSTony Lindgren #define OMAP3430ES2_EN_MPU_MASK (1 << 1) 791c595713dSTony Lindgren #define OMAP3430ES2_EN_IVA2_SHIFT 2 792c595713dSTony Lindgren #define OMAP3430ES2_EN_IVA2_MASK (1 << 2) 793c595713dSTony Lindgren 794c595713dSTony Lindgren /* CM_CLKSTCTRL_USBHOST */ 795c595713dSTony Lindgren #define OMAP3430ES2_CLKTRCTRL_USBHOST_SHIFT 0 796c595713dSTony Lindgren #define OMAP3430ES2_CLKTRCTRL_USBHOST_MASK (3 << 0) 797c595713dSTony Lindgren 798801954d3SPaul Walmsley /* CM_CLKSTST_USBHOST */ 799801954d3SPaul Walmsley #define OMAP3430ES2_CLKACTIVITY_USBHOST_SHIFT 0 800801954d3SPaul Walmsley #define OMAP3430ES2_CLKACTIVITY_USBHOST_MASK (1 << 0) 801c595713dSTony Lindgren 802bd2122caSPaul Walmsley /* 803bd2122caSPaul Walmsley * 804bd2122caSPaul Walmsley */ 805bd2122caSPaul Walmsley 806bd2122caSPaul Walmsley /* OMAP3XXX CM_CLKSTCTRL_*.CLKTRCTRL_* register bit values */ 807bd2122caSPaul Walmsley #define OMAP34XX_CLKSTCTRL_DISABLE_AUTO 0x0 808bd2122caSPaul Walmsley #define OMAP34XX_CLKSTCTRL_FORCE_SLEEP 0x1 809bd2122caSPaul Walmsley #define OMAP34XX_CLKSTCTRL_FORCE_WAKEUP 0x2 810bd2122caSPaul Walmsley #define OMAP34XX_CLKSTCTRL_ENABLE_AUTO 0x3 811bd2122caSPaul Walmsley 812bd2122caSPaul Walmsley 813c595713dSTony Lindgren #endif 814