1 /* 2 * linux/arch/arm/mach-omap2/clock.c 3 * 4 * Copyright (C) 2005-2008 Texas Instruments, Inc. 5 * Copyright (C) 2004-2008 Nokia Corporation 6 * 7 * Contacts: 8 * Richard Woodruff <r-woodruff2@ti.com> 9 * Paul Walmsley 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License version 2 as 13 * published by the Free Software Foundation. 14 */ 15 #undef DEBUG 16 17 #include <linux/module.h> 18 #include <linux/kernel.h> 19 #include <linux/device.h> 20 #include <linux/list.h> 21 #include <linux/errno.h> 22 #include <linux/delay.h> 23 #include <linux/clk.h> 24 #include <linux/io.h> 25 #include <linux/bitops.h> 26 27 #include <plat/clock.h> 28 #include <plat/clockdomain.h> 29 #include <plat/cpu.h> 30 #include <plat/prcm.h> 31 32 #include "clock.h" 33 #include "prm.h" 34 #include "prm-regbits-24xx.h" 35 #include "cm.h" 36 #include "cm-regbits-24xx.h" 37 #include "cm-regbits-34xx.h" 38 39 u8 cpu_mask; 40 41 /*------------------------------------------------------------------------- 42 * OMAP2/3/4 specific clock functions 43 *-------------------------------------------------------------------------*/ 44 45 /** 46 * omap2xxx_clk_commit - commit clock parent/rate changes in hardware 47 * @clk: struct clk * 48 * 49 * If @clk has the DELAYED_APP flag set, meaning that parent/rate changes 50 * don't take effect until the VALID_CONFIG bit is written, write the 51 * VALID_CONFIG bit and wait for the write to complete. No return value. 52 */ 53 void omap2xxx_clk_commit(struct clk *clk) 54 { 55 if (!cpu_is_omap24xx()) 56 return; 57 58 if (!(clk->flags & DELAYED_APP)) 59 return; 60 61 prm_write_mod_reg(OMAP24XX_VALID_CONFIG, OMAP24XX_GR_MOD, 62 OMAP2_PRCM_CLKCFG_CTRL_OFFSET); 63 /* OCP barrier */ 64 prm_read_mod_reg(OMAP24XX_GR_MOD, OMAP2_PRCM_CLKCFG_CTRL_OFFSET); 65 } 66 67 /** 68 * omap2_init_clk_clkdm - look up a clockdomain name, store pointer in clk 69 * @clk: OMAP clock struct ptr to use 70 * 71 * Convert a clockdomain name stored in a struct clk 'clk' into a 72 * clockdomain pointer, and save it into the struct clk. Intended to be 73 * called during clk_register(). No return value. 74 */ 75 void omap2_init_clk_clkdm(struct clk *clk) 76 { 77 struct clockdomain *clkdm; 78 79 if (!clk->clkdm_name) 80 return; 81 82 clkdm = clkdm_lookup(clk->clkdm_name); 83 if (clkdm) { 84 pr_debug("clock: associated clk %s to clkdm %s\n", 85 clk->name, clk->clkdm_name); 86 clk->clkdm = clkdm; 87 } else { 88 pr_debug("clock: could not associate clk %s to " 89 "clkdm %s\n", clk->name, clk->clkdm_name); 90 } 91 } 92 93 /** 94 * omap2_clk_dflt_find_companion - find companion clock to @clk 95 * @clk: struct clk * to find the companion clock of 96 * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in 97 * @other_bit: u8 ** to return the companion clock bit shift in 98 * 99 * Note: We don't need special code here for INVERT_ENABLE for the 100 * time being since INVERT_ENABLE only applies to clocks enabled by 101 * CM_CLKEN_PLL 102 * 103 * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes it's 104 * just a matter of XORing the bits. 105 * 106 * Some clocks don't have companion clocks. For example, modules with 107 * only an interface clock (such as MAILBOXES) don't have a companion 108 * clock. Right now, this code relies on the hardware exporting a bit 109 * in the correct companion register that indicates that the 110 * nonexistent 'companion clock' is active. Future patches will 111 * associate this type of code with per-module data structures to 112 * avoid this issue, and remove the casts. No return value. 113 */ 114 void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg, 115 u8 *other_bit) 116 { 117 u32 r; 118 119 /* 120 * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes 121 * it's just a matter of XORing the bits. 122 */ 123 r = ((__force u32)clk->enable_reg ^ (CM_FCLKEN ^ CM_ICLKEN)); 124 125 *other_reg = (__force void __iomem *)r; 126 *other_bit = clk->enable_bit; 127 } 128 129 /** 130 * omap2_clk_dflt_find_idlest - find CM_IDLEST reg va, bit shift for @clk 131 * @clk: struct clk * to find IDLEST info for 132 * @idlest_reg: void __iomem ** to return the CM_IDLEST va in 133 * @idlest_bit: u8 ** to return the CM_IDLEST bit shift in 134 * 135 * Return the CM_IDLEST register address and bit shift corresponding 136 * to the module that "owns" this clock. This default code assumes 137 * that the CM_IDLEST bit shift is the CM_*CLKEN bit shift, and that 138 * the IDLEST register address ID corresponds to the CM_*CLKEN 139 * register address ID (e.g., that CM_FCLKEN2 corresponds to 140 * CM_IDLEST2). This is not true for all modules. No return value. 141 */ 142 void omap2_clk_dflt_find_idlest(struct clk *clk, void __iomem **idlest_reg, 143 u8 *idlest_bit) 144 { 145 u32 r; 146 147 r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20); 148 *idlest_reg = (__force void __iomem *)r; 149 *idlest_bit = clk->enable_bit; 150 } 151 152 /** 153 * omap2_module_wait_ready - wait for an OMAP module to leave IDLE 154 * @clk: struct clk * belonging to the module 155 * 156 * If the necessary clocks for the OMAP hardware IP block that 157 * corresponds to clock @clk are enabled, then wait for the module to 158 * indicate readiness (i.e., to leave IDLE). This code does not 159 * belong in the clock code and will be moved in the medium term to 160 * module-dependent code. No return value. 161 */ 162 static void omap2_module_wait_ready(struct clk *clk) 163 { 164 void __iomem *companion_reg, *idlest_reg; 165 u8 other_bit, idlest_bit; 166 167 /* Not all modules have multiple clocks that their IDLEST depends on */ 168 if (clk->ops->find_companion) { 169 clk->ops->find_companion(clk, &companion_reg, &other_bit); 170 if (!(__raw_readl(companion_reg) & (1 << other_bit))) 171 return; 172 } 173 174 clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit); 175 176 omap2_cm_wait_idlest(idlest_reg, (1 << idlest_bit), clk->name); 177 } 178 179 int omap2_dflt_clk_enable(struct clk *clk) 180 { 181 u32 v; 182 183 if (unlikely(clk->enable_reg == NULL)) { 184 pr_err("clock.c: Enable for %s without enable code\n", 185 clk->name); 186 return 0; /* REVISIT: -EINVAL */ 187 } 188 189 v = __raw_readl(clk->enable_reg); 190 if (clk->flags & INVERT_ENABLE) 191 v &= ~(1 << clk->enable_bit); 192 else 193 v |= (1 << clk->enable_bit); 194 __raw_writel(v, clk->enable_reg); 195 v = __raw_readl(clk->enable_reg); /* OCP barrier */ 196 197 if (clk->ops->find_idlest) 198 omap2_module_wait_ready(clk); 199 200 return 0; 201 } 202 203 void omap2_dflt_clk_disable(struct clk *clk) 204 { 205 u32 v; 206 207 if (!clk->enable_reg) { 208 /* 209 * 'Independent' here refers to a clock which is not 210 * controlled by its parent. 211 */ 212 printk(KERN_ERR "clock: clk_disable called on independent " 213 "clock %s which has no enable_reg\n", clk->name); 214 return; 215 } 216 217 v = __raw_readl(clk->enable_reg); 218 if (clk->flags & INVERT_ENABLE) 219 v |= (1 << clk->enable_bit); 220 else 221 v &= ~(1 << clk->enable_bit); 222 __raw_writel(v, clk->enable_reg); 223 /* No OCP barrier needed here since it is a disable operation */ 224 } 225 226 const struct clkops clkops_omap2_dflt_wait = { 227 .enable = omap2_dflt_clk_enable, 228 .disable = omap2_dflt_clk_disable, 229 .find_companion = omap2_clk_dflt_find_companion, 230 .find_idlest = omap2_clk_dflt_find_idlest, 231 }; 232 233 const struct clkops clkops_omap2_dflt = { 234 .enable = omap2_dflt_clk_enable, 235 .disable = omap2_dflt_clk_disable, 236 }; 237 238 /* Enables clock without considering parent dependencies or use count 239 * REVISIT: Maybe change this to use clk->enable like on omap1? 240 */ 241 static int _omap2_clk_enable(struct clk *clk) 242 { 243 return clk->ops->enable(clk); 244 } 245 246 /* Disables clock without considering parent dependencies or use count */ 247 static void _omap2_clk_disable(struct clk *clk) 248 { 249 clk->ops->disable(clk); 250 } 251 252 void omap2_clk_disable(struct clk *clk) 253 { 254 if (clk->usecount > 0 && !(--clk->usecount)) { 255 _omap2_clk_disable(clk); 256 if (clk->parent) 257 omap2_clk_disable(clk->parent); 258 if (clk->clkdm) 259 omap2_clkdm_clk_disable(clk->clkdm, clk); 260 261 } 262 } 263 264 int omap2_clk_enable(struct clk *clk) 265 { 266 int ret = 0; 267 268 if (clk->usecount++ == 0) { 269 if (clk->clkdm) 270 omap2_clkdm_clk_enable(clk->clkdm, clk); 271 272 if (clk->parent) { 273 ret = omap2_clk_enable(clk->parent); 274 if (ret) 275 goto err; 276 } 277 278 ret = _omap2_clk_enable(clk); 279 if (ret) { 280 if (clk->parent) 281 omap2_clk_disable(clk->parent); 282 283 goto err; 284 } 285 } 286 return ret; 287 288 err: 289 if (clk->clkdm) 290 omap2_clkdm_clk_disable(clk->clkdm, clk); 291 clk->usecount--; 292 return ret; 293 } 294 295 /* Set the clock rate for a clock source */ 296 int omap2_clk_set_rate(struct clk *clk, unsigned long rate) 297 { 298 int ret = -EINVAL; 299 300 pr_debug("clock: set_rate for clock %s to rate %ld\n", clk->name, rate); 301 302 /* CONFIG_PARTICIPANT clocks are changed only in sets via the 303 rate table mechanism, driven by mpu_speed */ 304 if (clk->flags & CONFIG_PARTICIPANT) 305 return -EINVAL; 306 307 /* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */ 308 if (clk->set_rate) 309 ret = clk->set_rate(clk, rate); 310 311 return ret; 312 } 313 314 int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent) 315 { 316 if (clk->flags & CONFIG_PARTICIPANT) 317 return -EINVAL; 318 319 if (!clk->clksel) 320 return -EINVAL; 321 322 return omap2_clksel_set_parent(clk, new_parent); 323 } 324 325 /*------------------------------------------------------------------------- 326 * Omap2 clock reset and init functions 327 *-------------------------------------------------------------------------*/ 328 329 #ifdef CONFIG_OMAP_RESET_CLOCKS 330 void omap2_clk_disable_unused(struct clk *clk) 331 { 332 u32 regval32, v; 333 334 v = (clk->flags & INVERT_ENABLE) ? (1 << clk->enable_bit) : 0; 335 336 regval32 = __raw_readl(clk->enable_reg); 337 if ((regval32 & (1 << clk->enable_bit)) == v) 338 return; 339 340 printk(KERN_DEBUG "Disabling unused clock \"%s\"\n", clk->name); 341 if (cpu_is_omap34xx()) { 342 omap2_clk_enable(clk); 343 omap2_clk_disable(clk); 344 } else 345 _omap2_clk_disable(clk); 346 if (clk->clkdm != NULL) 347 pwrdm_clkdm_state_switch(clk->clkdm); 348 } 349 #endif 350