1 /* 2 * linux/arch/arm/mach-omap2/clock.c 3 * 4 * Copyright (C) 2005-2008 Texas Instruments, Inc. 5 * Copyright (C) 2004-2010 Nokia Corporation 6 * 7 * Contacts: 8 * Richard Woodruff <r-woodruff2@ti.com> 9 * Paul Walmsley 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License version 2 as 13 * published by the Free Software Foundation. 14 */ 15 #undef DEBUG 16 17 #include <linux/kernel.h> 18 #include <linux/list.h> 19 #include <linux/errno.h> 20 #include <linux/clk.h> 21 #include <linux/io.h> 22 #include <linux/bitops.h> 23 24 #include <plat/clock.h> 25 #include <plat/clockdomain.h> 26 #include <plat/cpu.h> 27 #include <plat/prcm.h> 28 29 #include "clock.h" 30 #include "prm.h" 31 #include "prm-regbits-24xx.h" 32 #include "cm.h" 33 #include "cm-regbits-24xx.h" 34 #include "cm-regbits-34xx.h" 35 36 u8 cpu_mask; 37 38 /*------------------------------------------------------------------------- 39 * OMAP2/3/4 specific clock functions 40 *-------------------------------------------------------------------------*/ 41 42 /* Private functions */ 43 44 /** 45 * _omap2_module_wait_ready - wait for an OMAP module to leave IDLE 46 * @clk: struct clk * belonging to the module 47 * 48 * If the necessary clocks for the OMAP hardware IP block that 49 * corresponds to clock @clk are enabled, then wait for the module to 50 * indicate readiness (i.e., to leave IDLE). This code does not 51 * belong in the clock code and will be moved in the medium term to 52 * module-dependent code. No return value. 53 */ 54 static void _omap2_module_wait_ready(struct clk *clk) 55 { 56 void __iomem *companion_reg, *idlest_reg; 57 u8 other_bit, idlest_bit, idlest_val; 58 59 /* Not all modules have multiple clocks that their IDLEST depends on */ 60 if (clk->ops->find_companion) { 61 clk->ops->find_companion(clk, &companion_reg, &other_bit); 62 if (!(__raw_readl(companion_reg) & (1 << other_bit))) 63 return; 64 } 65 66 clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit, &idlest_val); 67 68 omap2_cm_wait_idlest(idlest_reg, (1 << idlest_bit), idlest_val, 69 clk->name); 70 } 71 72 /* Enables clock without considering parent dependencies or use count 73 * REVISIT: Maybe change this to use clk->enable like on omap1? 74 */ 75 static int _omap2_clk_enable(struct clk *clk) 76 { 77 return clk->ops->enable(clk); 78 } 79 80 /* Disables clock without considering parent dependencies or use count */ 81 static void _omap2_clk_disable(struct clk *clk) 82 { 83 clk->ops->disable(clk); 84 } 85 86 /* Public functions */ 87 88 /** 89 * omap2_init_clk_clkdm - look up a clockdomain name, store pointer in clk 90 * @clk: OMAP clock struct ptr to use 91 * 92 * Convert a clockdomain name stored in a struct clk 'clk' into a 93 * clockdomain pointer, and save it into the struct clk. Intended to be 94 * called during clk_register(). No return value. 95 */ 96 void omap2_init_clk_clkdm(struct clk *clk) 97 { 98 struct clockdomain *clkdm; 99 100 if (!clk->clkdm_name) 101 return; 102 103 clkdm = clkdm_lookup(clk->clkdm_name); 104 if (clkdm) { 105 pr_debug("clock: associated clk %s to clkdm %s\n", 106 clk->name, clk->clkdm_name); 107 clk->clkdm = clkdm; 108 } else { 109 pr_debug("clock: could not associate clk %s to " 110 "clkdm %s\n", clk->name, clk->clkdm_name); 111 } 112 } 113 114 /** 115 * omap2_clk_dflt_find_companion - find companion clock to @clk 116 * @clk: struct clk * to find the companion clock of 117 * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in 118 * @other_bit: u8 ** to return the companion clock bit shift in 119 * 120 * Note: We don't need special code here for INVERT_ENABLE for the 121 * time being since INVERT_ENABLE only applies to clocks enabled by 122 * CM_CLKEN_PLL 123 * 124 * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes it's 125 * just a matter of XORing the bits. 126 * 127 * Some clocks don't have companion clocks. For example, modules with 128 * only an interface clock (such as MAILBOXES) don't have a companion 129 * clock. Right now, this code relies on the hardware exporting a bit 130 * in the correct companion register that indicates that the 131 * nonexistent 'companion clock' is active. Future patches will 132 * associate this type of code with per-module data structures to 133 * avoid this issue, and remove the casts. No return value. 134 */ 135 void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg, 136 u8 *other_bit) 137 { 138 u32 r; 139 140 /* 141 * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes 142 * it's just a matter of XORing the bits. 143 */ 144 r = ((__force u32)clk->enable_reg ^ (CM_FCLKEN ^ CM_ICLKEN)); 145 146 *other_reg = (__force void __iomem *)r; 147 *other_bit = clk->enable_bit; 148 } 149 150 /** 151 * omap2_clk_dflt_find_idlest - find CM_IDLEST reg va, bit shift for @clk 152 * @clk: struct clk * to find IDLEST info for 153 * @idlest_reg: void __iomem ** to return the CM_IDLEST va in 154 * @idlest_bit: u8 * to return the CM_IDLEST bit shift in 155 * @idlest_val: u8 * to return the idle status indicator 156 * 157 * Return the CM_IDLEST register address and bit shift corresponding 158 * to the module that "owns" this clock. This default code assumes 159 * that the CM_IDLEST bit shift is the CM_*CLKEN bit shift, and that 160 * the IDLEST register address ID corresponds to the CM_*CLKEN 161 * register address ID (e.g., that CM_FCLKEN2 corresponds to 162 * CM_IDLEST2). This is not true for all modules. No return value. 163 */ 164 void omap2_clk_dflt_find_idlest(struct clk *clk, void __iomem **idlest_reg, 165 u8 *idlest_bit, u8 *idlest_val) 166 { 167 u32 r; 168 169 r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20); 170 *idlest_reg = (__force void __iomem *)r; 171 *idlest_bit = clk->enable_bit; 172 173 /* 174 * 24xx uses 0 to indicate not ready, and 1 to indicate ready. 175 * 34xx reverses this, just to keep us on our toes 176 * AM35xx uses both, depending on the module. 177 */ 178 if (cpu_is_omap24xx()) 179 *idlest_val = OMAP24XX_CM_IDLEST_VAL; 180 else if (cpu_is_omap34xx()) 181 *idlest_val = OMAP34XX_CM_IDLEST_VAL; 182 else 183 BUG(); 184 185 } 186 187 int omap2_dflt_clk_enable(struct clk *clk) 188 { 189 u32 v; 190 191 if (unlikely(clk->enable_reg == NULL)) { 192 pr_err("clock.c: Enable for %s without enable code\n", 193 clk->name); 194 return 0; /* REVISIT: -EINVAL */ 195 } 196 197 v = __raw_readl(clk->enable_reg); 198 if (clk->flags & INVERT_ENABLE) 199 v &= ~(1 << clk->enable_bit); 200 else 201 v |= (1 << clk->enable_bit); 202 __raw_writel(v, clk->enable_reg); 203 v = __raw_readl(clk->enable_reg); /* OCP barrier */ 204 205 if (clk->ops->find_idlest) 206 _omap2_module_wait_ready(clk); 207 208 return 0; 209 } 210 211 void omap2_dflt_clk_disable(struct clk *clk) 212 { 213 u32 v; 214 215 if (!clk->enable_reg) { 216 /* 217 * 'Independent' here refers to a clock which is not 218 * controlled by its parent. 219 */ 220 printk(KERN_ERR "clock: clk_disable called on independent " 221 "clock %s which has no enable_reg\n", clk->name); 222 return; 223 } 224 225 v = __raw_readl(clk->enable_reg); 226 if (clk->flags & INVERT_ENABLE) 227 v |= (1 << clk->enable_bit); 228 else 229 v &= ~(1 << clk->enable_bit); 230 __raw_writel(v, clk->enable_reg); 231 /* No OCP barrier needed here since it is a disable operation */ 232 } 233 234 const struct clkops clkops_omap2_dflt_wait = { 235 .enable = omap2_dflt_clk_enable, 236 .disable = omap2_dflt_clk_disable, 237 .find_companion = omap2_clk_dflt_find_companion, 238 .find_idlest = omap2_clk_dflt_find_idlest, 239 }; 240 241 const struct clkops clkops_omap2_dflt = { 242 .enable = omap2_dflt_clk_enable, 243 .disable = omap2_dflt_clk_disable, 244 }; 245 246 void omap2_clk_disable(struct clk *clk) 247 { 248 if (clk->usecount > 0 && !(--clk->usecount)) { 249 _omap2_clk_disable(clk); 250 if (clk->parent) 251 omap2_clk_disable(clk->parent); 252 if (clk->clkdm) 253 omap2_clkdm_clk_disable(clk->clkdm, clk); 254 255 } 256 } 257 258 int omap2_clk_enable(struct clk *clk) 259 { 260 int ret = 0; 261 262 if (clk->usecount++ == 0) { 263 if (clk->clkdm) 264 omap2_clkdm_clk_enable(clk->clkdm, clk); 265 266 if (clk->parent) { 267 ret = omap2_clk_enable(clk->parent); 268 if (ret) 269 goto err; 270 } 271 272 ret = _omap2_clk_enable(clk); 273 if (ret) { 274 if (clk->parent) 275 omap2_clk_disable(clk->parent); 276 277 goto err; 278 } 279 } 280 return ret; 281 282 err: 283 if (clk->clkdm) 284 omap2_clkdm_clk_disable(clk->clkdm, clk); 285 clk->usecount--; 286 return ret; 287 } 288 289 /* Set the clock rate for a clock source */ 290 int omap2_clk_set_rate(struct clk *clk, unsigned long rate) 291 { 292 int ret = -EINVAL; 293 294 pr_debug("clock: set_rate for clock %s to rate %ld\n", clk->name, rate); 295 296 /* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */ 297 if (clk->set_rate) 298 ret = clk->set_rate(clk, rate); 299 300 return ret; 301 } 302 303 int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent) 304 { 305 if (!clk->clksel) 306 return -EINVAL; 307 308 if (clk->parent == new_parent) 309 return 0; 310 311 return omap2_clksel_set_parent(clk, new_parent); 312 } 313 314 /* OMAP3/4 non-CORE DPLL clkops */ 315 316 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) 317 318 const struct clkops clkops_omap3_noncore_dpll_ops = { 319 .enable = omap3_noncore_dpll_enable, 320 .disable = omap3_noncore_dpll_disable, 321 }; 322 323 #endif 324 325 326 /*------------------------------------------------------------------------- 327 * Omap2 clock reset and init functions 328 *-------------------------------------------------------------------------*/ 329 330 #ifdef CONFIG_OMAP_RESET_CLOCKS 331 void omap2_clk_disable_unused(struct clk *clk) 332 { 333 u32 regval32, v; 334 335 v = (clk->flags & INVERT_ENABLE) ? (1 << clk->enable_bit) : 0; 336 337 regval32 = __raw_readl(clk->enable_reg); 338 if ((regval32 & (1 << clk->enable_bit)) == v) 339 return; 340 341 printk(KERN_DEBUG "Disabling unused clock \"%s\"\n", clk->name); 342 if (cpu_is_omap34xx()) { 343 omap2_clk_enable(clk); 344 omap2_clk_disable(clk); 345 } else 346 _omap2_clk_disable(clk); 347 if (clk->clkdm != NULL) 348 pwrdm_clkdm_state_switch(clk->clkdm); 349 } 350 #endif 351 352 /* Common data */ 353 354 struct clk_functions omap2_clk_functions = { 355 .clk_enable = omap2_clk_enable, 356 .clk_disable = omap2_clk_disable, 357 .clk_round_rate = omap2_clk_round_rate, 358 .clk_set_rate = omap2_clk_set_rate, 359 .clk_set_parent = omap2_clk_set_parent, 360 .clk_disable_unused = omap2_clk_disable_unused, 361 #ifdef CONFIG_CPU_FREQ 362 /* These will be removed when the OPP code is integrated */ 363 .clk_init_cpufreq_table = omap2_clk_init_cpufreq_table, 364 .clk_exit_cpufreq_table = omap2_clk_exit_cpufreq_table, 365 #endif 366 }; 367 368