1 /* 2 * linux/arch/arm/mach-omap2/clock.c 3 * 4 * Copyright (C) 2005-2008 Texas Instruments, Inc. 5 * Copyright (C) 2004-2008 Nokia Corporation 6 * 7 * Contacts: 8 * Richard Woodruff <r-woodruff2@ti.com> 9 * Paul Walmsley 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License version 2 as 13 * published by the Free Software Foundation. 14 */ 15 #undef DEBUG 16 17 #include <linux/module.h> 18 #include <linux/kernel.h> 19 #include <linux/device.h> 20 #include <linux/list.h> 21 #include <linux/errno.h> 22 #include <linux/delay.h> 23 #include <linux/clk.h> 24 #include <linux/io.h> 25 #include <linux/bitops.h> 26 27 #include <plat/clock.h> 28 #include <plat/clockdomain.h> 29 #include <plat/cpu.h> 30 #include <plat/prcm.h> 31 32 #include "clock.h" 33 #include "prm.h" 34 #include "prm-regbits-24xx.h" 35 #include "cm.h" 36 #include "cm-regbits-24xx.h" 37 #include "cm-regbits-34xx.h" 38 39 u8 cpu_mask; 40 41 /*------------------------------------------------------------------------- 42 * OMAP2/3/4 specific clock functions 43 *-------------------------------------------------------------------------*/ 44 45 /* Private functions */ 46 47 /** 48 * _omap2_module_wait_ready - wait for an OMAP module to leave IDLE 49 * @clk: struct clk * belonging to the module 50 * 51 * If the necessary clocks for the OMAP hardware IP block that 52 * corresponds to clock @clk are enabled, then wait for the module to 53 * indicate readiness (i.e., to leave IDLE). This code does not 54 * belong in the clock code and will be moved in the medium term to 55 * module-dependent code. No return value. 56 */ 57 static void _omap2_module_wait_ready(struct clk *clk) 58 { 59 void __iomem *companion_reg, *idlest_reg; 60 u8 other_bit, idlest_bit, idlest_val; 61 62 /* Not all modules have multiple clocks that their IDLEST depends on */ 63 if (clk->ops->find_companion) { 64 clk->ops->find_companion(clk, &companion_reg, &other_bit); 65 if (!(__raw_readl(companion_reg) & (1 << other_bit))) 66 return; 67 } 68 69 clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit, &idlest_val); 70 71 omap2_cm_wait_idlest(idlest_reg, (1 << idlest_bit), idlest_val, 72 clk->name); 73 } 74 75 /* Enables clock without considering parent dependencies or use count 76 * REVISIT: Maybe change this to use clk->enable like on omap1? 77 */ 78 static int _omap2_clk_enable(struct clk *clk) 79 { 80 return clk->ops->enable(clk); 81 } 82 83 /* Disables clock without considering parent dependencies or use count */ 84 static void _omap2_clk_disable(struct clk *clk) 85 { 86 clk->ops->disable(clk); 87 } 88 89 /* Public functions */ 90 91 /** 92 * omap2xxx_clk_commit - commit clock parent/rate changes in hardware 93 * @clk: struct clk * 94 * 95 * If @clk has the DELAYED_APP flag set, meaning that parent/rate changes 96 * don't take effect until the VALID_CONFIG bit is written, write the 97 * VALID_CONFIG bit and wait for the write to complete. No return value. 98 */ 99 void omap2xxx_clk_commit(struct clk *clk) 100 { 101 if (!cpu_is_omap24xx()) 102 return; 103 104 if (!(clk->flags & DELAYED_APP)) 105 return; 106 107 prm_write_mod_reg(OMAP24XX_VALID_CONFIG, OMAP24XX_GR_MOD, 108 OMAP2_PRCM_CLKCFG_CTRL_OFFSET); 109 /* OCP barrier */ 110 prm_read_mod_reg(OMAP24XX_GR_MOD, OMAP2_PRCM_CLKCFG_CTRL_OFFSET); 111 } 112 113 /** 114 * omap2_init_clk_clkdm - look up a clockdomain name, store pointer in clk 115 * @clk: OMAP clock struct ptr to use 116 * 117 * Convert a clockdomain name stored in a struct clk 'clk' into a 118 * clockdomain pointer, and save it into the struct clk. Intended to be 119 * called during clk_register(). No return value. 120 */ 121 void omap2_init_clk_clkdm(struct clk *clk) 122 { 123 struct clockdomain *clkdm; 124 125 if (!clk->clkdm_name) 126 return; 127 128 clkdm = clkdm_lookup(clk->clkdm_name); 129 if (clkdm) { 130 pr_debug("clock: associated clk %s to clkdm %s\n", 131 clk->name, clk->clkdm_name); 132 clk->clkdm = clkdm; 133 } else { 134 pr_debug("clock: could not associate clk %s to " 135 "clkdm %s\n", clk->name, clk->clkdm_name); 136 } 137 } 138 139 /** 140 * omap2_clk_dflt_find_companion - find companion clock to @clk 141 * @clk: struct clk * to find the companion clock of 142 * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in 143 * @other_bit: u8 ** to return the companion clock bit shift in 144 * 145 * Note: We don't need special code here for INVERT_ENABLE for the 146 * time being since INVERT_ENABLE only applies to clocks enabled by 147 * CM_CLKEN_PLL 148 * 149 * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes it's 150 * just a matter of XORing the bits. 151 * 152 * Some clocks don't have companion clocks. For example, modules with 153 * only an interface clock (such as MAILBOXES) don't have a companion 154 * clock. Right now, this code relies on the hardware exporting a bit 155 * in the correct companion register that indicates that the 156 * nonexistent 'companion clock' is active. Future patches will 157 * associate this type of code with per-module data structures to 158 * avoid this issue, and remove the casts. No return value. 159 */ 160 void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg, 161 u8 *other_bit) 162 { 163 u32 r; 164 165 /* 166 * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes 167 * it's just a matter of XORing the bits. 168 */ 169 r = ((__force u32)clk->enable_reg ^ (CM_FCLKEN ^ CM_ICLKEN)); 170 171 *other_reg = (__force void __iomem *)r; 172 *other_bit = clk->enable_bit; 173 } 174 175 /** 176 * omap2_clk_dflt_find_idlest - find CM_IDLEST reg va, bit shift for @clk 177 * @clk: struct clk * to find IDLEST info for 178 * @idlest_reg: void __iomem ** to return the CM_IDLEST va in 179 * @idlest_bit: u8 * to return the CM_IDLEST bit shift in 180 * @idlest_val: u8 * to return the idle status indicator 181 * 182 * Return the CM_IDLEST register address and bit shift corresponding 183 * to the module that "owns" this clock. This default code assumes 184 * that the CM_IDLEST bit shift is the CM_*CLKEN bit shift, and that 185 * the IDLEST register address ID corresponds to the CM_*CLKEN 186 * register address ID (e.g., that CM_FCLKEN2 corresponds to 187 * CM_IDLEST2). This is not true for all modules. No return value. 188 */ 189 void omap2_clk_dflt_find_idlest(struct clk *clk, void __iomem **idlest_reg, 190 u8 *idlest_bit, u8 *idlest_val) 191 { 192 u32 r; 193 194 r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20); 195 *idlest_reg = (__force void __iomem *)r; 196 *idlest_bit = clk->enable_bit; 197 198 /* 199 * 24xx uses 0 to indicate not ready, and 1 to indicate ready. 200 * 34xx reverses this, just to keep us on our toes 201 * AM35xx uses both, depending on the module. 202 */ 203 if (cpu_is_omap24xx()) 204 *idlest_val = OMAP24XX_CM_IDLEST_VAL; 205 else if (cpu_is_omap34xx()) 206 *idlest_val = OMAP34XX_CM_IDLEST_VAL; 207 else 208 BUG(); 209 210 } 211 212 int omap2_dflt_clk_enable(struct clk *clk) 213 { 214 u32 v; 215 216 if (unlikely(clk->enable_reg == NULL)) { 217 pr_err("clock.c: Enable for %s without enable code\n", 218 clk->name); 219 return 0; /* REVISIT: -EINVAL */ 220 } 221 222 v = __raw_readl(clk->enable_reg); 223 if (clk->flags & INVERT_ENABLE) 224 v &= ~(1 << clk->enable_bit); 225 else 226 v |= (1 << clk->enable_bit); 227 __raw_writel(v, clk->enable_reg); 228 v = __raw_readl(clk->enable_reg); /* OCP barrier */ 229 230 if (clk->ops->find_idlest) 231 _omap2_module_wait_ready(clk); 232 233 return 0; 234 } 235 236 void omap2_dflt_clk_disable(struct clk *clk) 237 { 238 u32 v; 239 240 if (!clk->enable_reg) { 241 /* 242 * 'Independent' here refers to a clock which is not 243 * controlled by its parent. 244 */ 245 printk(KERN_ERR "clock: clk_disable called on independent " 246 "clock %s which has no enable_reg\n", clk->name); 247 return; 248 } 249 250 v = __raw_readl(clk->enable_reg); 251 if (clk->flags & INVERT_ENABLE) 252 v |= (1 << clk->enable_bit); 253 else 254 v &= ~(1 << clk->enable_bit); 255 __raw_writel(v, clk->enable_reg); 256 /* No OCP barrier needed here since it is a disable operation */ 257 } 258 259 const struct clkops clkops_omap2_dflt_wait = { 260 .enable = omap2_dflt_clk_enable, 261 .disable = omap2_dflt_clk_disable, 262 .find_companion = omap2_clk_dflt_find_companion, 263 .find_idlest = omap2_clk_dflt_find_idlest, 264 }; 265 266 const struct clkops clkops_omap2_dflt = { 267 .enable = omap2_dflt_clk_enable, 268 .disable = omap2_dflt_clk_disable, 269 }; 270 271 void omap2_clk_disable(struct clk *clk) 272 { 273 if (clk->usecount > 0 && !(--clk->usecount)) { 274 _omap2_clk_disable(clk); 275 if (clk->parent) 276 omap2_clk_disable(clk->parent); 277 if (clk->clkdm) 278 omap2_clkdm_clk_disable(clk->clkdm, clk); 279 280 } 281 } 282 283 int omap2_clk_enable(struct clk *clk) 284 { 285 int ret = 0; 286 287 if (clk->usecount++ == 0) { 288 if (clk->clkdm) 289 omap2_clkdm_clk_enable(clk->clkdm, clk); 290 291 if (clk->parent) { 292 ret = omap2_clk_enable(clk->parent); 293 if (ret) 294 goto err; 295 } 296 297 ret = _omap2_clk_enable(clk); 298 if (ret) { 299 if (clk->parent) 300 omap2_clk_disable(clk->parent); 301 302 goto err; 303 } 304 } 305 return ret; 306 307 err: 308 if (clk->clkdm) 309 omap2_clkdm_clk_disable(clk->clkdm, clk); 310 clk->usecount--; 311 return ret; 312 } 313 314 /* Set the clock rate for a clock source */ 315 int omap2_clk_set_rate(struct clk *clk, unsigned long rate) 316 { 317 int ret = -EINVAL; 318 319 pr_debug("clock: set_rate for clock %s to rate %ld\n", clk->name, rate); 320 321 /* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */ 322 if (clk->set_rate) 323 ret = clk->set_rate(clk, rate); 324 325 return ret; 326 } 327 328 int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent) 329 { 330 if (!clk->clksel) 331 return -EINVAL; 332 333 if (clk->parent == new_parent) 334 return 0; 335 336 return omap2_clksel_set_parent(clk, new_parent); 337 } 338 339 /* OMAP3/4 non-CORE DPLL clkops */ 340 341 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) 342 343 const struct clkops clkops_omap3_noncore_dpll_ops = { 344 .enable = omap3_noncore_dpll_enable, 345 .disable = omap3_noncore_dpll_disable, 346 }; 347 348 #endif 349 350 351 /*------------------------------------------------------------------------- 352 * Omap2 clock reset and init functions 353 *-------------------------------------------------------------------------*/ 354 355 #ifdef CONFIG_OMAP_RESET_CLOCKS 356 void omap2_clk_disable_unused(struct clk *clk) 357 { 358 u32 regval32, v; 359 360 v = (clk->flags & INVERT_ENABLE) ? (1 << clk->enable_bit) : 0; 361 362 regval32 = __raw_readl(clk->enable_reg); 363 if ((regval32 & (1 << clk->enable_bit)) == v) 364 return; 365 366 printk(KERN_DEBUG "Disabling unused clock \"%s\"\n", clk->name); 367 if (cpu_is_omap34xx()) { 368 omap2_clk_enable(clk); 369 omap2_clk_disable(clk); 370 } else 371 _omap2_clk_disable(clk); 372 if (clk->clkdm != NULL) 373 pwrdm_clkdm_state_switch(clk->clkdm); 374 } 375 #endif 376 377 /* Common data */ 378 379 struct clk_functions omap2_clk_functions = { 380 .clk_enable = omap2_clk_enable, 381 .clk_disable = omap2_clk_disable, 382 .clk_round_rate = omap2_clk_round_rate, 383 .clk_set_rate = omap2_clk_set_rate, 384 .clk_set_parent = omap2_clk_set_parent, 385 .clk_disable_unused = omap2_clk_disable_unused, 386 #ifdef CONFIG_CPU_FREQ 387 /* These will be removed when the OPP code is integrated */ 388 .clk_init_cpufreq_table = omap2_clk_init_cpufreq_table, 389 .clk_exit_cpufreq_table = omap2_clk_exit_cpufreq_table, 390 #endif 391 }; 392 393