1 /* 2 * linux/arch/arm/mach-omap2/clock.c 3 * 4 * Copyright (C) 2005-2008 Texas Instruments, Inc. 5 * Copyright (C) 2004-2008 Nokia Corporation 6 * 7 * Contacts: 8 * Richard Woodruff <r-woodruff2@ti.com> 9 * Paul Walmsley 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License version 2 as 13 * published by the Free Software Foundation. 14 */ 15 #undef DEBUG 16 17 #include <linux/module.h> 18 #include <linux/kernel.h> 19 #include <linux/device.h> 20 #include <linux/list.h> 21 #include <linux/errno.h> 22 #include <linux/delay.h> 23 #include <linux/clk.h> 24 #include <linux/io.h> 25 #include <linux/bitops.h> 26 27 #include <plat/clock.h> 28 #include <plat/clockdomain.h> 29 #include <plat/cpu.h> 30 #include <plat/prcm.h> 31 32 #include "clock.h" 33 #include "prm.h" 34 #include "prm-regbits-24xx.h" 35 #include "cm.h" 36 #include "cm-regbits-24xx.h" 37 #include "cm-regbits-34xx.h" 38 39 u8 cpu_mask; 40 41 /*------------------------------------------------------------------------- 42 * OMAP2/3/4 specific clock functions 43 *-------------------------------------------------------------------------*/ 44 45 /* Private functions */ 46 47 /** 48 * _omap2_module_wait_ready - wait for an OMAP module to leave IDLE 49 * @clk: struct clk * belonging to the module 50 * 51 * If the necessary clocks for the OMAP hardware IP block that 52 * corresponds to clock @clk are enabled, then wait for the module to 53 * indicate readiness (i.e., to leave IDLE). This code does not 54 * belong in the clock code and will be moved in the medium term to 55 * module-dependent code. No return value. 56 */ 57 static void _omap2_module_wait_ready(struct clk *clk) 58 { 59 void __iomem *companion_reg, *idlest_reg; 60 u8 other_bit, idlest_bit; 61 62 /* Not all modules have multiple clocks that their IDLEST depends on */ 63 if (clk->ops->find_companion) { 64 clk->ops->find_companion(clk, &companion_reg, &other_bit); 65 if (!(__raw_readl(companion_reg) & (1 << other_bit))) 66 return; 67 } 68 69 clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit); 70 71 omap2_cm_wait_idlest(idlest_reg, (1 << idlest_bit), clk->name); 72 } 73 74 /* Enables clock without considering parent dependencies or use count 75 * REVISIT: Maybe change this to use clk->enable like on omap1? 76 */ 77 static int _omap2_clk_enable(struct clk *clk) 78 { 79 return clk->ops->enable(clk); 80 } 81 82 /* Disables clock without considering parent dependencies or use count */ 83 static void _omap2_clk_disable(struct clk *clk) 84 { 85 clk->ops->disable(clk); 86 } 87 88 /* Public functions */ 89 90 /** 91 * omap2xxx_clk_commit - commit clock parent/rate changes in hardware 92 * @clk: struct clk * 93 * 94 * If @clk has the DELAYED_APP flag set, meaning that parent/rate changes 95 * don't take effect until the VALID_CONFIG bit is written, write the 96 * VALID_CONFIG bit and wait for the write to complete. No return value. 97 */ 98 void omap2xxx_clk_commit(struct clk *clk) 99 { 100 if (!cpu_is_omap24xx()) 101 return; 102 103 if (!(clk->flags & DELAYED_APP)) 104 return; 105 106 prm_write_mod_reg(OMAP24XX_VALID_CONFIG, OMAP24XX_GR_MOD, 107 OMAP2_PRCM_CLKCFG_CTRL_OFFSET); 108 /* OCP barrier */ 109 prm_read_mod_reg(OMAP24XX_GR_MOD, OMAP2_PRCM_CLKCFG_CTRL_OFFSET); 110 } 111 112 /** 113 * omap2_init_clk_clkdm - look up a clockdomain name, store pointer in clk 114 * @clk: OMAP clock struct ptr to use 115 * 116 * Convert a clockdomain name stored in a struct clk 'clk' into a 117 * clockdomain pointer, and save it into the struct clk. Intended to be 118 * called during clk_register(). No return value. 119 */ 120 void omap2_init_clk_clkdm(struct clk *clk) 121 { 122 struct clockdomain *clkdm; 123 124 if (!clk->clkdm_name) 125 return; 126 127 clkdm = clkdm_lookup(clk->clkdm_name); 128 if (clkdm) { 129 pr_debug("clock: associated clk %s to clkdm %s\n", 130 clk->name, clk->clkdm_name); 131 clk->clkdm = clkdm; 132 } else { 133 pr_debug("clock: could not associate clk %s to " 134 "clkdm %s\n", clk->name, clk->clkdm_name); 135 } 136 } 137 138 /** 139 * omap2_clk_dflt_find_companion - find companion clock to @clk 140 * @clk: struct clk * to find the companion clock of 141 * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in 142 * @other_bit: u8 ** to return the companion clock bit shift in 143 * 144 * Note: We don't need special code here for INVERT_ENABLE for the 145 * time being since INVERT_ENABLE only applies to clocks enabled by 146 * CM_CLKEN_PLL 147 * 148 * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes it's 149 * just a matter of XORing the bits. 150 * 151 * Some clocks don't have companion clocks. For example, modules with 152 * only an interface clock (such as MAILBOXES) don't have a companion 153 * clock. Right now, this code relies on the hardware exporting a bit 154 * in the correct companion register that indicates that the 155 * nonexistent 'companion clock' is active. Future patches will 156 * associate this type of code with per-module data structures to 157 * avoid this issue, and remove the casts. No return value. 158 */ 159 void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg, 160 u8 *other_bit) 161 { 162 u32 r; 163 164 /* 165 * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes 166 * it's just a matter of XORing the bits. 167 */ 168 r = ((__force u32)clk->enable_reg ^ (CM_FCLKEN ^ CM_ICLKEN)); 169 170 *other_reg = (__force void __iomem *)r; 171 *other_bit = clk->enable_bit; 172 } 173 174 /** 175 * omap2_clk_dflt_find_idlest - find CM_IDLEST reg va, bit shift for @clk 176 * @clk: struct clk * to find IDLEST info for 177 * @idlest_reg: void __iomem ** to return the CM_IDLEST va in 178 * @idlest_bit: u8 ** to return the CM_IDLEST bit shift in 179 * 180 * Return the CM_IDLEST register address and bit shift corresponding 181 * to the module that "owns" this clock. This default code assumes 182 * that the CM_IDLEST bit shift is the CM_*CLKEN bit shift, and that 183 * the IDLEST register address ID corresponds to the CM_*CLKEN 184 * register address ID (e.g., that CM_FCLKEN2 corresponds to 185 * CM_IDLEST2). This is not true for all modules. No return value. 186 */ 187 void omap2_clk_dflt_find_idlest(struct clk *clk, void __iomem **idlest_reg, 188 u8 *idlest_bit) 189 { 190 u32 r; 191 192 r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20); 193 *idlest_reg = (__force void __iomem *)r; 194 *idlest_bit = clk->enable_bit; 195 } 196 197 int omap2_dflt_clk_enable(struct clk *clk) 198 { 199 u32 v; 200 201 if (unlikely(clk->enable_reg == NULL)) { 202 pr_err("clock.c: Enable for %s without enable code\n", 203 clk->name); 204 return 0; /* REVISIT: -EINVAL */ 205 } 206 207 v = __raw_readl(clk->enable_reg); 208 if (clk->flags & INVERT_ENABLE) 209 v &= ~(1 << clk->enable_bit); 210 else 211 v |= (1 << clk->enable_bit); 212 __raw_writel(v, clk->enable_reg); 213 v = __raw_readl(clk->enable_reg); /* OCP barrier */ 214 215 if (clk->ops->find_idlest) 216 _omap2_module_wait_ready(clk); 217 218 return 0; 219 } 220 221 void omap2_dflt_clk_disable(struct clk *clk) 222 { 223 u32 v; 224 225 if (!clk->enable_reg) { 226 /* 227 * 'Independent' here refers to a clock which is not 228 * controlled by its parent. 229 */ 230 printk(KERN_ERR "clock: clk_disable called on independent " 231 "clock %s which has no enable_reg\n", clk->name); 232 return; 233 } 234 235 v = __raw_readl(clk->enable_reg); 236 if (clk->flags & INVERT_ENABLE) 237 v |= (1 << clk->enable_bit); 238 else 239 v &= ~(1 << clk->enable_bit); 240 __raw_writel(v, clk->enable_reg); 241 /* No OCP barrier needed here since it is a disable operation */ 242 } 243 244 const struct clkops clkops_omap2_dflt_wait = { 245 .enable = omap2_dflt_clk_enable, 246 .disable = omap2_dflt_clk_disable, 247 .find_companion = omap2_clk_dflt_find_companion, 248 .find_idlest = omap2_clk_dflt_find_idlest, 249 }; 250 251 const struct clkops clkops_omap2_dflt = { 252 .enable = omap2_dflt_clk_enable, 253 .disable = omap2_dflt_clk_disable, 254 }; 255 256 void omap2_clk_disable(struct clk *clk) 257 { 258 if (clk->usecount > 0 && !(--clk->usecount)) { 259 _omap2_clk_disable(clk); 260 if (clk->parent) 261 omap2_clk_disable(clk->parent); 262 if (clk->clkdm) 263 omap2_clkdm_clk_disable(clk->clkdm, clk); 264 265 } 266 } 267 268 int omap2_clk_enable(struct clk *clk) 269 { 270 int ret = 0; 271 272 if (clk->usecount++ == 0) { 273 if (clk->clkdm) 274 omap2_clkdm_clk_enable(clk->clkdm, clk); 275 276 if (clk->parent) { 277 ret = omap2_clk_enable(clk->parent); 278 if (ret) 279 goto err; 280 } 281 282 ret = _omap2_clk_enable(clk); 283 if (ret) { 284 if (clk->parent) 285 omap2_clk_disable(clk->parent); 286 287 goto err; 288 } 289 } 290 return ret; 291 292 err: 293 if (clk->clkdm) 294 omap2_clkdm_clk_disable(clk->clkdm, clk); 295 clk->usecount--; 296 return ret; 297 } 298 299 /* Set the clock rate for a clock source */ 300 int omap2_clk_set_rate(struct clk *clk, unsigned long rate) 301 { 302 int ret = -EINVAL; 303 304 pr_debug("clock: set_rate for clock %s to rate %ld\n", clk->name, rate); 305 306 /* CONFIG_PARTICIPANT clocks are changed only in sets via the 307 rate table mechanism, driven by mpu_speed */ 308 if (clk->flags & CONFIG_PARTICIPANT) 309 return -EINVAL; 310 311 /* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */ 312 if (clk->set_rate) 313 ret = clk->set_rate(clk, rate); 314 315 return ret; 316 } 317 318 int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent) 319 { 320 if (clk->flags & CONFIG_PARTICIPANT) 321 return -EINVAL; 322 323 if (!clk->clksel) 324 return -EINVAL; 325 326 return omap2_clksel_set_parent(clk, new_parent); 327 } 328 329 /*------------------------------------------------------------------------- 330 * Omap2 clock reset and init functions 331 *-------------------------------------------------------------------------*/ 332 333 #ifdef CONFIG_OMAP_RESET_CLOCKS 334 void omap2_clk_disable_unused(struct clk *clk) 335 { 336 u32 regval32, v; 337 338 v = (clk->flags & INVERT_ENABLE) ? (1 << clk->enable_bit) : 0; 339 340 regval32 = __raw_readl(clk->enable_reg); 341 if ((regval32 & (1 << clk->enable_bit)) == v) 342 return; 343 344 printk(KERN_DEBUG "Disabling unused clock \"%s\"\n", clk->name); 345 if (cpu_is_omap34xx()) { 346 omap2_clk_enable(clk); 347 omap2_clk_disable(clk); 348 } else 349 _omap2_clk_disable(clk); 350 if (clk->clkdm != NULL) 351 pwrdm_clkdm_state_switch(clk->clkdm); 352 } 353 #endif 354