1 /* 2 * linux/arch/arm/mach-omap2/clock.c 3 * 4 * Copyright (C) 2005-2008 Texas Instruments, Inc. 5 * Copyright (C) 2004-2010 Nokia Corporation 6 * 7 * Contacts: 8 * Richard Woodruff <r-woodruff2@ti.com> 9 * Paul Walmsley 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License version 2 as 13 * published by the Free Software Foundation. 14 */ 15 #undef DEBUG 16 17 #include <linux/kernel.h> 18 #include <linux/export.h> 19 #include <linux/list.h> 20 #include <linux/errno.h> 21 #include <linux/err.h> 22 #include <linux/delay.h> 23 #include <linux/clk.h> 24 #include <linux/io.h> 25 #include <linux/bitops.h> 26 27 #include <asm/cpu.h> 28 29 #include <plat/clock.h> 30 #include <plat/prcm.h> 31 32 #include <trace/events/power.h> 33 34 #include "soc.h" 35 #include "clockdomain.h" 36 #include "clock.h" 37 #include "cm2xxx_3xxx.h" 38 #include "cm-regbits-24xx.h" 39 #include "cm-regbits-34xx.h" 40 41 u16 cpu_mask; 42 43 /* 44 * clkdm_control: if true, then when a clock is enabled in the 45 * hardware, its clockdomain will first be enabled; and when a clock 46 * is disabled in the hardware, its clockdomain will be disabled 47 * afterwards. 48 */ 49 static bool clkdm_control = true; 50 51 static LIST_HEAD(clocks); 52 static DEFINE_MUTEX(clocks_mutex); 53 static DEFINE_SPINLOCK(clockfw_lock); 54 55 /* 56 * OMAP2+ specific clock functions 57 */ 58 59 /* Private functions */ 60 61 /** 62 * _omap2_module_wait_ready - wait for an OMAP module to leave IDLE 63 * @clk: struct clk * belonging to the module 64 * 65 * If the necessary clocks for the OMAP hardware IP block that 66 * corresponds to clock @clk are enabled, then wait for the module to 67 * indicate readiness (i.e., to leave IDLE). This code does not 68 * belong in the clock code and will be moved in the medium term to 69 * module-dependent code. No return value. 70 */ 71 static void _omap2_module_wait_ready(struct clk *clk) 72 { 73 void __iomem *companion_reg, *idlest_reg; 74 u8 other_bit, idlest_bit, idlest_val; 75 76 /* Not all modules have multiple clocks that their IDLEST depends on */ 77 if (clk->ops->find_companion) { 78 clk->ops->find_companion(clk, &companion_reg, &other_bit); 79 if (!(__raw_readl(companion_reg) & (1 << other_bit))) 80 return; 81 } 82 83 clk->ops->find_idlest(clk, &idlest_reg, &idlest_bit, &idlest_val); 84 85 omap2_cm_wait_idlest(idlest_reg, (1 << idlest_bit), idlest_val, 86 __clk_get_name(clk)); 87 } 88 89 /* Public functions */ 90 91 /** 92 * omap2_init_clk_clkdm - look up a clockdomain name, store pointer in clk 93 * @clk: OMAP clock struct ptr to use 94 * 95 * Convert a clockdomain name stored in a struct clk 'clk' into a 96 * clockdomain pointer, and save it into the struct clk. Intended to be 97 * called during clk_register(). No return value. 98 */ 99 void omap2_init_clk_clkdm(struct clk *clk) 100 { 101 struct clockdomain *clkdm; 102 const char *clk_name; 103 104 if (!clk->clkdm_name) 105 return; 106 107 clk_name = __clk_get_name(clk); 108 109 clkdm = clkdm_lookup(clk->clkdm_name); 110 if (clkdm) { 111 pr_debug("clock: associated clk %s to clkdm %s\n", 112 clk_name, clk->clkdm_name); 113 clk->clkdm = clkdm; 114 } else { 115 pr_debug("clock: could not associate clk %s to clkdm %s\n", 116 clk_name, clk->clkdm_name); 117 } 118 } 119 120 /** 121 * omap2_clk_disable_clkdm_control - disable clkdm control on clk enable/disable 122 * 123 * Prevent the OMAP clock code from calling into the clockdomain code 124 * when a hardware clock in that clockdomain is enabled or disabled. 125 * Intended to be called at init time from omap*_clk_init(). No 126 * return value. 127 */ 128 void __init omap2_clk_disable_clkdm_control(void) 129 { 130 clkdm_control = false; 131 } 132 133 /** 134 * omap2_clk_dflt_find_companion - find companion clock to @clk 135 * @clk: struct clk * to find the companion clock of 136 * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in 137 * @other_bit: u8 ** to return the companion clock bit shift in 138 * 139 * Note: We don't need special code here for INVERT_ENABLE for the 140 * time being since INVERT_ENABLE only applies to clocks enabled by 141 * CM_CLKEN_PLL 142 * 143 * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes it's 144 * just a matter of XORing the bits. 145 * 146 * Some clocks don't have companion clocks. For example, modules with 147 * only an interface clock (such as MAILBOXES) don't have a companion 148 * clock. Right now, this code relies on the hardware exporting a bit 149 * in the correct companion register that indicates that the 150 * nonexistent 'companion clock' is active. Future patches will 151 * associate this type of code with per-module data structures to 152 * avoid this issue, and remove the casts. No return value. 153 */ 154 void omap2_clk_dflt_find_companion(struct clk *clk, void __iomem **other_reg, 155 u8 *other_bit) 156 { 157 u32 r; 158 159 /* 160 * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes 161 * it's just a matter of XORing the bits. 162 */ 163 r = ((__force u32)clk->enable_reg ^ (CM_FCLKEN ^ CM_ICLKEN)); 164 165 *other_reg = (__force void __iomem *)r; 166 *other_bit = clk->enable_bit; 167 } 168 169 /** 170 * omap2_clk_dflt_find_idlest - find CM_IDLEST reg va, bit shift for @clk 171 * @clk: struct clk * to find IDLEST info for 172 * @idlest_reg: void __iomem ** to return the CM_IDLEST va in 173 * @idlest_bit: u8 * to return the CM_IDLEST bit shift in 174 * @idlest_val: u8 * to return the idle status indicator 175 * 176 * Return the CM_IDLEST register address and bit shift corresponding 177 * to the module that "owns" this clock. This default code assumes 178 * that the CM_IDLEST bit shift is the CM_*CLKEN bit shift, and that 179 * the IDLEST register address ID corresponds to the CM_*CLKEN 180 * register address ID (e.g., that CM_FCLKEN2 corresponds to 181 * CM_IDLEST2). This is not true for all modules. No return value. 182 */ 183 void omap2_clk_dflt_find_idlest(struct clk *clk, void __iomem **idlest_reg, 184 u8 *idlest_bit, u8 *idlest_val) 185 { 186 u32 r; 187 188 r = (((__force u32)clk->enable_reg & ~0xf0) | 0x20); 189 *idlest_reg = (__force void __iomem *)r; 190 *idlest_bit = clk->enable_bit; 191 192 /* 193 * 24xx uses 0 to indicate not ready, and 1 to indicate ready. 194 * 34xx reverses this, just to keep us on our toes 195 * AM35xx uses both, depending on the module. 196 */ 197 if (cpu_is_omap24xx()) 198 *idlest_val = OMAP24XX_CM_IDLEST_VAL; 199 else if (cpu_is_omap34xx()) 200 *idlest_val = OMAP34XX_CM_IDLEST_VAL; 201 else 202 BUG(); 203 204 } 205 206 int omap2_dflt_clk_enable(struct clk *clk) 207 { 208 u32 v; 209 210 if (unlikely(clk->enable_reg == NULL)) { 211 pr_err("clock.c: Enable for %s without enable code\n", 212 clk->name); 213 return 0; /* REVISIT: -EINVAL */ 214 } 215 216 v = __raw_readl(clk->enable_reg); 217 if (clk->flags & INVERT_ENABLE) 218 v &= ~(1 << clk->enable_bit); 219 else 220 v |= (1 << clk->enable_bit); 221 __raw_writel(v, clk->enable_reg); 222 v = __raw_readl(clk->enable_reg); /* OCP barrier */ 223 224 if (clk->ops->find_idlest) 225 _omap2_module_wait_ready(clk); 226 227 return 0; 228 } 229 230 void omap2_dflt_clk_disable(struct clk *clk) 231 { 232 u32 v; 233 234 if (!clk->enable_reg) { 235 /* 236 * 'Independent' here refers to a clock which is not 237 * controlled by its parent. 238 */ 239 pr_err("clock: clk_disable called on independent clock %s which has no enable_reg\n", clk->name); 240 return; 241 } 242 243 v = __raw_readl(clk->enable_reg); 244 if (clk->flags & INVERT_ENABLE) 245 v |= (1 << clk->enable_bit); 246 else 247 v &= ~(1 << clk->enable_bit); 248 __raw_writel(v, clk->enable_reg); 249 /* No OCP barrier needed here since it is a disable operation */ 250 } 251 252 const struct clkops clkops_omap2_dflt_wait = { 253 .enable = omap2_dflt_clk_enable, 254 .disable = omap2_dflt_clk_disable, 255 .find_companion = omap2_clk_dflt_find_companion, 256 .find_idlest = omap2_clk_dflt_find_idlest, 257 }; 258 259 const struct clkops clkops_omap2_dflt = { 260 .enable = omap2_dflt_clk_enable, 261 .disable = omap2_dflt_clk_disable, 262 }; 263 264 /** 265 * omap2_clk_disable - disable a clock, if the system is not using it 266 * @clk: struct clk * to disable 267 * 268 * Decrements the usecount on struct clk @clk. If there are no users 269 * left, call the clkops-specific clock disable function to disable it 270 * in hardware. If the clock is part of a clockdomain (which they all 271 * should be), request that the clockdomain be disabled. (It too has 272 * a usecount, and so will not be disabled in the hardware until it no 273 * longer has any users.) If the clock has a parent clock (most of 274 * them do), then call ourselves, recursing on the parent clock. This 275 * can cause an entire branch of the clock tree to be powered off by 276 * simply disabling one clock. Intended to be called with the clockfw_lock 277 * spinlock held. No return value. 278 */ 279 void omap2_clk_disable(struct clk *clk) 280 { 281 if (clk->usecount == 0) { 282 WARN(1, "clock: %s: omap2_clk_disable() called, but usecount already 0?", clk->name); 283 return; 284 } 285 286 pr_debug("clock: %s: decrementing usecount\n", clk->name); 287 288 clk->usecount--; 289 290 if (clk->usecount > 0) 291 return; 292 293 pr_debug("clock: %s: disabling in hardware\n", clk->name); 294 295 if (clk->ops && clk->ops->disable) { 296 trace_clock_disable(clk->name, 0, smp_processor_id()); 297 clk->ops->disable(clk); 298 } 299 300 if (clkdm_control && clk->clkdm) 301 clkdm_clk_disable(clk->clkdm, clk); 302 303 if (clk->parent) 304 omap2_clk_disable(clk->parent); 305 } 306 307 /** 308 * omap2_clk_enable - request that the system enable a clock 309 * @clk: struct clk * to enable 310 * 311 * Increments the usecount on struct clk @clk. If there were no users 312 * previously, then recurse up the clock tree, enabling all of the 313 * clock's parents and all of the parent clockdomains, and finally, 314 * enabling @clk's clockdomain, and @clk itself. Intended to be 315 * called with the clockfw_lock spinlock held. Returns 0 upon success 316 * or a negative error code upon failure. 317 */ 318 int omap2_clk_enable(struct clk *clk) 319 { 320 int ret; 321 322 pr_debug("clock: %s: incrementing usecount\n", clk->name); 323 324 clk->usecount++; 325 326 if (clk->usecount > 1) 327 return 0; 328 329 pr_debug("clock: %s: enabling in hardware\n", clk->name); 330 331 if (clk->parent) { 332 ret = omap2_clk_enable(clk->parent); 333 if (ret) { 334 WARN(1, "clock: %s: could not enable parent %s: %d\n", 335 clk->name, clk->parent->name, ret); 336 goto oce_err1; 337 } 338 } 339 340 if (clkdm_control && clk->clkdm) { 341 ret = clkdm_clk_enable(clk->clkdm, clk); 342 if (ret) { 343 WARN(1, "clock: %s: could not enable clockdomain %s: %d\n", 344 clk->name, clk->clkdm->name, ret); 345 goto oce_err2; 346 } 347 } 348 349 if (clk->ops && clk->ops->enable) { 350 trace_clock_enable(clk->name, 1, smp_processor_id()); 351 ret = clk->ops->enable(clk); 352 if (ret) { 353 WARN(1, "clock: %s: could not enable: %d\n", 354 clk->name, ret); 355 goto oce_err3; 356 } 357 } 358 359 return 0; 360 361 oce_err3: 362 if (clkdm_control && clk->clkdm) 363 clkdm_clk_disable(clk->clkdm, clk); 364 oce_err2: 365 if (clk->parent) 366 omap2_clk_disable(clk->parent); 367 oce_err1: 368 clk->usecount--; 369 370 return ret; 371 } 372 373 /* Given a clock and a rate apply a clock specific rounding function */ 374 long omap2_clk_round_rate(struct clk *clk, unsigned long rate) 375 { 376 if (clk->round_rate) 377 return clk->round_rate(clk, rate); 378 379 return clk->rate; 380 } 381 382 /* Set the clock rate for a clock source */ 383 int omap2_clk_set_rate(struct clk *clk, unsigned long rate) 384 { 385 int ret = -EINVAL; 386 387 pr_debug("clock: set_rate for clock %s to rate %ld\n", clk->name, rate); 388 389 /* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */ 390 if (clk->set_rate) { 391 trace_clock_set_rate(clk->name, rate, smp_processor_id()); 392 ret = clk->set_rate(clk, rate); 393 } 394 395 return ret; 396 } 397 398 int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent) 399 { 400 if (!clk->clksel) 401 return -EINVAL; 402 403 if (clk->parent == new_parent) 404 return 0; 405 406 return omap2_clksel_set_parent(clk, new_parent); 407 } 408 409 /* 410 * OMAP2+ clock reset and init functions 411 */ 412 413 #ifdef CONFIG_OMAP_RESET_CLOCKS 414 void omap2_clk_disable_unused(struct clk *clk) 415 { 416 u32 regval32, v; 417 418 v = (clk->flags & INVERT_ENABLE) ? (1 << clk->enable_bit) : 0; 419 420 regval32 = __raw_readl(clk->enable_reg); 421 if ((regval32 & (1 << clk->enable_bit)) == v) 422 return; 423 424 pr_debug("Disabling unused clock \"%s\"\n", clk->name); 425 if (cpu_is_omap34xx()) { 426 omap2_clk_enable(clk); 427 omap2_clk_disable(clk); 428 } else { 429 clk->ops->disable(clk); 430 } 431 if (clk->clkdm != NULL) 432 pwrdm_state_switch(clk->clkdm->pwrdm.ptr); 433 } 434 #endif 435 436 /** 437 * omap2_clk_switch_mpurate_at_boot - switch ARM MPU rate by boot-time argument 438 * @mpurate_ck_name: clk name of the clock to change rate 439 * 440 * Change the ARM MPU clock rate to the rate specified on the command 441 * line, if one was specified. @mpurate_ck_name should be 442 * "virt_prcm_set" on OMAP2xxx and "dpll1_ck" on OMAP34xx/OMAP36xx. 443 * XXX Does not handle voltage scaling - on OMAP2xxx this is currently 444 * handled by the virt_prcm_set clock, but this should be handled by 445 * the OPP layer. XXX This is intended to be handled by the OPP layer 446 * code in the near future and should be removed from the clock code. 447 * Returns -EINVAL if 'mpurate' is zero or if clk_set_rate() rejects 448 * the rate, -ENOENT if the struct clk referred to by @mpurate_ck_name 449 * cannot be found, or 0 upon success. 450 */ 451 int __init omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name) 452 { 453 struct clk *mpurate_ck; 454 int r; 455 456 if (!mpurate) 457 return -EINVAL; 458 459 mpurate_ck = clk_get(NULL, mpurate_ck_name); 460 if (WARN(IS_ERR(mpurate_ck), "Failed to get %s.\n", mpurate_ck_name)) 461 return -ENOENT; 462 463 r = clk_set_rate(mpurate_ck, mpurate); 464 if (IS_ERR_VALUE(r)) { 465 WARN(1, "clock: %s: unable to set MPU rate to %d: %d\n", 466 mpurate_ck->name, mpurate, r); 467 clk_put(mpurate_ck); 468 return -EINVAL; 469 } 470 471 calibrate_delay(); 472 recalculate_root_clocks(); 473 474 clk_put(mpurate_ck); 475 476 return 0; 477 } 478 479 /** 480 * omap2_clk_print_new_rates - print summary of current clock tree rates 481 * @hfclkin_ck_name: clk name for the off-chip HF oscillator 482 * @core_ck_name: clk name for the on-chip CORE_CLK 483 * @mpu_ck_name: clk name for the ARM MPU clock 484 * 485 * Prints a short message to the console with the HFCLKIN oscillator 486 * rate, the rate of the CORE clock, and the rate of the ARM MPU clock. 487 * Called by the boot-time MPU rate switching code. XXX This is intended 488 * to be handled by the OPP layer code in the near future and should be 489 * removed from the clock code. No return value. 490 */ 491 void __init omap2_clk_print_new_rates(const char *hfclkin_ck_name, 492 const char *core_ck_name, 493 const char *mpu_ck_name) 494 { 495 struct clk *hfclkin_ck, *core_ck, *mpu_ck; 496 unsigned long hfclkin_rate; 497 498 mpu_ck = clk_get(NULL, mpu_ck_name); 499 if (WARN(IS_ERR(mpu_ck), "clock: failed to get %s.\n", mpu_ck_name)) 500 return; 501 502 core_ck = clk_get(NULL, core_ck_name); 503 if (WARN(IS_ERR(core_ck), "clock: failed to get %s.\n", core_ck_name)) 504 return; 505 506 hfclkin_ck = clk_get(NULL, hfclkin_ck_name); 507 if (WARN(IS_ERR(hfclkin_ck), "Failed to get %s.\n", hfclkin_ck_name)) 508 return; 509 510 hfclkin_rate = clk_get_rate(hfclkin_ck); 511 512 pr_info("Switched to new clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n", 513 (hfclkin_rate / 1000000), ((hfclkin_rate / 100000) % 10), 514 (clk_get_rate(core_ck) / 1000000), 515 (clk_get_rate(mpu_ck) / 1000000)); 516 } 517 518 /* Common data */ 519 520 int clk_enable(struct clk *clk) 521 { 522 unsigned long flags; 523 int ret; 524 525 if (clk == NULL || IS_ERR(clk)) 526 return -EINVAL; 527 528 spin_lock_irqsave(&clockfw_lock, flags); 529 ret = omap2_clk_enable(clk); 530 spin_unlock_irqrestore(&clockfw_lock, flags); 531 532 return ret; 533 } 534 EXPORT_SYMBOL(clk_enable); 535 536 void clk_disable(struct clk *clk) 537 { 538 unsigned long flags; 539 540 if (clk == NULL || IS_ERR(clk)) 541 return; 542 543 spin_lock_irqsave(&clockfw_lock, flags); 544 if (clk->usecount == 0) { 545 pr_err("Trying disable clock %s with 0 usecount\n", 546 clk->name); 547 WARN_ON(1); 548 goto out; 549 } 550 551 omap2_clk_disable(clk); 552 553 out: 554 spin_unlock_irqrestore(&clockfw_lock, flags); 555 } 556 EXPORT_SYMBOL(clk_disable); 557 558 unsigned long clk_get_rate(struct clk *clk) 559 { 560 unsigned long flags; 561 unsigned long ret; 562 563 if (clk == NULL || IS_ERR(clk)) 564 return 0; 565 566 spin_lock_irqsave(&clockfw_lock, flags); 567 ret = clk->rate; 568 spin_unlock_irqrestore(&clockfw_lock, flags); 569 570 return ret; 571 } 572 EXPORT_SYMBOL(clk_get_rate); 573 574 /* 575 * Optional clock functions defined in include/linux/clk.h 576 */ 577 578 long clk_round_rate(struct clk *clk, unsigned long rate) 579 { 580 unsigned long flags; 581 long ret; 582 583 if (clk == NULL || IS_ERR(clk)) 584 return 0; 585 586 spin_lock_irqsave(&clockfw_lock, flags); 587 ret = omap2_clk_round_rate(clk, rate); 588 spin_unlock_irqrestore(&clockfw_lock, flags); 589 590 return ret; 591 } 592 EXPORT_SYMBOL(clk_round_rate); 593 594 int clk_set_rate(struct clk *clk, unsigned long rate) 595 { 596 unsigned long flags; 597 int ret = -EINVAL; 598 599 if (clk == NULL || IS_ERR(clk)) 600 return ret; 601 602 spin_lock_irqsave(&clockfw_lock, flags); 603 ret = omap2_clk_set_rate(clk, rate); 604 if (ret == 0) 605 propagate_rate(clk); 606 spin_unlock_irqrestore(&clockfw_lock, flags); 607 608 return ret; 609 } 610 EXPORT_SYMBOL(clk_set_rate); 611 612 int clk_set_parent(struct clk *clk, struct clk *parent) 613 { 614 unsigned long flags; 615 int ret = -EINVAL; 616 617 if (clk == NULL || IS_ERR(clk) || parent == NULL || IS_ERR(parent)) 618 return ret; 619 620 spin_lock_irqsave(&clockfw_lock, flags); 621 if (clk->usecount == 0) { 622 ret = omap2_clk_set_parent(clk, parent); 623 if (ret == 0) 624 propagate_rate(clk); 625 } else { 626 ret = -EBUSY; 627 } 628 spin_unlock_irqrestore(&clockfw_lock, flags); 629 630 return ret; 631 } 632 EXPORT_SYMBOL(clk_set_parent); 633 634 struct clk *clk_get_parent(struct clk *clk) 635 { 636 return clk->parent; 637 } 638 EXPORT_SYMBOL(clk_get_parent); 639 640 /* 641 * OMAP specific clock functions shared between omap1 and omap2 642 */ 643 644 int __initdata mpurate; 645 646 /* 647 * By default we use the rate set by the bootloader. 648 * You can override this with mpurate= cmdline option. 649 */ 650 static int __init omap_clk_setup(char *str) 651 { 652 get_option(&str, &mpurate); 653 654 if (!mpurate) 655 return 1; 656 657 if (mpurate < 1000) 658 mpurate *= 1000000; 659 660 return 1; 661 } 662 __setup("mpurate=", omap_clk_setup); 663 664 /* Used for clocks that always have same value as the parent clock */ 665 unsigned long followparent_recalc(struct clk *clk) 666 { 667 return clk->parent->rate; 668 } 669 670 /* 671 * Used for clocks that have the same value as the parent clock, 672 * divided by some factor 673 */ 674 unsigned long omap_fixed_divisor_recalc(struct clk *clk) 675 { 676 WARN_ON(!clk->fixed_div); 677 678 return clk->parent->rate / clk->fixed_div; 679 } 680 681 void clk_reparent(struct clk *child, struct clk *parent) 682 { 683 list_del_init(&child->sibling); 684 if (parent) 685 list_add(&child->sibling, &parent->children); 686 child->parent = parent; 687 688 /* now do the debugfs renaming to reattach the child 689 to the proper parent */ 690 } 691 692 /* Propagate rate to children */ 693 void propagate_rate(struct clk *tclk) 694 { 695 struct clk *clkp; 696 697 list_for_each_entry(clkp, &tclk->children, sibling) { 698 if (clkp->recalc) 699 clkp->rate = clkp->recalc(clkp); 700 propagate_rate(clkp); 701 } 702 } 703 704 static LIST_HEAD(root_clks); 705 706 /** 707 * recalculate_root_clocks - recalculate and propagate all root clocks 708 * 709 * Recalculates all root clocks (clocks with no parent), which if the 710 * clock's .recalc is set correctly, should also propagate their rates. 711 * Called at init. 712 */ 713 void recalculate_root_clocks(void) 714 { 715 struct clk *clkp; 716 717 list_for_each_entry(clkp, &root_clks, sibling) { 718 if (clkp->recalc) 719 clkp->rate = clkp->recalc(clkp); 720 propagate_rate(clkp); 721 } 722 } 723 724 /** 725 * clk_preinit - initialize any fields in the struct clk before clk init 726 * @clk: struct clk * to initialize 727 * 728 * Initialize any struct clk fields needed before normal clk initialization 729 * can run. No return value. 730 */ 731 void clk_preinit(struct clk *clk) 732 { 733 INIT_LIST_HEAD(&clk->children); 734 } 735 736 int clk_register(struct clk *clk) 737 { 738 if (clk == NULL || IS_ERR(clk)) 739 return -EINVAL; 740 741 /* 742 * trap out already registered clocks 743 */ 744 if (clk->node.next || clk->node.prev) 745 return 0; 746 747 mutex_lock(&clocks_mutex); 748 if (clk->parent) 749 list_add(&clk->sibling, &clk->parent->children); 750 else 751 list_add(&clk->sibling, &root_clks); 752 753 list_add(&clk->node, &clocks); 754 if (clk->init) 755 clk->init(clk); 756 mutex_unlock(&clocks_mutex); 757 758 return 0; 759 } 760 EXPORT_SYMBOL(clk_register); 761 762 void clk_unregister(struct clk *clk) 763 { 764 if (clk == NULL || IS_ERR(clk)) 765 return; 766 767 mutex_lock(&clocks_mutex); 768 list_del(&clk->sibling); 769 list_del(&clk->node); 770 mutex_unlock(&clocks_mutex); 771 } 772 EXPORT_SYMBOL(clk_unregister); 773 774 void clk_enable_init_clocks(void) 775 { 776 struct clk *clkp; 777 778 list_for_each_entry(clkp, &clocks, node) 779 if (clkp->flags & ENABLE_ON_INIT) 780 clk_enable(clkp); 781 } 782 783 /** 784 * omap_clk_get_by_name - locate OMAP struct clk by its name 785 * @name: name of the struct clk to locate 786 * 787 * Locate an OMAP struct clk by its name. Assumes that struct clk 788 * names are unique. Returns NULL if not found or a pointer to the 789 * struct clk if found. 790 */ 791 struct clk *omap_clk_get_by_name(const char *name) 792 { 793 struct clk *c; 794 struct clk *ret = NULL; 795 796 mutex_lock(&clocks_mutex); 797 798 list_for_each_entry(c, &clocks, node) { 799 if (!strcmp(c->name, name)) { 800 ret = c; 801 break; 802 } 803 } 804 805 mutex_unlock(&clocks_mutex); 806 807 return ret; 808 } 809 810 int omap_clk_enable_autoidle_all(void) 811 { 812 struct clk *c; 813 unsigned long flags; 814 815 spin_lock_irqsave(&clockfw_lock, flags); 816 817 list_for_each_entry(c, &clocks, node) 818 if (c->ops->allow_idle) 819 c->ops->allow_idle(c); 820 821 spin_unlock_irqrestore(&clockfw_lock, flags); 822 823 return 0; 824 } 825 826 int omap_clk_disable_autoidle_all(void) 827 { 828 struct clk *c; 829 unsigned long flags; 830 831 spin_lock_irqsave(&clockfw_lock, flags); 832 833 list_for_each_entry(c, &clocks, node) 834 if (c->ops->deny_idle) 835 c->ops->deny_idle(c); 836 837 spin_unlock_irqrestore(&clockfw_lock, flags); 838 839 return 0; 840 } 841 842 /* 843 * Low level helpers 844 */ 845 static int clkll_enable_null(struct clk *clk) 846 { 847 return 0; 848 } 849 850 static void clkll_disable_null(struct clk *clk) 851 { 852 } 853 854 const struct clkops clkops_null = { 855 .enable = clkll_enable_null, 856 .disable = clkll_disable_null, 857 }; 858 859 /* 860 * Dummy clock 861 * 862 * Used for clock aliases that are needed on some OMAPs, but not others 863 */ 864 struct clk dummy_ck = { 865 .name = "dummy", 866 .ops = &clkops_null, 867 }; 868 869 /* 870 * 871 */ 872 873 #ifdef CONFIG_OMAP_RESET_CLOCKS 874 /* 875 * Disable any unused clocks left on by the bootloader 876 */ 877 static int __init clk_disable_unused(void) 878 { 879 struct clk *ck; 880 unsigned long flags; 881 882 pr_info("clock: disabling unused clocks to save power\n"); 883 884 spin_lock_irqsave(&clockfw_lock, flags); 885 list_for_each_entry(ck, &clocks, node) { 886 if (ck->ops == &clkops_null) 887 continue; 888 889 if (ck->usecount > 0 || !ck->enable_reg) 890 continue; 891 892 omap2_clk_disable_unused(ck); 893 } 894 spin_unlock_irqrestore(&clockfw_lock, flags); 895 896 return 0; 897 } 898 late_initcall(clk_disable_unused); 899 late_initcall(omap_clk_enable_autoidle_all); 900 #endif 901 902 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) 903 /* 904 * debugfs support to trace clock tree hierarchy and attributes 905 */ 906 907 #include <linux/debugfs.h> 908 #include <linux/seq_file.h> 909 910 static struct dentry *clk_debugfs_root; 911 912 static int clk_dbg_show_summary(struct seq_file *s, void *unused) 913 { 914 struct clk *c; 915 struct clk *pa; 916 917 mutex_lock(&clocks_mutex); 918 seq_printf(s, "%-30s %-30s %-10s %s\n", 919 "clock-name", "parent-name", "rate", "use-count"); 920 921 list_for_each_entry(c, &clocks, node) { 922 pa = c->parent; 923 seq_printf(s, "%-30s %-30s %-10lu %d\n", 924 c->name, pa ? pa->name : "none", c->rate, 925 c->usecount); 926 } 927 mutex_unlock(&clocks_mutex); 928 929 return 0; 930 } 931 932 static int clk_dbg_open(struct inode *inode, struct file *file) 933 { 934 return single_open(file, clk_dbg_show_summary, inode->i_private); 935 } 936 937 static const struct file_operations debug_clock_fops = { 938 .open = clk_dbg_open, 939 .read = seq_read, 940 .llseek = seq_lseek, 941 .release = single_release, 942 }; 943 944 static int clk_debugfs_register_one(struct clk *c) 945 { 946 int err; 947 struct dentry *d; 948 struct clk *pa = c->parent; 949 950 d = debugfs_create_dir(c->name, pa ? pa->dent : clk_debugfs_root); 951 if (!d) 952 return -ENOMEM; 953 c->dent = d; 954 955 d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount); 956 if (!d) { 957 err = -ENOMEM; 958 goto err_out; 959 } 960 d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate); 961 if (!d) { 962 err = -ENOMEM; 963 goto err_out; 964 } 965 d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags); 966 if (!d) { 967 err = -ENOMEM; 968 goto err_out; 969 } 970 return 0; 971 972 err_out: 973 debugfs_remove_recursive(c->dent); 974 return err; 975 } 976 977 static int clk_debugfs_register(struct clk *c) 978 { 979 int err; 980 struct clk *pa = c->parent; 981 982 if (pa && !pa->dent) { 983 err = clk_debugfs_register(pa); 984 if (err) 985 return err; 986 } 987 988 if (!c->dent) { 989 err = clk_debugfs_register_one(c); 990 if (err) 991 return err; 992 } 993 return 0; 994 } 995 996 static int __init clk_debugfs_init(void) 997 { 998 struct clk *c; 999 struct dentry *d; 1000 int err; 1001 1002 d = debugfs_create_dir("clock", NULL); 1003 if (!d) 1004 return -ENOMEM; 1005 clk_debugfs_root = d; 1006 1007 list_for_each_entry(c, &clocks, node) { 1008 err = clk_debugfs_register(c); 1009 if (err) 1010 goto err_out; 1011 } 1012 1013 d = debugfs_create_file("summary", S_IRUGO, 1014 d, NULL, &debug_clock_fops); 1015 if (!d) 1016 return -ENOMEM; 1017 1018 return 0; 1019 err_out: 1020 debugfs_remove_recursive(clk_debugfs_root); 1021 return err; 1022 } 1023 late_initcall(clk_debugfs_init); 1024 1025 #endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */ 1026 1027