1menu "TI OMAP/AM/DM/DRA Family" 2 depends on ARCH_MULTI_V6 || ARCH_MULTI_V7 3 4config ARCH_OMAP2 5 bool "TI OMAP2" 6 depends on ARCH_MULTI_V6 7 select ARCH_OMAP2PLUS 8 select CPU_V6 9 select SOC_HAS_OMAP2_SDRC 10 11config ARCH_OMAP3 12 bool "TI OMAP3" 13 depends on ARCH_MULTI_V7 14 select ARCH_OMAP2PLUS 15 select ARM_CPU_SUSPEND if PM 16 select OMAP_INTERCONNECT 17 select PM_OPP if PM 18 select PM if CPU_IDLE 19 select SOC_HAS_OMAP2_SDRC 20 select ARM_ERRATA_430973 21 22config ARCH_OMAP4 23 bool "TI OMAP4" 24 depends on ARCH_MULTI_V7 25 select ARCH_OMAP2PLUS 26 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP 27 select ARM_CPU_SUSPEND if PM 28 select ARM_ERRATA_720789 29 select ARM_GIC 30 select HAVE_ARM_SCU if SMP 31 select HAVE_ARM_TWD if SMP 32 select OMAP_INTERCONNECT 33 select OMAP_INTERCONNECT_BARRIER 34 select PL310_ERRATA_588369 if CACHE_L2X0 35 select PL310_ERRATA_727915 if CACHE_L2X0 36 select PM_OPP if PM 37 select PM if CPU_IDLE 38 select ARM_ERRATA_754322 39 select ARM_ERRATA_775420 40 select OMAP_INTERCONNECT 41 42config SOC_OMAP5 43 bool "TI OMAP5" 44 depends on ARCH_MULTI_V7 45 select ARCH_OMAP2PLUS 46 select ARM_CPU_SUSPEND if PM 47 select ARM_GIC 48 select HAVE_ARM_SCU if SMP 49 select HAVE_ARM_ARCH_TIMER 50 select ARM_ERRATA_798181 if SMP 51 select OMAP_INTERCONNECT 52 select OMAP_INTERCONNECT_BARRIER 53 select PM_OPP if PM 54 select ZONE_DMA if ARM_LPAE 55 56config SOC_AM33XX 57 bool "TI AM33XX" 58 depends on ARCH_MULTI_V7 59 select ARCH_OMAP2PLUS 60 select ARM_CPU_SUSPEND if PM 61 62config SOC_AM43XX 63 bool "TI AM43x" 64 depends on ARCH_MULTI_V7 65 select ARCH_OMAP2PLUS 66 select ARM_GIC 67 select MACH_OMAP_GENERIC 68 select MIGHT_HAVE_CACHE_L2X0 69 select HAVE_ARM_SCU 70 select GENERIC_CLOCKEVENTS_BROADCAST 71 select HAVE_ARM_TWD 72 select ARM_ERRATA_754322 73 select ARM_ERRATA_775420 74 select OMAP_INTERCONNECT 75 76config SOC_DRA7XX 77 bool "TI DRA7XX" 78 depends on ARCH_MULTI_V7 79 select ARCH_OMAP2PLUS 80 select ARM_CPU_SUSPEND if PM 81 select ARM_GIC 82 select HAVE_ARM_SCU if SMP 83 select HAVE_ARM_ARCH_TIMER 84 select IRQ_CROSSBAR 85 select ARM_ERRATA_798181 if SMP 86 select OMAP_INTERCONNECT 87 select OMAP_INTERCONNECT_BARRIER 88 select PM_OPP if PM 89 select ZONE_DMA if ARM_LPAE 90 select PINCTRL_TI_IODELAY if OF && PINCTRL 91 92config ARCH_OMAP2PLUS 93 bool 94 select ARCH_HAS_BANDGAP 95 select ARCH_HAS_HOLES_MEMORYMODEL 96 select ARCH_OMAP 97 select CLKSRC_MMIO 98 select GENERIC_IRQ_CHIP 99 select GPIOLIB 100 select MACH_OMAP_GENERIC 101 select MEMORY 102 select MFD_SYSCON 103 select OMAP_DM_TIMER 104 select OMAP_GPMC 105 select PINCTRL 106 select SOC_BUS 107 select OMAP_IRQCHIP 108 select CLKSRC_TI_32K 109 help 110 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5 111 112config OMAP_INTERCONNECT_BARRIER 113 bool 114 select ARM_HEAVY_MB 115 116 117if ARCH_OMAP2PLUS 118 119menu "TI OMAP2/3/4 Specific Features" 120 121config ARCH_OMAP2PLUS_TYPICAL 122 bool "Typical OMAP configuration" 123 default y 124 select AEABI 125 select HIGHMEM 126 select I2C 127 select I2C_OMAP 128 select MENELAUS if ARCH_OMAP2 129 select NEON if CPU_V7 130 select PM 131 select REGULATOR 132 select REGULATOR_FIXED_VOLTAGE 133 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 134 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4 135 select VFP 136 help 137 Compile a kernel suitable for booting most boards 138 139config SOC_HAS_OMAP2_SDRC 140 bool "OMAP2 SDRAM Controller support" 141 142config SOC_HAS_REALTIME_COUNTER 143 bool "Real time free running counter" 144 depends on SOC_OMAP5 || SOC_DRA7XX 145 default y 146 147comment "OMAP Core Type" 148 depends on ARCH_OMAP2 149 150config SOC_OMAP2420 151 bool "OMAP2420 support" 152 depends on ARCH_OMAP2 153 default y 154 select OMAP_DM_TIMER 155 select SOC_HAS_OMAP2_SDRC 156 157config SOC_OMAP2430 158 bool "OMAP2430 support" 159 depends on ARCH_OMAP2 160 default y 161 select SOC_HAS_OMAP2_SDRC 162 163config SOC_OMAP3430 164 bool "OMAP3430 support" 165 depends on ARCH_OMAP3 166 default y 167 select SOC_HAS_OMAP2_SDRC 168 169config SOC_TI81XX 170 bool "TI81XX support" 171 depends on ARCH_OMAP3 172 default y 173 174config OMAP_PACKAGE_CBC 175 bool 176 177config OMAP_PACKAGE_CBB 178 bool 179 180config OMAP_PACKAGE_CUS 181 bool 182 183config OMAP_PACKAGE_CBP 184 bool 185 186comment "OMAP Legacy Platform Data Board Type" 187 depends on ARCH_OMAP2PLUS 188 189config MACH_OMAP_GENERIC 190 bool 191 192config MACH_OMAP2_TUSB6010 193 bool 194 depends on ARCH_OMAP2 && SOC_OMAP2420 195 default y if MACH_NOKIA_N8X0 196 197config MACH_OMAP3517EVM 198 bool "OMAP3517/ AM3517 EVM board" 199 depends on ARCH_OMAP3 200 default y 201 202config MACH_OMAP3_PANDORA 203 bool "OMAP3 Pandora" 204 depends on ARCH_OMAP3 205 default y 206 select OMAP_PACKAGE_CBB 207 208config MACH_NOKIA_N810 209 bool 210 211config MACH_NOKIA_N810_WIMAX 212 bool 213 214config MACH_NOKIA_N8X0 215 bool "Nokia N800/N810" 216 depends on SOC_OMAP2420 217 default y 218 select MACH_NOKIA_N810 219 select MACH_NOKIA_N810_WIMAX 220 221config OMAP3_SDRC_AC_TIMING 222 bool "Enable SDRC AC timing register changes" 223 depends on ARCH_OMAP3 224 default n 225 help 226 If you know that none of your system initiators will attempt to 227 access SDRAM during CORE DVFS, select Y here. This should boost 228 SDRAM performance at lower CORE OPPs. There are relatively few 229 users who will wish to say yes at this point - almost everyone will 230 wish to say no. Selecting yes without understanding what is 231 going on could result in system crashes; 232 233endmenu 234 235endif 236 237config OMAP5_ERRATA_801819 238 bool "Errata 801819: An eviction from L1 data cache might stall indefinitely" 239 depends on SOC_OMAP5 || SOC_DRA7XX 240 help 241 A livelock can occur in the L2 cache arbitration that might prevent 242 a snoop from completing. Under certain conditions this can cause the 243 system to deadlock. 244 245endmenu 246