1menu "TI OMAP/AM/DM/DRA Family" 2 depends on ARCH_MULTI_V6 || ARCH_MULTI_V7 3 4config ARCH_OMAP2 5 bool "TI OMAP2" 6 depends on ARCH_MULTI_V6 7 select ARCH_OMAP2PLUS 8 select CPU_V6 9 select SOC_HAS_OMAP2_SDRC 10 11config ARCH_OMAP3 12 bool "TI OMAP3" 13 depends on ARCH_MULTI_V7 14 select ARCH_OMAP2PLUS 15 select ARM_CPU_SUSPEND if PM 16 select OMAP_INTERCONNECT 17 select PM_OPP if PM 18 select PM if CPU_IDLE 19 select SOC_HAS_OMAP2_SDRC 20 select ARM_ERRATA_430973 21 22config ARCH_OMAP4 23 bool "TI OMAP4" 24 depends on ARCH_MULTI_V7 25 select ARCH_OMAP2PLUS 26 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP 27 select ARM_CPU_SUSPEND if PM 28 select ARM_ERRATA_720789 29 select ARM_GIC 30 select HAVE_ARM_SCU if SMP 31 select HAVE_ARM_TWD if SMP 32 select OMAP_INTERCONNECT 33 select OMAP_INTERCONNECT_BARRIER 34 select PL310_ERRATA_588369 if CACHE_L2X0 35 select PL310_ERRATA_727915 if CACHE_L2X0 36 select PM_OPP if PM 37 select PM if CPU_IDLE 38 select ARM_ERRATA_754322 39 select ARM_ERRATA_775420 40 select OMAP_INTERCONNECT 41 42config SOC_OMAP5 43 bool "TI OMAP5" 44 depends on ARCH_MULTI_V7 45 select ARCH_OMAP2PLUS 46 select ARM_CPU_SUSPEND if PM 47 select ARM_GIC 48 select HAVE_ARM_SCU if SMP 49 select HAVE_ARM_ARCH_TIMER 50 select ARM_ERRATA_798181 if SMP 51 select OMAP_INTERCONNECT 52 select OMAP_INTERCONNECT_BARRIER 53 select PM_OPP if PM 54 select ZONE_DMA if ARM_LPAE 55 56config SOC_AM33XX 57 bool "TI AM33XX" 58 depends on ARCH_MULTI_V7 59 select ARCH_OMAP2PLUS 60 select ARM_CPU_SUSPEND if PM 61 62config SOC_AM43XX 63 bool "TI AM43x" 64 depends on ARCH_MULTI_V7 65 select ARCH_OMAP2PLUS 66 select ARM_GIC 67 select MACH_OMAP_GENERIC 68 select MIGHT_HAVE_CACHE_L2X0 69 select HAVE_ARM_SCU 70 select GENERIC_CLOCKEVENTS_BROADCAST 71 select HAVE_ARM_TWD 72 select ARM_ERRATA_754322 73 select ARM_ERRATA_775420 74 select OMAP_INTERCONNECT 75 76config SOC_DRA7XX 77 bool "TI DRA7XX" 78 depends on ARCH_MULTI_V7 79 select ARCH_OMAP2PLUS 80 select ARM_CPU_SUSPEND if PM 81 select ARM_GIC 82 select HAVE_ARM_SCU if SMP 83 select HAVE_ARM_ARCH_TIMER 84 select IRQ_CROSSBAR 85 select ARM_ERRATA_798181 if SMP 86 select OMAP_INTERCONNECT 87 select OMAP_INTERCONNECT_BARRIER 88 select PM_OPP if PM 89 select ZONE_DMA if ARM_LPAE 90 91config ARCH_OMAP2PLUS 92 bool 93 select ARCH_HAS_BANDGAP 94 select ARCH_HAS_HOLES_MEMORYMODEL 95 select ARCH_OMAP 96 select CLKSRC_MMIO 97 select GENERIC_IRQ_CHIP 98 select GPIOLIB 99 select MACH_OMAP_GENERIC 100 select MEMORY 101 select MFD_SYSCON 102 select OMAP_DM_TIMER 103 select OMAP_GPMC 104 select PINCTRL 105 select SOC_BUS 106 select OMAP_IRQCHIP 107 select CLKSRC_TI_32K 108 help 109 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5 110 111config OMAP_INTERCONNECT_BARRIER 112 bool 113 select ARM_HEAVY_MB 114 115 116if ARCH_OMAP2PLUS 117 118menu "TI OMAP2/3/4 Specific Features" 119 120config ARCH_OMAP2PLUS_TYPICAL 121 bool "Typical OMAP configuration" 122 default y 123 select AEABI 124 select HIGHMEM 125 select I2C 126 select I2C_OMAP 127 select MENELAUS if ARCH_OMAP2 128 select NEON if CPU_V7 129 select PM 130 select REGULATOR 131 select REGULATOR_FIXED_VOLTAGE 132 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 133 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4 134 select VFP 135 help 136 Compile a kernel suitable for booting most boards 137 138config SOC_HAS_OMAP2_SDRC 139 bool "OMAP2 SDRAM Controller support" 140 141config SOC_HAS_REALTIME_COUNTER 142 bool "Real time free running counter" 143 depends on SOC_OMAP5 || SOC_DRA7XX 144 default y 145 146comment "OMAP Core Type" 147 depends on ARCH_OMAP2 148 149config SOC_OMAP2420 150 bool "OMAP2420 support" 151 depends on ARCH_OMAP2 152 default y 153 select OMAP_DM_TIMER 154 select SOC_HAS_OMAP2_SDRC 155 156config SOC_OMAP2430 157 bool "OMAP2430 support" 158 depends on ARCH_OMAP2 159 default y 160 select SOC_HAS_OMAP2_SDRC 161 162config SOC_OMAP3430 163 bool "OMAP3430 support" 164 depends on ARCH_OMAP3 165 default y 166 select SOC_HAS_OMAP2_SDRC 167 168config SOC_TI81XX 169 bool "TI81XX support" 170 depends on ARCH_OMAP3 171 default y 172 173config OMAP_PACKAGE_CBC 174 bool 175 176config OMAP_PACKAGE_CBB 177 bool 178 179config OMAP_PACKAGE_CUS 180 bool 181 182config OMAP_PACKAGE_CBP 183 bool 184 185comment "OMAP Legacy Platform Data Board Type" 186 depends on ARCH_OMAP2PLUS 187 188config MACH_OMAP_GENERIC 189 bool 190 191config MACH_OMAP2_TUSB6010 192 bool 193 depends on ARCH_OMAP2 && SOC_OMAP2420 194 default y if MACH_NOKIA_N8X0 195 196config MACH_OMAP3517EVM 197 bool "OMAP3517/ AM3517 EVM board" 198 depends on ARCH_OMAP3 199 default y 200 201config MACH_OMAP3_PANDORA 202 bool "OMAP3 Pandora" 203 depends on ARCH_OMAP3 204 default y 205 select OMAP_PACKAGE_CBB 206 207config MACH_NOKIA_N810 208 bool 209 210config MACH_NOKIA_N810_WIMAX 211 bool 212 213config MACH_NOKIA_N8X0 214 bool "Nokia N800/N810" 215 depends on SOC_OMAP2420 216 default y 217 select MACH_NOKIA_N810 218 select MACH_NOKIA_N810_WIMAX 219 220config OMAP3_SDRC_AC_TIMING 221 bool "Enable SDRC AC timing register changes" 222 depends on ARCH_OMAP3 223 default n 224 help 225 If you know that none of your system initiators will attempt to 226 access SDRAM during CORE DVFS, select Y here. This should boost 227 SDRAM performance at lower CORE OPPs. There are relatively few 228 users who will wish to say yes at this point - almost everyone will 229 wish to say no. Selecting yes without understanding what is 230 going on could result in system crashes; 231 232endmenu 233 234endif 235 236config OMAP5_ERRATA_801819 237 bool "Errata 801819: An eviction from L1 data cache might stall indefinitely" 238 depends on SOC_OMAP5 || SOC_DRA7XX 239 help 240 A livelock can occur in the L2 cache arbitration that might prevent 241 a snoop from completing. Under certain conditions this can cause the 242 system to deadlock. 243 244endmenu 245