1menu "TI OMAP/AM/DM/DRA Family" 2 depends on ARCH_MULTI_V6 || ARCH_MULTI_V7 3 4config ARCH_OMAP2 5 bool "TI OMAP2" 6 depends on ARCH_MULTI_V6 7 select ARCH_OMAP2PLUS 8 select CPU_V6 9 select SOC_HAS_OMAP2_SDRC 10 11config ARCH_OMAP3 12 bool "TI OMAP3" 13 depends on ARCH_MULTI_V7 14 select ARCH_OMAP2PLUS 15 select ARM_CPU_SUSPEND if PM 16 select OMAP_INTERCONNECT 17 select PM_OPP if PM 18 select PM if CPU_IDLE 19 select SOC_HAS_OMAP2_SDRC 20 select ARM_ERRATA_430973 21 22config ARCH_OMAP4 23 bool "TI OMAP4" 24 depends on ARCH_MULTI_V7 25 select ARCH_OMAP2PLUS 26 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP 27 select ARM_CPU_SUSPEND if PM 28 select ARM_ERRATA_720789 29 select ARM_GIC 30 select HAVE_ARM_SCU if SMP 31 select HAVE_ARM_TWD if SMP 32 select OMAP_INTERCONNECT 33 select OMAP_INTERCONNECT_BARRIER 34 select PL310_ERRATA_588369 if CACHE_L2X0 35 select PL310_ERRATA_727915 if CACHE_L2X0 36 select PM_OPP if PM 37 select PM if CPU_IDLE 38 select ARM_ERRATA_754322 39 select ARM_ERRATA_775420 40 select OMAP_INTERCONNECT 41 42config SOC_OMAP5 43 bool "TI OMAP5" 44 depends on ARCH_MULTI_V7 45 select ARCH_OMAP2PLUS 46 select ARM_CPU_SUSPEND if PM 47 select ARM_GIC 48 select HAVE_ARM_SCU if SMP 49 select HAVE_ARM_ARCH_TIMER 50 select ARM_ERRATA_798181 if SMP 51 select OMAP_INTERCONNECT 52 select OMAP_INTERCONNECT_BARRIER 53 select PM_OPP if PM 54 select ZONE_DMA if ARM_LPAE 55 56config SOC_AM33XX 57 bool "TI AM33XX" 58 depends on ARCH_MULTI_V7 59 select ARCH_OMAP2PLUS 60 select ARM_CPU_SUSPEND if PM 61 62config SOC_AM43XX 63 bool "TI AM43x" 64 depends on ARCH_MULTI_V7 65 select ARCH_OMAP2PLUS 66 select ARM_GIC 67 select MACH_OMAP_GENERIC 68 select MIGHT_HAVE_CACHE_L2X0 69 select HAVE_ARM_SCU 70 select GENERIC_CLOCKEVENTS_BROADCAST 71 select HAVE_ARM_TWD 72 select ARM_ERRATA_754322 73 select ARM_ERRATA_775420 74 select OMAP_INTERCONNECT 75 76config SOC_DRA7XX 77 bool "TI DRA7XX" 78 depends on ARCH_MULTI_V7 79 select ARCH_OMAP2PLUS 80 select ARM_CPU_SUSPEND if PM 81 select ARM_GIC 82 select HAVE_ARM_SCU if SMP 83 select HAVE_ARM_ARCH_TIMER 84 select IRQ_CROSSBAR 85 select ARM_ERRATA_798181 if SMP 86 select OMAP_INTERCONNECT 87 select OMAP_INTERCONNECT_BARRIER 88 select PM_OPP if PM 89 select ZONE_DMA if ARM_LPAE 90 select PINCTRL_TI_IODELAY if OF && PINCTRL 91 92config ARCH_OMAP2PLUS 93 bool 94 select ARCH_HAS_BANDGAP 95 select ARCH_HAS_HOLES_MEMORYMODEL 96 select ARCH_OMAP 97 select CLKSRC_MMIO 98 select GENERIC_IRQ_CHIP 99 select GPIOLIB 100 select MACH_OMAP_GENERIC 101 select MEMORY 102 select MFD_SYSCON 103 select OMAP_DM_TIMER 104 select OMAP_GPMC 105 select PINCTRL 106 select SOC_BUS 107 select TI_SYSC 108 select OMAP_IRQCHIP 109 select CLKSRC_TI_32K 110 help 111 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5 112 113config OMAP_INTERCONNECT_BARRIER 114 bool 115 select ARM_HEAVY_MB 116 117 118if ARCH_OMAP2PLUS 119 120menu "TI OMAP2/3/4 Specific Features" 121 122config ARCH_OMAP2PLUS_TYPICAL 123 bool "Typical OMAP configuration" 124 default y 125 select AEABI 126 select HIGHMEM 127 select I2C 128 select I2C_OMAP 129 select MENELAUS if ARCH_OMAP2 130 select NEON if CPU_V7 131 select PM 132 select REGULATOR 133 select REGULATOR_FIXED_VOLTAGE 134 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 135 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4 136 select VFP 137 help 138 Compile a kernel suitable for booting most boards 139 140config SOC_HAS_OMAP2_SDRC 141 bool "OMAP2 SDRAM Controller support" 142 143config SOC_HAS_REALTIME_COUNTER 144 bool "Real time free running counter" 145 depends on SOC_OMAP5 || SOC_DRA7XX 146 default y 147 148comment "OMAP Core Type" 149 depends on ARCH_OMAP2 150 151config SOC_OMAP2420 152 bool "OMAP2420 support" 153 depends on ARCH_OMAP2 154 default y 155 select OMAP_DM_TIMER 156 select SOC_HAS_OMAP2_SDRC 157 158config SOC_OMAP2430 159 bool "OMAP2430 support" 160 depends on ARCH_OMAP2 161 default y 162 select SOC_HAS_OMAP2_SDRC 163 164config SOC_OMAP3430 165 bool "OMAP3430 support" 166 depends on ARCH_OMAP3 167 default y 168 select SOC_HAS_OMAP2_SDRC 169 170config SOC_TI81XX 171 bool "TI81XX support" 172 depends on ARCH_OMAP3 173 default y 174 175config OMAP_PACKAGE_CBC 176 bool 177 178config OMAP_PACKAGE_CBB 179 bool 180 181config OMAP_PACKAGE_CUS 182 bool 183 184config OMAP_PACKAGE_CBP 185 bool 186 187comment "OMAP Legacy Platform Data Board Type" 188 depends on ARCH_OMAP2PLUS 189 190config MACH_OMAP_GENERIC 191 bool 192 193config MACH_OMAP2_TUSB6010 194 bool 195 depends on ARCH_OMAP2 && SOC_OMAP2420 196 default y if MACH_NOKIA_N8X0 197 198config MACH_OMAP3517EVM 199 bool "OMAP3517/ AM3517 EVM board" 200 depends on ARCH_OMAP3 201 default y 202 203config MACH_OMAP3_PANDORA 204 bool "OMAP3 Pandora" 205 depends on ARCH_OMAP3 206 default y 207 select OMAP_PACKAGE_CBB 208 209config MACH_NOKIA_N810 210 bool 211 212config MACH_NOKIA_N810_WIMAX 213 bool 214 215config MACH_NOKIA_N8X0 216 bool "Nokia N800/N810" 217 depends on SOC_OMAP2420 218 default y 219 select MACH_NOKIA_N810 220 select MACH_NOKIA_N810_WIMAX 221 222config OMAP3_SDRC_AC_TIMING 223 bool "Enable SDRC AC timing register changes" 224 depends on ARCH_OMAP3 225 default n 226 help 227 If you know that none of your system initiators will attempt to 228 access SDRAM during CORE DVFS, select Y here. This should boost 229 SDRAM performance at lower CORE OPPs. There are relatively few 230 users who will wish to say yes at this point - almost everyone will 231 wish to say no. Selecting yes without understanding what is 232 going on could result in system crashes; 233 234endmenu 235 236endif 237 238config OMAP5_ERRATA_801819 239 bool "Errata 801819: An eviction from L1 data cache might stall indefinitely" 240 depends on SOC_OMAP5 || SOC_DRA7XX 241 help 242 A livelock can occur in the L2 cache arbitration that might prevent 243 a snoop from completing. Under certain conditions this can cause the 244 system to deadlock. 245 246endmenu 247