1# SPDX-License-Identifier: GPL-2.0-only 2menu "TI OMAP/AM/DM/DRA Family" 3 depends on ARCH_MULTI_V6 || ARCH_MULTI_V7 4 5config OMAP_HWMOD 6 bool 7 8config ARCH_OMAP2 9 bool "TI OMAP2" 10 depends on ARCH_MULTI_V6 11 select ARCH_OMAP2PLUS 12 select CPU_V6 13 select OMAP_HWMOD 14 select SOC_HAS_OMAP2_SDRC 15 16config ARCH_OMAP3 17 bool "TI OMAP3" 18 depends on ARCH_MULTI_V7 19 select ARCH_OMAP2PLUS 20 select ARM_CPU_SUSPEND 21 select OMAP_HWMOD 22 select OMAP_INTERCONNECT 23 select PM_OPP 24 select SOC_HAS_OMAP2_SDRC 25 select ARM_ERRATA_430973 26 27config ARCH_OMAP4 28 bool "TI OMAP4" 29 depends on ARCH_MULTI_V7 30 select ARCH_OMAP2PLUS 31 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP 32 select ARM_CPU_SUSPEND 33 select ARM_ERRATA_720789 34 select ARM_GIC 35 select HAVE_ARM_SCU if SMP 36 select HAVE_ARM_TWD if SMP 37 select OMAP_INTERCONNECT 38 select OMAP_INTERCONNECT_BARRIER 39 select PL310_ERRATA_588369 if CACHE_L2X0 40 select PL310_ERRATA_727915 if CACHE_L2X0 41 select PM_OPP 42 select PM if CPU_IDLE 43 select ARM_ERRATA_754322 44 select ARM_ERRATA_775420 45 select OMAP_INTERCONNECT 46 47config SOC_OMAP5 48 bool "TI OMAP5" 49 depends on ARCH_MULTI_V7 50 select ARCH_OMAP2PLUS 51 select ARM_CPU_SUSPEND 52 select ARM_GIC 53 select HAVE_ARM_SCU if SMP 54 select HAVE_ARM_ARCH_TIMER 55 select ARM_ERRATA_798181 if SMP 56 select OMAP_INTERCONNECT 57 select OMAP_INTERCONNECT_BARRIER 58 select PM_OPP 59 select ZONE_DMA if ARM_LPAE 60 61config SOC_AM33XX 62 bool "TI AM33XX" 63 depends on ARCH_MULTI_V7 64 select ARCH_OMAP2PLUS 65 select ARM_CPU_SUSPEND 66 67config SOC_AM43XX 68 bool "TI AM43x" 69 depends on ARCH_MULTI_V7 70 select ARCH_OMAP2PLUS 71 select ARM_GIC 72 select MACH_OMAP_GENERIC 73 select HAVE_ARM_SCU 74 select GENERIC_CLOCKEVENTS_BROADCAST 75 select HAVE_ARM_TWD 76 select ARM_ERRATA_754322 77 select ARM_ERRATA_775420 78 select OMAP_INTERCONNECT 79 select ARM_CPU_SUSPEND 80 81config SOC_DRA7XX 82 bool "TI DRA7XX" 83 depends on ARCH_MULTI_V7 84 select ARCH_OMAP2PLUS 85 select ARM_CPU_SUSPEND 86 select ARM_GIC 87 select HAVE_ARM_SCU if SMP 88 select HAVE_ARM_ARCH_TIMER 89 select IRQ_CROSSBAR 90 select ARM_ERRATA_798181 if SMP 91 select OMAP_INTERCONNECT 92 select OMAP_INTERCONNECT_BARRIER 93 select PM_OPP 94 select ZONE_DMA if ARM_LPAE 95 select PINCTRL_TI_IODELAY if OF && PINCTRL 96 97config ARCH_OMAP2PLUS 98 bool 99 select ARCH_HAS_BANDGAP 100 select ARCH_HAS_RESET_CONTROLLER 101 select ARCH_OMAP 102 select CLKSRC_MMIO 103 select GENERIC_IRQ_CHIP 104 select GPIOLIB 105 select MACH_OMAP_GENERIC 106 select MEMORY 107 select MFD_SYSCON 108 select OMAP_DM_TIMER 109 select OMAP_GPMC 110 select PINCTRL 111 select PM 112 select PM_GENERIC_DOMAINS 113 select PM_GENERIC_DOMAINS_OF 114 select RESET_CONTROLLER 115 select SIMPLE_PM_BUS 116 select SOC_BUS 117 select TI_SYSC 118 select OMAP_IRQCHIP 119 select CLKSRC_TI_32K 120 help 121 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5 122 123config OMAP_INTERCONNECT_BARRIER 124 bool 125 select ARM_HEAVY_MB 126 127 128if ARCH_OMAP2PLUS 129 130menu "TI OMAP2/3/4 Specific Features" 131 132config ARCH_OMAP2PLUS_TYPICAL 133 bool "Typical OMAP configuration" 134 default y 135 select AEABI 136 select HIGHMEM 137 select I2C 138 select I2C_OMAP 139 select MENELAUS if ARCH_OMAP2 140 select NEON if CPU_V7 141 select REGULATOR 142 select REGULATOR_FIXED_VOLTAGE 143 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 144 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4 145 select VFP 146 help 147 Compile a kernel suitable for booting most boards 148 149config SOC_HAS_OMAP2_SDRC 150 bool "OMAP2 SDRAM Controller support" 151 152config SOC_HAS_REALTIME_COUNTER 153 bool "Real time free running counter" 154 depends on SOC_OMAP5 || SOC_DRA7XX 155 default y 156 157comment "OMAP Core Type" 158 depends on ARCH_OMAP2 159 160config SOC_OMAP2420 161 bool "OMAP2420 support" 162 depends on ARCH_OMAP2 163 default y 164 select OMAP_DM_TIMER 165 select SOC_HAS_OMAP2_SDRC 166 167config SOC_OMAP2430 168 bool "OMAP2430 support" 169 depends on ARCH_OMAP2 170 default y 171 select SOC_HAS_OMAP2_SDRC 172 173config SOC_OMAP3430 174 bool "OMAP3430 support" 175 depends on ARCH_OMAP3 176 default y 177 select SOC_HAS_OMAP2_SDRC 178 179config SOC_TI81XX 180 bool "TI81XX support" 181 depends on ARCH_OMAP3 182 default y 183 184comment "OMAP Legacy Platform Data Board Type" 185 depends on ARCH_OMAP2PLUS 186 187config MACH_OMAP_GENERIC 188 bool 189 190config MACH_OMAP2_TUSB6010 191 bool 192 depends on ARCH_OMAP2 && SOC_OMAP2420 193 default y if MACH_NOKIA_N8X0 194 195config MACH_NOKIA_N810 196 bool 197 198config MACH_NOKIA_N810_WIMAX 199 bool 200 201config MACH_NOKIA_N8X0 202 bool "Nokia N800/N810" 203 depends on SOC_OMAP2420 204 default y 205 select MACH_NOKIA_N810 206 select MACH_NOKIA_N810_WIMAX 207 208config OMAP3_SDRC_AC_TIMING 209 bool "Enable SDRC AC timing register changes" 210 depends on ARCH_OMAP3 211 help 212 If you know that none of your system initiators will attempt to 213 access SDRAM during CORE DVFS, select Y here. This should boost 214 SDRAM performance at lower CORE OPPs. There are relatively few 215 users who will wish to say yes at this point - almost everyone will 216 wish to say no. Selecting yes without understanding what is 217 going on could result in system crashes; 218 219endmenu 220 221endif 222 223config OMAP5_ERRATA_801819 224 bool "Errata 801819: An eviction from L1 data cache might stall indefinitely" 225 depends on SOC_OMAP5 || SOC_DRA7XX 226 help 227 A livelock can occur in the L2 cache arbitration that might prevent 228 a snoop from completing. Under certain conditions this can cause the 229 system to deadlock. 230 231endmenu 232