1# SPDX-License-Identifier: GPL-2.0-only 2menu "TI OMAP/AM/DM/DRA Family" 3 depends on ARCH_MULTI_V6 || ARCH_MULTI_V7 4 5config ARCH_OMAP2 6 bool "TI OMAP2" 7 depends on ARCH_MULTI_V6 8 select ARCH_OMAP2PLUS 9 select CPU_V6 10 select PM_GENERIC_DOMAINS if PM 11 select SOC_HAS_OMAP2_SDRC 12 13config ARCH_OMAP3 14 bool "TI OMAP3" 15 depends on ARCH_MULTI_V7 16 select ARCH_OMAP2PLUS 17 select ARM_CPU_SUSPEND if PM 18 select OMAP_INTERCONNECT 19 select PM_OPP if PM 20 select PM if CPU_IDLE 21 select SOC_HAS_OMAP2_SDRC 22 select ARM_ERRATA_430973 23 24config ARCH_OMAP4 25 bool "TI OMAP4" 26 depends on ARCH_MULTI_V7 27 select ARCH_OMAP2PLUS 28 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP 29 select ARM_CPU_SUSPEND if PM 30 select ARM_ERRATA_720789 31 select ARM_GIC 32 select HAVE_ARM_SCU if SMP 33 select HAVE_ARM_TWD if SMP 34 select OMAP_INTERCONNECT 35 select OMAP_INTERCONNECT_BARRIER 36 select PL310_ERRATA_588369 if CACHE_L2X0 37 select PL310_ERRATA_727915 if CACHE_L2X0 38 select PM_OPP if PM 39 select PM if CPU_IDLE 40 select ARM_ERRATA_754322 41 select ARM_ERRATA_775420 42 select OMAP_INTERCONNECT 43 44config SOC_OMAP5 45 bool "TI OMAP5" 46 depends on ARCH_MULTI_V7 47 select ARCH_OMAP2PLUS 48 select ARM_CPU_SUSPEND if PM 49 select ARM_GIC 50 select HAVE_ARM_SCU if SMP 51 select HAVE_ARM_ARCH_TIMER 52 select ARM_ERRATA_798181 if SMP 53 select OMAP_INTERCONNECT 54 select OMAP_INTERCONNECT_BARRIER 55 select PM_OPP if PM 56 select ZONE_DMA if ARM_LPAE 57 58config SOC_AM33XX 59 bool "TI AM33XX" 60 depends on ARCH_MULTI_V7 61 select ARCH_OMAP2PLUS 62 select ARM_CPU_SUSPEND if PM 63 64config SOC_AM43XX 65 bool "TI AM43x" 66 depends on ARCH_MULTI_V7 67 select ARCH_OMAP2PLUS 68 select ARM_GIC 69 select MACH_OMAP_GENERIC 70 select HAVE_ARM_SCU 71 select GENERIC_CLOCKEVENTS_BROADCAST 72 select HAVE_ARM_TWD 73 select ARM_ERRATA_754322 74 select ARM_ERRATA_775420 75 select OMAP_INTERCONNECT 76 select ARM_CPU_SUSPEND if PM 77 78config SOC_DRA7XX 79 bool "TI DRA7XX" 80 depends on ARCH_MULTI_V7 81 select ARCH_OMAP2PLUS 82 select ARM_CPU_SUSPEND if PM 83 select ARM_GIC 84 select HAVE_ARM_SCU if SMP 85 select HAVE_ARM_ARCH_TIMER 86 select IRQ_CROSSBAR 87 select ARM_ERRATA_798181 if SMP 88 select OMAP_INTERCONNECT 89 select OMAP_INTERCONNECT_BARRIER 90 select PM_OPP if PM 91 select ZONE_DMA if ARM_LPAE 92 select PINCTRL_TI_IODELAY if OF && PINCTRL 93 94config ARCH_OMAP2PLUS 95 bool 96 select ARCH_HAS_BANDGAP 97 select ARCH_HAS_HOLES_MEMORYMODEL 98 select ARCH_HAS_RESET_CONTROLLER 99 select ARCH_OMAP 100 select CLKSRC_MMIO 101 select GENERIC_IRQ_CHIP 102 select GPIOLIB 103 select MACH_OMAP_GENERIC 104 select MEMORY 105 select MFD_SYSCON 106 select OMAP_DM_TIMER 107 select OMAP_GPMC 108 select PINCTRL 109 select RESET_CONTROLLER 110 select SOC_BUS 111 select TI_SYSC 112 select OMAP_IRQCHIP 113 select CLKSRC_TI_32K 114 help 115 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5 116 117config OMAP_INTERCONNECT_BARRIER 118 bool 119 select ARM_HEAVY_MB 120 121 122if ARCH_OMAP2PLUS 123 124menu "TI OMAP2/3/4 Specific Features" 125 126config ARCH_OMAP2PLUS_TYPICAL 127 bool "Typical OMAP configuration" 128 default y 129 select AEABI 130 select HIGHMEM 131 select I2C 132 select I2C_OMAP 133 select MENELAUS if ARCH_OMAP2 134 select NEON if CPU_V7 135 select PM 136 select REGULATOR 137 select REGULATOR_FIXED_VOLTAGE 138 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4 139 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4 140 select VFP 141 help 142 Compile a kernel suitable for booting most boards 143 144config SOC_HAS_OMAP2_SDRC 145 bool "OMAP2 SDRAM Controller support" 146 147config SOC_HAS_REALTIME_COUNTER 148 bool "Real time free running counter" 149 depends on SOC_OMAP5 || SOC_DRA7XX 150 default y 151 152comment "OMAP Core Type" 153 depends on ARCH_OMAP2 154 155config SOC_OMAP2420 156 bool "OMAP2420 support" 157 depends on ARCH_OMAP2 158 default y 159 select OMAP_DM_TIMER 160 select SOC_HAS_OMAP2_SDRC 161 162config SOC_OMAP2430 163 bool "OMAP2430 support" 164 depends on ARCH_OMAP2 165 default y 166 select SOC_HAS_OMAP2_SDRC 167 168config SOC_OMAP3430 169 bool "OMAP3430 support" 170 depends on ARCH_OMAP3 171 default y 172 select SOC_HAS_OMAP2_SDRC 173 174config SOC_TI81XX 175 bool "TI81XX support" 176 depends on ARCH_OMAP3 177 default y 178 179config OMAP_PACKAGE_CBC 180 bool 181 182config OMAP_PACKAGE_CBB 183 bool 184 185config OMAP_PACKAGE_CUS 186 bool 187 188config OMAP_PACKAGE_CBP 189 bool 190 191comment "OMAP Legacy Platform Data Board Type" 192 depends on ARCH_OMAP2PLUS 193 194config MACH_OMAP_GENERIC 195 bool 196 197config MACH_OMAP2_TUSB6010 198 bool 199 depends on ARCH_OMAP2 && SOC_OMAP2420 200 default y if MACH_NOKIA_N8X0 201 202config MACH_OMAP3517EVM 203 bool "OMAP3517/ AM3517 EVM board" 204 depends on ARCH_OMAP3 205 default y 206 207config MACH_OMAP3_PANDORA 208 bool "OMAP3 Pandora" 209 depends on ARCH_OMAP3 210 default y 211 select OMAP_PACKAGE_CBB 212 213config MACH_NOKIA_N810 214 bool 215 216config MACH_NOKIA_N810_WIMAX 217 bool 218 219config MACH_NOKIA_N8X0 220 bool "Nokia N800/N810" 221 depends on SOC_OMAP2420 222 default y 223 select MACH_NOKIA_N810 224 select MACH_NOKIA_N810_WIMAX 225 226config OMAP3_SDRC_AC_TIMING 227 bool "Enable SDRC AC timing register changes" 228 depends on ARCH_OMAP3 229 help 230 If you know that none of your system initiators will attempt to 231 access SDRAM during CORE DVFS, select Y here. This should boost 232 SDRAM performance at lower CORE OPPs. There are relatively few 233 users who will wish to say yes at this point - almost everyone will 234 wish to say no. Selecting yes without understanding what is 235 going on could result in system crashes; 236 237endmenu 238 239endif 240 241config OMAP5_ERRATA_801819 242 bool "Errata 801819: An eviction from L1 data cache might stall indefinitely" 243 depends on SOC_OMAP5 || SOC_DRA7XX 244 help 245 A livelock can occur in the L2 cache arbitration that might prevent 246 a snoop from completing. Under certain conditions this can cause the 247 system to deadlock. 248 249endmenu 250