xref: /openbmc/linux/arch/arm/mach-omap2/Kconfig (revision 4f3c8320)
1# SPDX-License-Identifier: GPL-2.0-only
2menu "TI OMAP/AM/DM/DRA Family"
3	depends on ARCH_MULTI_V6 || ARCH_MULTI_V7
4
5config OMAP_HWMOD
6	bool
7
8config ARCH_OMAP2
9	bool "TI OMAP2"
10	depends on ARCH_MULTI_V6
11	select ARCH_OMAP2PLUS
12	select CPU_V6
13	select OMAP_HWMOD
14	select SOC_HAS_OMAP2_SDRC
15
16config ARCH_OMAP3
17	bool "TI OMAP3"
18	depends on ARCH_MULTI_V7
19	select ARCH_OMAP2PLUS
20	select ARM_CPU_SUSPEND if PM
21	select OMAP_HWMOD
22	select OMAP_INTERCONNECT
23	select PM_OPP if PM
24	select PM if CPU_IDLE
25	select SOC_HAS_OMAP2_SDRC
26	select ARM_ERRATA_430973
27
28config ARCH_OMAP4
29	bool "TI OMAP4"
30	depends on ARCH_MULTI_V7
31	select ARCH_OMAP2PLUS
32	select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
33	select ARM_CPU_SUSPEND if PM
34	select ARM_ERRATA_720789
35	select ARM_GIC
36	select HAVE_ARM_SCU if SMP
37	select HAVE_ARM_TWD if SMP
38	select OMAP_HWMOD
39	select OMAP_INTERCONNECT
40	select OMAP_INTERCONNECT_BARRIER
41	select PL310_ERRATA_588369 if CACHE_L2X0
42	select PL310_ERRATA_727915 if CACHE_L2X0
43	select PM_OPP if PM
44	select PM if CPU_IDLE
45	select ARM_ERRATA_754322
46	select ARM_ERRATA_775420
47	select OMAP_INTERCONNECT
48
49config SOC_OMAP5
50	bool "TI OMAP5"
51	depends on ARCH_MULTI_V7
52	select ARCH_OMAP2PLUS
53	select ARM_CPU_SUSPEND if PM
54	select ARM_GIC
55	select HAVE_ARM_SCU if SMP
56	select HAVE_ARM_ARCH_TIMER
57	select ARM_ERRATA_798181 if SMP
58	select OMAP_HWMOD
59	select OMAP_INTERCONNECT
60	select OMAP_INTERCONNECT_BARRIER
61	select PM_OPP if PM
62	select ZONE_DMA if ARM_LPAE
63
64config SOC_AM33XX
65	bool "TI AM33XX"
66	depends on ARCH_MULTI_V7
67	select ARCH_OMAP2PLUS
68	select ARM_CPU_SUSPEND if PM
69
70config SOC_AM43XX
71	bool "TI AM43x"
72	depends on ARCH_MULTI_V7
73	select ARCH_OMAP2PLUS
74	select ARM_GIC
75	select MACH_OMAP_GENERIC
76	select HAVE_ARM_SCU
77	select GENERIC_CLOCKEVENTS_BROADCAST
78	select HAVE_ARM_TWD
79	select ARM_ERRATA_754322
80	select ARM_ERRATA_775420
81	select OMAP_INTERCONNECT
82	select ARM_CPU_SUSPEND if PM
83
84config SOC_DRA7XX
85	bool "TI DRA7XX"
86	depends on ARCH_MULTI_V7
87	select ARCH_OMAP2PLUS
88	select ARM_CPU_SUSPEND if PM
89	select ARM_GIC
90	select HAVE_ARM_SCU if SMP
91	select HAVE_ARM_ARCH_TIMER
92	select IRQ_CROSSBAR
93	select ARM_ERRATA_798181 if SMP
94	select OMAP_HWMOD
95	select OMAP_INTERCONNECT
96	select OMAP_INTERCONNECT_BARRIER
97	select PM_OPP if PM
98	select ZONE_DMA if ARM_LPAE
99	select PINCTRL_TI_IODELAY if OF && PINCTRL
100
101config ARCH_OMAP2PLUS
102	bool
103	select ARCH_HAS_BANDGAP
104	select ARCH_HAS_RESET_CONTROLLER
105	select ARCH_OMAP
106	select CLKSRC_MMIO
107	select GENERIC_IRQ_CHIP
108	select GPIOLIB
109	select MACH_OMAP_GENERIC
110	select MEMORY
111	select MFD_SYSCON
112	select OMAP_DM_TIMER
113	select OMAP_GPMC
114	select PINCTRL
115	select PM_GENERIC_DOMAINS if PM
116	select PM_GENERIC_DOMAINS_OF if PM
117	select RESET_CONTROLLER
118	select SOC_BUS
119	select TI_SYSC
120	select OMAP_IRQCHIP
121	select CLKSRC_TI_32K
122	help
123	  Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
124
125config OMAP_INTERCONNECT_BARRIER
126	bool
127	select ARM_HEAVY_MB
128
129
130if ARCH_OMAP2PLUS
131
132menu "TI OMAP2/3/4 Specific Features"
133
134config ARCH_OMAP2PLUS_TYPICAL
135	bool "Typical OMAP configuration"
136	default y
137	select AEABI
138	select HIGHMEM
139	select I2C
140	select I2C_OMAP
141	select MENELAUS if ARCH_OMAP2
142	select NEON if CPU_V7
143	select PM
144	select REGULATOR
145	select REGULATOR_FIXED_VOLTAGE
146	select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
147	select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
148	select VFP
149	help
150	  Compile a kernel suitable for booting most boards
151
152config SOC_HAS_OMAP2_SDRC
153	bool "OMAP2 SDRAM Controller support"
154
155config SOC_HAS_REALTIME_COUNTER
156	bool "Real time free running counter"
157	depends on SOC_OMAP5 || SOC_DRA7XX
158	default y
159
160comment "OMAP Core Type"
161	depends on ARCH_OMAP2
162
163config SOC_OMAP2420
164	bool "OMAP2420 support"
165	depends on ARCH_OMAP2
166	default y
167	select OMAP_DM_TIMER
168	select SOC_HAS_OMAP2_SDRC
169
170config SOC_OMAP2430
171	bool "OMAP2430 support"
172	depends on ARCH_OMAP2
173	default y
174	select SOC_HAS_OMAP2_SDRC
175
176config SOC_OMAP3430
177	bool "OMAP3430 support"
178	depends on ARCH_OMAP3
179	default y
180	select SOC_HAS_OMAP2_SDRC
181
182config SOC_TI81XX
183	bool "TI81XX support"
184	depends on ARCH_OMAP3
185	default y
186
187config OMAP_PACKAGE_CBC
188       bool
189
190config OMAP_PACKAGE_CBB
191       bool
192
193config OMAP_PACKAGE_CUS
194       bool
195
196config OMAP_PACKAGE_CBP
197       bool
198
199comment "OMAP Legacy Platform Data Board Type"
200	depends on ARCH_OMAP2PLUS
201
202config MACH_OMAP_GENERIC
203	bool
204
205config MACH_OMAP2_TUSB6010
206	bool
207	depends on ARCH_OMAP2 && SOC_OMAP2420
208	default y if MACH_NOKIA_N8X0
209
210config MACH_OMAP3517EVM
211	bool "OMAP3517/ AM3517 EVM board"
212	depends on ARCH_OMAP3
213	default y
214
215config MACH_OMAP3_PANDORA
216	bool "OMAP3 Pandora"
217	depends on ARCH_OMAP3
218	default y
219	select OMAP_PACKAGE_CBB
220
221config MACH_NOKIA_N810
222       bool
223
224config MACH_NOKIA_N810_WIMAX
225       bool
226
227config MACH_NOKIA_N8X0
228	bool "Nokia N800/N810"
229	depends on SOC_OMAP2420
230	default y
231	select MACH_NOKIA_N810
232	select MACH_NOKIA_N810_WIMAX
233
234config OMAP3_SDRC_AC_TIMING
235	bool "Enable SDRC AC timing register changes"
236	depends on ARCH_OMAP3
237	help
238	  If you know that none of your system initiators will attempt to
239	  access SDRAM during CORE DVFS, select Y here.  This should boost
240	  SDRAM performance at lower CORE OPPs.  There are relatively few
241	  users who will wish to say yes at this point - almost everyone will
242	  wish to say no.  Selecting yes without understanding what is
243	  going on could result in system crashes;
244
245endmenu
246
247endif
248
249config OMAP5_ERRATA_801819
250	bool "Errata 801819: An eviction from L1 data cache might stall indefinitely"
251	depends on SOC_OMAP5 || SOC_DRA7XX
252	help
253	  A livelock can occur in the L2 cache arbitration that might prevent
254	  a snoop from completing. Under certain conditions this can cause the
255	  system to deadlock.
256
257endmenu
258