xref: /openbmc/linux/arch/arm/mach-omap1/timer32k.c (revision 4800cd83)
1 /*
2  * linux/arch/arm/mach-omap1/timer32k.c
3  *
4  * OMAP 32K Timer
5  *
6  * Copyright (C) 2004 - 2005 Nokia Corporation
7  * Partial timer rewrite and additional dynamic tick timer support by
8  * Tony Lindgen <tony@atomide.com> and
9  * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
10  * OMAP Dual-mode timer framework support by Timo Teras
11  *
12  * MPU timer code based on the older MPU timer code for OMAP
13  * Copyright (C) 2000 RidgeRun, Inc.
14  * Author: Greg Lonnon <glonnon@ridgerun.com>
15  *
16  * This program is free software; you can redistribute it and/or modify it
17  * under the terms of the GNU General Public License as published by the
18  * Free Software Foundation; either version 2 of the License, or (at your
19  * option) any later version.
20  *
21  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
22  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
23  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
24  * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
28  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  *
32  * You should have received a copy of the  GNU General Public License along
33  * with this program; if not, write  to the Free Software Foundation, Inc.,
34  * 675 Mass Ave, Cambridge, MA 02139, USA.
35  */
36 
37 #include <linux/kernel.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
40 #include <linux/interrupt.h>
41 #include <linux/sched.h>
42 #include <linux/spinlock.h>
43 #include <linux/err.h>
44 #include <linux/clk.h>
45 #include <linux/clocksource.h>
46 #include <linux/clockchips.h>
47 #include <linux/io.h>
48 
49 #include <asm/system.h>
50 #include <mach/hardware.h>
51 #include <asm/leds.h>
52 #include <asm/irq.h>
53 #include <asm/mach/irq.h>
54 #include <asm/mach/time.h>
55 #include <plat/common.h>
56 #include <plat/dmtimer.h>
57 
58 /*
59  * ---------------------------------------------------------------------------
60  * 32KHz OS timer
61  *
62  * This currently works only on 16xx, as 1510 does not have the continuous
63  * 32KHz synchronous timer. The 32KHz synchronous timer is used to keep track
64  * of time in addition to the 32KHz OS timer. Using only the 32KHz OS timer
65  * on 1510 would be possible, but the timer would not be as accurate as
66  * with the 32KHz synchronized timer.
67  * ---------------------------------------------------------------------------
68  */
69 
70 /* 16xx specific defines */
71 #define OMAP1_32K_TIMER_BASE		0xfffb9000
72 #define OMAP1_32K_TIMER_CR		0x08
73 #define OMAP1_32K_TIMER_TVR		0x00
74 #define OMAP1_32K_TIMER_TCR		0x04
75 
76 #define OMAP_32K_TICKS_PER_SEC		(32768)
77 
78 /*
79  * TRM says 1 / HZ = ( TVR + 1) / 32768, so TRV = (32768 / HZ) - 1
80  * so with HZ = 128, TVR = 255.
81  */
82 #define OMAP_32K_TIMER_TICK_PERIOD	((OMAP_32K_TICKS_PER_SEC / HZ) - 1)
83 
84 #define JIFFIES_TO_HW_TICKS(nr_jiffies, clock_rate)			\
85 				(((nr_jiffies) * (clock_rate)) / HZ)
86 
87 static inline void omap_32k_timer_write(int val, int reg)
88 {
89 	omap_writew(val, OMAP1_32K_TIMER_BASE + reg);
90 }
91 
92 static inline unsigned long omap_32k_timer_read(int reg)
93 {
94 	return omap_readl(OMAP1_32K_TIMER_BASE + reg) & 0xffffff;
95 }
96 
97 static inline void omap_32k_timer_start(unsigned long load_val)
98 {
99 	if (!load_val)
100 		load_val = 1;
101 	omap_32k_timer_write(load_val, OMAP1_32K_TIMER_TVR);
102 	omap_32k_timer_write(0x0f, OMAP1_32K_TIMER_CR);
103 }
104 
105 static inline void omap_32k_timer_stop(void)
106 {
107 	omap_32k_timer_write(0x0, OMAP1_32K_TIMER_CR);
108 }
109 
110 #define omap_32k_timer_ack_irq()
111 
112 static int omap_32k_timer_set_next_event(unsigned long delta,
113 					 struct clock_event_device *dev)
114 {
115 	omap_32k_timer_start(delta);
116 
117 	return 0;
118 }
119 
120 static void omap_32k_timer_set_mode(enum clock_event_mode mode,
121 				    struct clock_event_device *evt)
122 {
123 	omap_32k_timer_stop();
124 
125 	switch (mode) {
126 	case CLOCK_EVT_MODE_PERIODIC:
127 		omap_32k_timer_start(OMAP_32K_TIMER_TICK_PERIOD);
128 		break;
129 	case CLOCK_EVT_MODE_ONESHOT:
130 	case CLOCK_EVT_MODE_UNUSED:
131 	case CLOCK_EVT_MODE_SHUTDOWN:
132 		break;
133 	case CLOCK_EVT_MODE_RESUME:
134 		break;
135 	}
136 }
137 
138 static struct clock_event_device clockevent_32k_timer = {
139 	.name		= "32k-timer",
140 	.features       = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
141 	.shift		= 32,
142 	.set_next_event	= omap_32k_timer_set_next_event,
143 	.set_mode	= omap_32k_timer_set_mode,
144 };
145 
146 static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id)
147 {
148 	struct clock_event_device *evt = &clockevent_32k_timer;
149 	omap_32k_timer_ack_irq();
150 
151 	evt->event_handler(evt);
152 
153 	return IRQ_HANDLED;
154 }
155 
156 static struct irqaction omap_32k_timer_irq = {
157 	.name		= "32KHz timer",
158 	.flags		= IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
159 	.handler	= omap_32k_timer_interrupt,
160 };
161 
162 static __init void omap_init_32k_timer(void)
163 {
164 	setup_irq(INT_OS_TIMER, &omap_32k_timer_irq);
165 
166 	clockevent_32k_timer.mult = div_sc(OMAP_32K_TICKS_PER_SEC,
167 					   NSEC_PER_SEC,
168 					   clockevent_32k_timer.shift);
169 	clockevent_32k_timer.max_delta_ns =
170 		clockevent_delta2ns(0xfffffffe, &clockevent_32k_timer);
171 	clockevent_32k_timer.min_delta_ns =
172 		clockevent_delta2ns(1, &clockevent_32k_timer);
173 
174 	clockevent_32k_timer.cpumask = cpumask_of(0);
175 	clockevents_register_device(&clockevent_32k_timer);
176 }
177 
178 /*
179  * ---------------------------------------------------------------------------
180  * Timer initialization
181  * ---------------------------------------------------------------------------
182  */
183 bool __init omap_32k_timer_init(void)
184 {
185 	omap_init_clocksource_32k();
186 
187 #ifdef CONFIG_OMAP_DM_TIMER
188 	omap_dm_timer_init();
189 #endif
190 	omap_init_32k_timer();
191 
192 	return true;
193 }
194