15a729246SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2206fa766SAditya Srivastava /*
397933d6cSTarun Kanti DebBarma * OMAP1 Dual-Mode Timers - platform device registration
497933d6cSTarun Kanti DebBarma *
597933d6cSTarun Kanti DebBarma * Contains first level initialization routines which internally
697933d6cSTarun Kanti DebBarma * generates timer device information and registers with linux
7764e4ef0SMarkus Elfring * device model. It also has a low level function to change the timer
897933d6cSTarun Kanti DebBarma * input clock source.
997933d6cSTarun Kanti DebBarma *
10e9dbebafSAlexander A. Klimov * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
1197933d6cSTarun Kanti DebBarma * Tarun Kanti DebBarma <tarun.kanti@ti.com>
1297933d6cSTarun Kanti DebBarma * Thara Gopinath <thara@ti.com>
1397933d6cSTarun Kanti DebBarma */
1497933d6cSTarun Kanti DebBarma
1597933d6cSTarun Kanti DebBarma #include <linux/clk.h>
1697933d6cSTarun Kanti DebBarma #include <linux/io.h>
1797933d6cSTarun Kanti DebBarma #include <linux/err.h>
1897933d6cSTarun Kanti DebBarma #include <linux/slab.h>
1997933d6cSTarun Kanti DebBarma #include <linux/platform_device.h>
2040fc3bb5SJon Hunter #include <linux/platform_data/dmtimer-omap.h>
217e0a9e62SArnd Bergmann #include <linux/soc/ti/omap1-io.h>
2297933d6cSTarun Kanti DebBarma
235ca467c4SKeerthy #include <clocksource/timer-ti-dm.h>
2497933d6cSTarun Kanti DebBarma
25685e2d08STony Lindgren #include "soc.h"
26685e2d08STony Lindgren
2797933d6cSTarun Kanti DebBarma #define OMAP1610_GPTIMER1_BASE 0xfffb1400
2897933d6cSTarun Kanti DebBarma #define OMAP1610_GPTIMER2_BASE 0xfffb1c00
2997933d6cSTarun Kanti DebBarma #define OMAP1610_GPTIMER3_BASE 0xfffb2400
3097933d6cSTarun Kanti DebBarma #define OMAP1610_GPTIMER4_BASE 0xfffb2c00
3197933d6cSTarun Kanti DebBarma #define OMAP1610_GPTIMER5_BASE 0xfffb3400
3297933d6cSTarun Kanti DebBarma #define OMAP1610_GPTIMER6_BASE 0xfffb3c00
3397933d6cSTarun Kanti DebBarma #define OMAP1610_GPTIMER7_BASE 0xfffb7400
3497933d6cSTarun Kanti DebBarma #define OMAP1610_GPTIMER8_BASE 0xfffbd400
3597933d6cSTarun Kanti DebBarma
3697933d6cSTarun Kanti DebBarma #define OMAP1_DM_TIMER_COUNT 8
3797933d6cSTarun Kanti DebBarma
omap1_dm_timer_set_src(struct platform_device * pdev,int source)3897933d6cSTarun Kanti DebBarma static int omap1_dm_timer_set_src(struct platform_device *pdev,
3997933d6cSTarun Kanti DebBarma int source)
4097933d6cSTarun Kanti DebBarma {
4197933d6cSTarun Kanti DebBarma int n = (pdev->id - 1) << 1;
4297933d6cSTarun Kanti DebBarma u32 l;
4397933d6cSTarun Kanti DebBarma
446aaec67dSPaul Walmsley l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n);
4597933d6cSTarun Kanti DebBarma l |= source << n;
466aaec67dSPaul Walmsley omap_writel(l, MOD_CONF_CTRL_1);
4797933d6cSTarun Kanti DebBarma
4897933d6cSTarun Kanti DebBarma return 0;
4997933d6cSTarun Kanti DebBarma }
5097933d6cSTarun Kanti DebBarma
omap1_dm_timer_init(void)518c3d4534SPaul Walmsley static int __init omap1_dm_timer_init(void)
5297933d6cSTarun Kanti DebBarma {
5397933d6cSTarun Kanti DebBarma int i;
5497933d6cSTarun Kanti DebBarma int ret;
5597933d6cSTarun Kanti DebBarma struct dmtimer_platform_data *pdata;
5697933d6cSTarun Kanti DebBarma struct platform_device *pdev;
5797933d6cSTarun Kanti DebBarma
5897933d6cSTarun Kanti DebBarma if (!cpu_is_omap16xx())
5997933d6cSTarun Kanti DebBarma return 0;
6097933d6cSTarun Kanti DebBarma
6197933d6cSTarun Kanti DebBarma for (i = 1; i <= OMAP1_DM_TIMER_COUNT; i++) {
6297933d6cSTarun Kanti DebBarma struct resource res[2];
6397933d6cSTarun Kanti DebBarma u32 base, irq;
6497933d6cSTarun Kanti DebBarma
6597933d6cSTarun Kanti DebBarma switch (i) {
6697933d6cSTarun Kanti DebBarma case 1:
6797933d6cSTarun Kanti DebBarma base = OMAP1610_GPTIMER1_BASE;
6897933d6cSTarun Kanti DebBarma irq = INT_1610_GPTIMER1;
6997933d6cSTarun Kanti DebBarma break;
7097933d6cSTarun Kanti DebBarma case 2:
7197933d6cSTarun Kanti DebBarma base = OMAP1610_GPTIMER2_BASE;
7297933d6cSTarun Kanti DebBarma irq = INT_1610_GPTIMER2;
7397933d6cSTarun Kanti DebBarma break;
7497933d6cSTarun Kanti DebBarma case 3:
7597933d6cSTarun Kanti DebBarma base = OMAP1610_GPTIMER3_BASE;
7697933d6cSTarun Kanti DebBarma irq = INT_1610_GPTIMER3;
7797933d6cSTarun Kanti DebBarma break;
7897933d6cSTarun Kanti DebBarma case 4:
7997933d6cSTarun Kanti DebBarma base = OMAP1610_GPTIMER4_BASE;
8097933d6cSTarun Kanti DebBarma irq = INT_1610_GPTIMER4;
8197933d6cSTarun Kanti DebBarma break;
8297933d6cSTarun Kanti DebBarma case 5:
8397933d6cSTarun Kanti DebBarma base = OMAP1610_GPTIMER5_BASE;
8497933d6cSTarun Kanti DebBarma irq = INT_1610_GPTIMER5;
8597933d6cSTarun Kanti DebBarma break;
8697933d6cSTarun Kanti DebBarma case 6:
8797933d6cSTarun Kanti DebBarma base = OMAP1610_GPTIMER6_BASE;
8897933d6cSTarun Kanti DebBarma irq = INT_1610_GPTIMER6;
8997933d6cSTarun Kanti DebBarma break;
9097933d6cSTarun Kanti DebBarma case 7:
9197933d6cSTarun Kanti DebBarma base = OMAP1610_GPTIMER7_BASE;
9297933d6cSTarun Kanti DebBarma irq = INT_1610_GPTIMER7;
9397933d6cSTarun Kanti DebBarma break;
9497933d6cSTarun Kanti DebBarma case 8:
9597933d6cSTarun Kanti DebBarma base = OMAP1610_GPTIMER8_BASE;
9697933d6cSTarun Kanti DebBarma irq = INT_1610_GPTIMER8;
9797933d6cSTarun Kanti DebBarma break;
9897933d6cSTarun Kanti DebBarma default:
9997933d6cSTarun Kanti DebBarma /*
10097933d6cSTarun Kanti DebBarma * not supposed to reach here.
10197933d6cSTarun Kanti DebBarma * this is to remove warning.
10297933d6cSTarun Kanti DebBarma */
10397933d6cSTarun Kanti DebBarma return -EINVAL;
10497933d6cSTarun Kanti DebBarma }
10597933d6cSTarun Kanti DebBarma
10697933d6cSTarun Kanti DebBarma pdev = platform_device_alloc("omap_timer", i);
10797933d6cSTarun Kanti DebBarma if (!pdev) {
10897933d6cSTarun Kanti DebBarma pr_err("%s: Failed to device alloc for dmtimer%d\n",
10997933d6cSTarun Kanti DebBarma __func__, i);
11097933d6cSTarun Kanti DebBarma return -ENOMEM;
11197933d6cSTarun Kanti DebBarma }
11297933d6cSTarun Kanti DebBarma
11397933d6cSTarun Kanti DebBarma memset(res, 0, 2 * sizeof(struct resource));
11497933d6cSTarun Kanti DebBarma res[0].start = base;
11597933d6cSTarun Kanti DebBarma res[0].end = base + 0x46;
11697933d6cSTarun Kanti DebBarma res[0].flags = IORESOURCE_MEM;
11797933d6cSTarun Kanti DebBarma res[1].start = irq;
11897933d6cSTarun Kanti DebBarma res[1].end = irq;
11997933d6cSTarun Kanti DebBarma res[1].flags = IORESOURCE_IRQ;
12097933d6cSTarun Kanti DebBarma ret = platform_device_add_resources(pdev, res,
12197933d6cSTarun Kanti DebBarma ARRAY_SIZE(res));
12297933d6cSTarun Kanti DebBarma if (ret) {
12397933d6cSTarun Kanti DebBarma dev_err(&pdev->dev, "%s: Failed to add resources.\n",
12497933d6cSTarun Kanti DebBarma __func__);
12597933d6cSTarun Kanti DebBarma goto err_free_pdev;
12697933d6cSTarun Kanti DebBarma }
12797933d6cSTarun Kanti DebBarma
12897933d6cSTarun Kanti DebBarma pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
12997933d6cSTarun Kanti DebBarma if (!pdata) {
13097933d6cSTarun Kanti DebBarma ret = -ENOMEM;
13197933d6cSTarun Kanti DebBarma goto err_free_pdata;
13297933d6cSTarun Kanti DebBarma }
13397933d6cSTarun Kanti DebBarma
13497933d6cSTarun Kanti DebBarma pdata->set_timer_src = omap1_dm_timer_set_src;
1356615975bSJon Hunter pdata->timer_capability = OMAP_TIMER_ALWON |
1365c3e4ec4SJon Hunter OMAP_TIMER_NEEDS_RESET | OMAP_TIMER_HAS_DSP_IRQ;
13797933d6cSTarun Kanti DebBarma
13897933d6cSTarun Kanti DebBarma ret = platform_device_add_data(pdev, pdata, sizeof(*pdata));
13997933d6cSTarun Kanti DebBarma if (ret) {
14097933d6cSTarun Kanti DebBarma dev_err(&pdev->dev, "%s: Failed to add platform data.\n",
14197933d6cSTarun Kanti DebBarma __func__);
14297933d6cSTarun Kanti DebBarma goto err_free_pdata;
14397933d6cSTarun Kanti DebBarma }
14497933d6cSTarun Kanti DebBarma
14597933d6cSTarun Kanti DebBarma ret = platform_device_add(pdev);
14697933d6cSTarun Kanti DebBarma if (ret) {
14797933d6cSTarun Kanti DebBarma dev_err(&pdev->dev, "%s: Failed to add platform device.\n",
14897933d6cSTarun Kanti DebBarma __func__);
14997933d6cSTarun Kanti DebBarma goto err_free_pdata;
15097933d6cSTarun Kanti DebBarma }
15197933d6cSTarun Kanti DebBarma
15297933d6cSTarun Kanti DebBarma dev_dbg(&pdev->dev, " Registered.\n");
15397933d6cSTarun Kanti DebBarma }
15497933d6cSTarun Kanti DebBarma
15597933d6cSTarun Kanti DebBarma return 0;
15697933d6cSTarun Kanti DebBarma
15797933d6cSTarun Kanti DebBarma err_free_pdata:
15897933d6cSTarun Kanti DebBarma kfree(pdata);
15997933d6cSTarun Kanti DebBarma
16097933d6cSTarun Kanti DebBarma err_free_pdev:
161*0414a100SYang Yingliang platform_device_put(pdev);
16297933d6cSTarun Kanti DebBarma
16397933d6cSTarun Kanti DebBarma return ret;
16497933d6cSTarun Kanti DebBarma }
16597933d6cSTarun Kanti DebBarma arch_initcall(omap1_dm_timer_init);
166