199f143b3STony Lindgren/* 299f143b3STony Lindgren * linux/arch/arm/plat-omap/sram-fn.S 399f143b3STony Lindgren * 499f143b3STony Lindgren * Functions that need to be run in internal SRAM 599f143b3STony Lindgren * 699f143b3STony Lindgren * This program is free software; you can redistribute it and/or modify 799f143b3STony Lindgren * it under the terms of the GNU General Public License version 2 as 899f143b3STony Lindgren * published by the Free Software Foundation. 999f143b3STony Lindgren */ 1099f143b3STony Lindgren 1199f143b3STony Lindgren#include <linux/linkage.h> 1299f143b3STony Lindgren#include <asm/assembler.h> 1399f143b3STony Lindgren#include <asm/arch/io.h> 1499f143b3STony Lindgren#include <asm/hardware.h> 1599f143b3STony Lindgren 1699f143b3STony Lindgren .text 1799f143b3STony Lindgren 1899f143b3STony Lindgren/* 1999f143b3STony Lindgren * Reprograms ULPD and CKCTL. 2099f143b3STony Lindgren */ 2199f143b3STony LindgrenENTRY(sram_reprogram_clock) 2299f143b3STony Lindgren stmfd sp!, {r0 - r12, lr} @ save registers on stack 2399f143b3STony Lindgren 2499f143b3STony Lindgren mov r2, #IO_ADDRESS(DPLL_CTL) & 0xff000000 2599f143b3STony Lindgren orr r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x00ff0000 2699f143b3STony Lindgren orr r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x0000ff00 2799f143b3STony Lindgren 2899f143b3STony Lindgren mov r3, #IO_ADDRESS(ARM_CKCTL) & 0xff000000 2999f143b3STony Lindgren orr r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x00ff0000 3099f143b3STony Lindgren orr r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x0000ff00 3199f143b3STony Lindgren 3299f143b3STony Lindgren tst r0, #1 << 4 @ want lock mode? 3399f143b3STony Lindgren beq newck @ nope 3499f143b3STony Lindgren bic r0, r0, #1 << 4 @ else clear lock bit 3599f143b3STony Lindgren strh r0, [r2] @ set dpll into bypass mode 3699f143b3STony Lindgren orr r0, r0, #1 << 4 @ set lock bit again 3799f143b3STony Lindgren 3899f143b3STony Lindgrennewck: 3999f143b3STony Lindgren strh r1, [r3] @ write new ckctl value 4099f143b3STony Lindgren strh r0, [r2] @ write new dpll value 4199f143b3STony Lindgren 4299f143b3STony Lindgren mov r4, #0x0700 @ let the clocks settle 4399f143b3STony Lindgren orr r4, r4, #0x00ff 4499f143b3STony Lindgrendelay: sub r4, r4, #1 4599f143b3STony Lindgren cmp r4, #0 4699f143b3STony Lindgren bne delay 4799f143b3STony Lindgren 4899f143b3STony Lindgrenlock: ldrh r4, [r2], #0 @ read back dpll value 4999f143b3STony Lindgren tst r0, #1 << 4 @ want lock mode? 5099f143b3STony Lindgren beq out @ nope 5199f143b3STony Lindgren tst r4, #1 << 0 @ dpll rate locked? 5299f143b3STony Lindgren beq lock @ try again 5399f143b3STony Lindgren 5499f143b3STony Lindgrenout: 5599f143b3STony Lindgren ldmfd sp!, {r0 - r12, pc} @ restore regs and return 5699f143b3STony LindgrenENTRY(sram_reprogram_clock_sz) 5799f143b3STony Lindgren .word . - sram_reprogram_clock 58