1 /* 2 * linux/arch/arm/mach-omap1/serial.c 3 * 4 * OMAP1 serial support. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 #include <linux/gpio.h> 11 #include <linux/module.h> 12 #include <linux/kernel.h> 13 #include <linux/init.h> 14 #include <linux/irq.h> 15 #include <linux/delay.h> 16 #include <linux/serial.h> 17 #include <linux/tty.h> 18 #include <linux/serial_8250.h> 19 #include <linux/serial_reg.h> 20 #include <linux/clk.h> 21 #include <linux/io.h> 22 23 #include <asm/mach-types.h> 24 25 #include <mach/mux.h> 26 27 #include "pm.h" 28 29 static struct clk * uart1_ck; 30 static struct clk * uart2_ck; 31 static struct clk * uart3_ck; 32 33 static inline unsigned int omap_serial_in(struct plat_serial8250_port *up, 34 int offset) 35 { 36 offset <<= up->regshift; 37 return (unsigned int)__raw_readb(up->membase + offset); 38 } 39 40 static inline void omap_serial_outp(struct plat_serial8250_port *p, int offset, 41 int value) 42 { 43 offset <<= p->regshift; 44 __raw_writeb(value, p->membase + offset); 45 } 46 47 /* 48 * Internal UARTs need to be initialized for the 8250 autoconfig to work 49 * properly. Note that the TX watermark initialization may not be needed 50 * once the 8250.c watermark handling code is merged. 51 */ 52 static void __init omap_serial_reset(struct plat_serial8250_port *p) 53 { 54 omap_serial_outp(p, UART_OMAP_MDR1, 55 UART_OMAP_MDR1_DISABLE); /* disable UART */ 56 omap_serial_outp(p, UART_OMAP_SCR, 0x08); /* TX watermark */ 57 omap_serial_outp(p, UART_OMAP_MDR1, 58 UART_OMAP_MDR1_16X_MODE); /* enable UART */ 59 60 if (!cpu_is_omap15xx()) { 61 omap_serial_outp(p, UART_OMAP_SYSC, 0x01); 62 while (!(omap_serial_in(p, UART_OMAP_SYSC) & 0x01)); 63 } 64 } 65 66 static struct plat_serial8250_port serial_platform_data[] = { 67 { 68 .mapbase = OMAP1_UART1_BASE, 69 .irq = INT_UART1, 70 .flags = UPF_BOOT_AUTOCONF, 71 .iotype = UPIO_MEM, 72 .regshift = 2, 73 .uartclk = OMAP16XX_BASE_BAUD * 16, 74 }, 75 { 76 .mapbase = OMAP1_UART2_BASE, 77 .irq = INT_UART2, 78 .flags = UPF_BOOT_AUTOCONF, 79 .iotype = UPIO_MEM, 80 .regshift = 2, 81 .uartclk = OMAP16XX_BASE_BAUD * 16, 82 }, 83 { 84 .mapbase = OMAP1_UART3_BASE, 85 .irq = INT_UART3, 86 .flags = UPF_BOOT_AUTOCONF, 87 .iotype = UPIO_MEM, 88 .regshift = 2, 89 .uartclk = OMAP16XX_BASE_BAUD * 16, 90 }, 91 { }, 92 }; 93 94 static struct platform_device serial_device = { 95 .name = "serial8250", 96 .id = PLAT8250_DEV_PLATFORM, 97 .dev = { 98 .platform_data = serial_platform_data, 99 }, 100 }; 101 102 /* 103 * Note that on Innovator-1510 UART2 pins conflict with USB2. 104 * By default UART2 does not work on Innovator-1510 if you have 105 * USB OHCI enabled. To use UART2, you must disable USB2 first. 106 */ 107 void __init omap_serial_init(void) 108 { 109 int i; 110 111 if (cpu_is_omap7xx()) { 112 serial_platform_data[0].regshift = 0; 113 serial_platform_data[1].regshift = 0; 114 serial_platform_data[0].irq = INT_7XX_UART_MODEM_1; 115 serial_platform_data[1].irq = INT_7XX_UART_MODEM_IRDA_2; 116 } 117 118 if (cpu_is_omap15xx()) { 119 serial_platform_data[0].uartclk = OMAP1510_BASE_BAUD * 16; 120 serial_platform_data[1].uartclk = OMAP1510_BASE_BAUD * 16; 121 serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16; 122 } 123 124 for (i = 0; i < ARRAY_SIZE(serial_platform_data) - 1; i++) { 125 126 /* Don't look at UARTs higher than 2 for omap7xx */ 127 if (cpu_is_omap7xx() && i > 1) { 128 serial_platform_data[i].membase = NULL; 129 serial_platform_data[i].mapbase = 0; 130 continue; 131 } 132 133 /* Static mapping, never released */ 134 serial_platform_data[i].membase = 135 ioremap(serial_platform_data[i].mapbase, SZ_2K); 136 if (!serial_platform_data[i].membase) { 137 printk(KERN_ERR "Could not ioremap uart%i\n", i); 138 continue; 139 } 140 switch (i) { 141 case 0: 142 uart1_ck = clk_get(NULL, "uart1_ck"); 143 if (IS_ERR(uart1_ck)) 144 printk("Could not get uart1_ck\n"); 145 else { 146 clk_enable(uart1_ck); 147 if (cpu_is_omap15xx()) 148 clk_set_rate(uart1_ck, 12000000); 149 } 150 break; 151 case 1: 152 uart2_ck = clk_get(NULL, "uart2_ck"); 153 if (IS_ERR(uart2_ck)) 154 printk("Could not get uart2_ck\n"); 155 else { 156 clk_enable(uart2_ck); 157 if (cpu_is_omap15xx()) 158 clk_set_rate(uart2_ck, 12000000); 159 else 160 clk_set_rate(uart2_ck, 48000000); 161 } 162 break; 163 case 2: 164 uart3_ck = clk_get(NULL, "uart3_ck"); 165 if (IS_ERR(uart3_ck)) 166 printk("Could not get uart3_ck\n"); 167 else { 168 clk_enable(uart3_ck); 169 if (cpu_is_omap15xx()) 170 clk_set_rate(uart3_ck, 12000000); 171 } 172 break; 173 } 174 omap_serial_reset(&serial_platform_data[i]); 175 } 176 } 177 178 #ifdef CONFIG_OMAP_SERIAL_WAKE 179 180 static irqreturn_t omap_serial_wake_interrupt(int irq, void *dev_id) 181 { 182 /* Need to do something with serial port right after wake-up? */ 183 return IRQ_HANDLED; 184 } 185 186 /* 187 * Reroutes serial RX lines to GPIO lines for the duration of 188 * sleep to allow waking up the device from serial port even 189 * in deep sleep. 190 */ 191 void omap_serial_wake_trigger(int enable) 192 { 193 if (!cpu_is_omap16xx()) 194 return; 195 196 if (uart1_ck != NULL) { 197 if (enable) 198 omap_cfg_reg(V14_16XX_GPIO37); 199 else 200 omap_cfg_reg(V14_16XX_UART1_RX); 201 } 202 if (uart2_ck != NULL) { 203 if (enable) 204 omap_cfg_reg(R9_16XX_GPIO18); 205 else 206 omap_cfg_reg(R9_16XX_UART2_RX); 207 } 208 if (uart3_ck != NULL) { 209 if (enable) 210 omap_cfg_reg(L14_16XX_GPIO49); 211 else 212 omap_cfg_reg(L14_16XX_UART3_RX); 213 } 214 } 215 216 static void __init omap_serial_set_port_wakeup(int gpio_nr) 217 { 218 int ret; 219 220 ret = gpio_request(gpio_nr, "UART wake"); 221 if (ret < 0) { 222 printk(KERN_ERR "Could not request UART wake GPIO: %i\n", 223 gpio_nr); 224 return; 225 } 226 gpio_direction_input(gpio_nr); 227 ret = request_irq(gpio_to_irq(gpio_nr), &omap_serial_wake_interrupt, 228 IRQF_TRIGGER_RISING, "serial wakeup", NULL); 229 if (ret) { 230 gpio_free(gpio_nr); 231 printk(KERN_ERR "No interrupt for UART wake GPIO: %i\n", 232 gpio_nr); 233 return; 234 } 235 enable_irq_wake(gpio_to_irq(gpio_nr)); 236 } 237 238 int __init omap_serial_wakeup_init(void) 239 { 240 if (!cpu_is_omap16xx()) 241 return 0; 242 243 if (uart1_ck != NULL) 244 omap_serial_set_port_wakeup(37); 245 if (uart2_ck != NULL) 246 omap_serial_set_port_wakeup(18); 247 if (uart3_ck != NULL) 248 omap_serial_set_port_wakeup(49); 249 250 return 0; 251 } 252 253 #endif /* CONFIG_OMAP_SERIAL_WAKE */ 254 255 static int __init omap_init(void) 256 { 257 if (!cpu_class_is_omap1()) 258 return -ENODEV; 259 260 return platform_device_register(&serial_device); 261 } 262 arch_initcall(omap_init); 263