xref: /openbmc/linux/arch/arm/mach-omap1/reset.c (revision d0b73b48)
1 /*
2  * OMAP1 reset support
3  */
4 #include <linux/kernel.h>
5 #include <linux/io.h>
6 
7 #include <mach/hardware.h>
8 
9 #include "iomap.h"
10 #include "common.h"
11 
12 /* ARM_SYSST bit shifts related to SoC reset sources */
13 #define ARM_SYSST_POR_SHIFT				5
14 #define ARM_SYSST_EXT_RST_SHIFT				4
15 #define ARM_SYSST_ARM_WDRST_SHIFT			2
16 #define ARM_SYSST_GLOB_SWRST_SHIFT			1
17 
18 /* Standardized reset source bits (across all OMAP SoCs) */
19 #define OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT		0
20 #define OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT		1
21 #define OMAP_MPU_WD_RST_SRC_ID_SHIFT			3
22 #define OMAP_EXTWARM_RST_SRC_ID_SHIFT			5
23 
24 
25 void omap1_restart(char mode, const char *cmd)
26 {
27 	/*
28 	 * Workaround for 5912/1611b bug mentioned in sprz209d.pdf p. 28
29 	 * "Global Software Reset Affects Traffic Controller Frequency".
30 	 */
31 	if (cpu_is_omap5912()) {
32 		omap_writew(omap_readw(DPLL_CTL) & ~(1 << 4), DPLL_CTL);
33 		omap_writew(0x8, ARM_RSTCT1);
34 	}
35 
36 	omap_writew(1, ARM_RSTCT1);
37 }
38 
39 /**
40  * omap1_get_reset_sources - return the source of the SoC's last reset
41  *
42  * Returns bits that represent the last reset source for the SoC.  The
43  * format is standardized across OMAPs for use by the OMAP watchdog.
44  */
45 u32 omap1_get_reset_sources(void)
46 {
47 	u32 ret = 0;
48 	u16 rs;
49 
50 	rs = __raw_readw(OMAP1_IO_ADDRESS(ARM_SYSST));
51 
52 	if (rs & (1 << ARM_SYSST_POR_SHIFT))
53 		ret |= 1 << OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT;
54 	if (rs & (1 << ARM_SYSST_EXT_RST_SHIFT))
55 		ret |= 1 << OMAP_EXTWARM_RST_SRC_ID_SHIFT;
56 	if (rs & (1 << ARM_SYSST_ARM_WDRST_SHIFT))
57 		ret |= 1 << OMAP_MPU_WD_RST_SRC_ID_SHIFT;
58 	if (rs & (1 << ARM_SYSST_GLOB_SWRST_SHIFT))
59 		ret |= 1 << OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT;
60 
61 	return ret;
62 }
63