1 /* 2 * linux/arch/arm/plat-omap/ocpi.c 3 * 4 * Minimal OCP bus support for omap16xx 5 * 6 * Copyright (C) 2003 - 2005 Nokia Corporation 7 * Copyright (C) 2012 Texas Instruments, Inc. 8 * Written by Tony Lindgren <tony@atomide.com> 9 * 10 * Modified for clock framework by Paul Mundt <paul.mundt@nokia.com>. 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2 of the License, or 15 * (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 25 */ 26 27 #include <linux/module.h> 28 #include <linux/types.h> 29 #include <linux/errno.h> 30 #include <linux/kernel.h> 31 #include <linux/init.h> 32 #include <linux/spinlock.h> 33 #include <linux/err.h> 34 #include <linux/clk.h> 35 #include <linux/io.h> 36 37 #include <mach/hardware.h> 38 39 #include "common.h" 40 41 #define OCPI_BASE 0xfffec320 42 #define OCPI_FAULT (OCPI_BASE + 0x00) 43 #define OCPI_CMD_FAULT (OCPI_BASE + 0x04) 44 #define OCPI_SINT0 (OCPI_BASE + 0x08) 45 #define OCPI_TABORT (OCPI_BASE + 0x0c) 46 #define OCPI_SINT1 (OCPI_BASE + 0x10) 47 #define OCPI_PROT (OCPI_BASE + 0x14) 48 #define OCPI_SEC (OCPI_BASE + 0x18) 49 50 /* USB OHCI OCPI access error registers */ 51 #define HOSTUEADDR 0xfffba0e0 52 #define HOSTUESTATUS 0xfffba0e4 53 54 static struct clk *ocpi_ck; 55 56 /* 57 * Enables device access to OMAP buses via the OCPI bridge 58 * FIXME: Add locking 59 */ 60 int ocpi_enable(void) 61 { 62 unsigned int val; 63 64 if (!cpu_is_omap16xx()) 65 return -ENODEV; 66 67 /* Enable access for OHCI in OCPI */ 68 val = omap_readl(OCPI_PROT); 69 val &= ~0xff; 70 /* val &= (1 << 0); Allow access only to EMIFS */ 71 omap_writel(val, OCPI_PROT); 72 73 val = omap_readl(OCPI_SEC); 74 val &= ~0xff; 75 omap_writel(val, OCPI_SEC); 76 77 return 0; 78 } 79 EXPORT_SYMBOL(ocpi_enable); 80 81 static int __init omap_ocpi_init(void) 82 { 83 if (!cpu_is_omap16xx()) 84 return -ENODEV; 85 86 ocpi_ck = clk_get(NULL, "l3_ocpi_ck"); 87 if (IS_ERR(ocpi_ck)) 88 return PTR_ERR(ocpi_ck); 89 90 clk_enable(ocpi_ck); 91 ocpi_enable(); 92 pr_info("OMAP OCPI interconnect driver loaded\n"); 93 94 return 0; 95 } 96 97 static void __exit omap_ocpi_exit(void) 98 { 99 /* REVISIT: Disable OCPI */ 100 101 if (!cpu_is_omap16xx()) 102 return; 103 104 clk_disable(ocpi_ck); 105 clk_put(ocpi_ck); 106 } 107 108 MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>"); 109 MODULE_DESCRIPTION("OMAP OCPI bus controller module"); 110 MODULE_LICENSE("GPL"); 111 module_init(omap_ocpi_init); 112 module_exit(omap_ocpi_exit); 113