1 /* 2 * linux/arch/arm/mach-omap1/mux.c 3 * 4 * OMAP1 pin multiplexing configurations 5 * 6 * Copyright (C) 2003 - 2005 Nokia Corporation 7 * 8 * Written by Tony Lindgren <tony.lindgren@nokia.com> 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as published by 12 * the Free Software Foundation; either version 2 of the License, or 13 * (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * You should have received a copy of the GNU General Public License 21 * along with this program; if not, write to the Free Software 22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 23 * 24 */ 25 #include <linux/module.h> 26 #include <linux/init.h> 27 #include <asm/system.h> 28 #include <asm/io.h> 29 #include <linux/spinlock.h> 30 31 #include <asm/arch/mux.h> 32 33 #ifdef CONFIG_OMAP_MUX 34 35 #ifdef CONFIG_ARCH_OMAP730 36 struct pin_config __initdata_or_module omap730_pins[] = { 37 MUX_CFG_730("E2_730_KBR0", 12, 21, 0, 20, 1, 0) 38 MUX_CFG_730("J7_730_KBR1", 12, 25, 0, 24, 1, 0) 39 MUX_CFG_730("E1_730_KBR2", 12, 29, 0, 28, 1, 0) 40 MUX_CFG_730("F3_730_KBR3", 13, 1, 0, 0, 1, 0) 41 MUX_CFG_730("D2_730_KBR4", 13, 5, 0, 4, 1, 0) 42 MUX_CFG_730("C2_730_KBC0", 13, 9, 0, 8, 1, 0) 43 MUX_CFG_730("D3_730_KBC1", 13, 13, 0, 12, 1, 0) 44 MUX_CFG_730("E4_730_KBC2", 13, 17, 0, 16, 1, 0) 45 MUX_CFG_730("F4_730_KBC3", 13, 21, 0, 20, 1, 0) 46 MUX_CFG_730("E3_730_KBC4", 13, 25, 0, 24, 1, 0) 47 48 MUX_CFG_730("AA17_730_USB_DM", 2, 21, 0, 20, 0, 0) 49 MUX_CFG_730("W16_730_USB_PU_EN", 2, 25, 0, 24, 0, 0) 50 MUX_CFG_730("W17_730_USB_VBUSI", 2, 29, 0, 28, 0, 0) 51 }; 52 #endif 53 54 #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) 55 struct pin_config __initdata_or_module omap1xxx_pins[] = { 56 /* 57 * description mux mode mux pull pull pull pu_pd pu dbg 58 * reg offset mode reg bit ena reg 59 */ 60 MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0) 61 MUX_CFG("UART1_RTS", 9, 12, 1, 2, 0, 0, NA, 0, 0) 62 63 /* UART2 (COM_UART_GATING), conflicts with USB2 */ 64 MUX_CFG("UART2_TX", C, 27, 1, 3, 3, 0, NA, 0, 0) 65 MUX_CFG("UART2_RX", C, 18, 0, 3, 1, 1, NA, 0, 0) 66 MUX_CFG("UART2_CTS", C, 21, 0, 3, 1, 1, NA, 0, 0) 67 MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0) 68 69 /* UART3 (GIGA_UART_GATING) */ 70 MUX_CFG("UART3_TX", 6, 0, 1, 0, 30, 0, NA, 0, 0) 71 MUX_CFG("UART3_RX", 6, 3, 0, 0, 31, 1, NA, 0, 0) 72 MUX_CFG("UART3_CTS", 5, 12, 2, 0, 24, 0, NA, 0, 0) 73 MUX_CFG("UART3_RTS", 5, 15, 2, 0, 25, 0, NA, 0, 0) 74 MUX_CFG("UART3_CLKREQ", 9, 27, 0, 2, 5, 0, NA, 0, 0) 75 MUX_CFG("UART3_BCLK", A, 0, 0, 2, 6, 0, NA, 0, 0) 76 MUX_CFG("Y15_1610_UART3_RTS", A, 0, 1, 2, 6, 0, NA, 0, 0) 77 78 /* PWT & PWL, conflicts with UART3 */ 79 MUX_CFG("PWT", 6, 0, 2, 0, 30, 0, NA, 0, 0) 80 MUX_CFG("PWL", 6, 3, 1, 0, 31, 1, NA, 0, 0) 81 82 /* USB internal master generic */ 83 MUX_CFG("R18_USB_VBUS", 7, 9, 2, 1, 11, 0, NA, 0, 1) 84 MUX_CFG("R18_1510_USB_GPIO0", 7, 9, 0, 1, 11, 1, NA, 0, 1) 85 /* works around erratum: W4_USB_PUEN and W4_USB_PUDIS are switched! */ 86 MUX_CFG("W4_USB_PUEN", D, 3, 3, 3, 5, 1, NA, 0, 1) 87 MUX_CFG("W4_USB_CLKO", D, 3, 1, 3, 5, 0, NA, 0, 1) 88 MUX_CFG("W4_USB_HIGHZ", D, 3, 4, 3, 5, 0, 3, 0, 1) 89 MUX_CFG("W4_GPIO58", D, 3, 7, 3, 5, 0, 3, 0, 1) 90 91 /* USB1 master */ 92 MUX_CFG("USB1_SUSP", 8, 27, 2, 1, 27, 0, NA, 0, 1) 93 MUX_CFG("USB1_SE0", 9, 0, 2, 1, 28, 0, NA, 0, 1) 94 MUX_CFG("W13_1610_USB1_SE0", 9, 0, 4, 1, 28, 0, NA, 0, 1) 95 MUX_CFG("USB1_TXEN", 9, 3, 2, 1, 29, 0, NA, 0, 1) 96 MUX_CFG("USB1_TXD", 9, 24, 1, 2, 4, 0, NA, 0, 1) 97 MUX_CFG("USB1_VP", A, 3, 1, 2, 7, 0, NA, 0, 1) 98 MUX_CFG("USB1_VM", A, 6, 1, 2, 8, 0, NA, 0, 1) 99 MUX_CFG("USB1_RCV", A, 9, 1, 2, 9, 0, NA, 0, 1) 100 MUX_CFG("USB1_SPEED", A, 12, 2, 2, 10, 0, NA, 0, 1) 101 MUX_CFG("R13_1610_USB1_SPEED", A, 12, 5, 2, 10, 0, NA, 0, 1) 102 MUX_CFG("R13_1710_USB1_SEO", A, 12, 5, 2, 10, 0, NA, 0, 1) 103 104 /* USB2 master */ 105 MUX_CFG("USB2_SUSP", B, 3, 1, 2, 17, 0, NA, 0, 1) 106 MUX_CFG("USB2_VP", B, 6, 1, 2, 18, 0, NA, 0, 1) 107 MUX_CFG("USB2_TXEN", B, 9, 1, 2, 19, 0, NA, 0, 1) 108 MUX_CFG("USB2_VM", C, 18, 1, 3, 0, 0, NA, 0, 1) 109 MUX_CFG("USB2_RCV", C, 21, 1, 3, 1, 0, NA, 0, 1) 110 MUX_CFG("USB2_SE0", C, 24, 2, 3, 2, 0, NA, 0, 1) 111 MUX_CFG("USB2_TXD", C, 27, 2, 3, 3, 0, NA, 0, 1) 112 113 /* OMAP-1510 GPIO */ 114 MUX_CFG("R18_1510_GPIO0", 7, 9, 0, 1, 11, 1, 0, 0, 1) 115 MUX_CFG("R19_1510_GPIO1", 7, 6, 0, 1, 10, 1, 0, 0, 1) 116 MUX_CFG("M14_1510_GPIO2", 7, 3, 0, 1, 9, 1, 0, 0, 1) 117 118 /* OMAP1610 GPIO */ 119 MUX_CFG("P18_1610_GPIO3", 7, 0, 0, 1, 8, 0, NA, 0, 1) 120 MUX_CFG("Y15_1610_GPIO17", A, 0, 7, 2, 6, 0, NA, 0, 1) 121 122 /* OMAP-1710 GPIO */ 123 MUX_CFG("R18_1710_GPIO0", 7, 9, 0, 1, 11, 1, 1, 1, 1) 124 MUX_CFG("V2_1710_GPIO10", F, 27, 1, 4, 3, 1, 4, 1, 1) 125 MUX_CFG("N21_1710_GPIO14", 6, 9, 0, 1, 1, 1, 1, 1, 1) 126 MUX_CFG("W15_1710_GPIO40", 9, 27, 7, 2, 5, 1, 2, 1, 1) 127 128 /* MPUIO */ 129 MUX_CFG("MPUIO2", 7, 18, 0, 1, 14, 1, NA, 0, 1) 130 MUX_CFG("N15_1610_MPUIO2", 7, 18, 0, 1, 14, 1, 1, 0, 1) 131 MUX_CFG("MPUIO4", 7, 15, 0, 1, 13, 1, NA, 0, 1) 132 MUX_CFG("MPUIO5", 7, 12, 0, 1, 12, 1, NA, 0, 1) 133 134 MUX_CFG("T20_1610_MPUIO5", 7, 12, 0, 1, 12, 0, 3, 0, 1) 135 MUX_CFG("W11_1610_MPUIO6", 10, 15, 2, 3, 8, 0, 3, 0, 1) 136 MUX_CFG("V10_1610_MPUIO7", A, 24, 2, 2, 14, 0, 2, 0, 1) 137 MUX_CFG("W11_1610_MPUIO9", 10, 15, 1, 3, 8, 0, 3, 0, 1) 138 MUX_CFG("V10_1610_MPUIO10", A, 24, 1, 2, 14, 0, 2, 0, 1) 139 MUX_CFG("W10_1610_MPUIO11", A, 18, 2, 2, 11, 0, 2, 0, 1) 140 MUX_CFG("E20_1610_MPUIO13", 3, 21, 1, 0, 7, 0, 0, 0, 1) 141 MUX_CFG("U20_1610_MPUIO14", 9, 6, 6, 0, 30, 0, 0, 0, 1) 142 MUX_CFG("E19_1610_MPUIO15", 3, 18, 1, 0, 6, 0, 0, 0, 1) 143 144 /* MCBSP2 */ 145 MUX_CFG("MCBSP2_CLKR", C, 6, 0, 2, 27, 1, NA, 0, 1) 146 MUX_CFG("MCBSP2_CLKX", C, 9, 0, 2, 29, 1, NA, 0, 1) 147 MUX_CFG("MCBSP2_DR", C, 0, 0, 2, 26, 1, NA, 0, 1) 148 MUX_CFG("MCBSP2_DX", C, 15, 0, 2, 31, 1, NA, 0, 1) 149 MUX_CFG("MCBSP2_FSR", C, 12, 0, 2, 30, 1, NA, 0, 1) 150 MUX_CFG("MCBSP2_FSX", C, 3, 0, 2, 27, 1, NA, 0, 1) 151 152 /* MCBSP3 NOTE: Mode must 1 for clock */ 153 MUX_CFG("MCBSP3_CLKX", 9, 3, 1, 1, 29, 0, NA, 0, 1) 154 155 /* Misc ballouts */ 156 MUX_CFG("BALLOUT_V8_ARMIO3", B, 18, 0, 2, 25, 1, NA, 0, 1) 157 MUX_CFG("N20_HDQ", 6, 18, 1, 1, 4, 0, 1, 4, 0) 158 159 /* OMAP-1610 MMC2 */ 160 MUX_CFG("W8_1610_MMC2_DAT0", B, 21, 6, 2, 23, 1, 2, 1, 1) 161 MUX_CFG("V8_1610_MMC2_DAT1", B, 27, 6, 2, 25, 1, 2, 1, 1) 162 MUX_CFG("W15_1610_MMC2_DAT2", 9, 12, 6, 2, 5, 1, 2, 1, 1) 163 MUX_CFG("R10_1610_MMC2_DAT3", B, 18, 6, 2, 22, 1, 2, 1, 1) 164 MUX_CFG("Y10_1610_MMC2_CLK", B, 3, 6, 2, 17, 0, 2, 0, 1) 165 MUX_CFG("Y8_1610_MMC2_CMD", B, 24, 6, 2, 24, 1, 2, 1, 1) 166 MUX_CFG("V9_1610_MMC2_CMDDIR", B, 12, 6, 2, 20, 0, 2, 1, 1) 167 MUX_CFG("V5_1610_MMC2_DATDIR0", B, 15, 6, 2, 21, 0, 2, 1, 1) 168 MUX_CFG("W19_1610_MMC2_DATDIR1", 8, 15, 6, 1, 23, 0, 1, 1, 1) 169 MUX_CFG("R18_1610_MMC2_CLKIN", 7, 9, 6, 1, 11, 0, 1, 11, 1) 170 171 /* OMAP-1610 External Trace Interface */ 172 MUX_CFG("M19_1610_ETM_PSTAT0", 5, 27, 1, 0, 29, 0, 0, 0, 1) 173 MUX_CFG("L15_1610_ETM_PSTAT1", 5, 24, 1, 0, 28, 0, 0, 0, 1) 174 MUX_CFG("L18_1610_ETM_PSTAT2", 5, 21, 1, 0, 27, 0, 0, 0, 1) 175 MUX_CFG("L19_1610_ETM_D0", 5, 18, 1, 0, 26, 0, 0, 0, 1) 176 MUX_CFG("J19_1610_ETM_D6", 5, 0, 1, 0, 20, 0, 0, 0, 1) 177 MUX_CFG("J18_1610_ETM_D7", 5, 27, 1, 0, 19, 0, 0, 0, 1) 178 179 /* OMAP16XX GPIO */ 180 MUX_CFG("P20_1610_GPIO4", 6, 27, 0, 1, 7, 0, 1, 1, 1) 181 MUX_CFG("V9_1610_GPIO7", B, 12, 1, 2, 20, 0, 2, 1, 1) 182 MUX_CFG("W8_1610_GPIO9", B, 21, 0, 2, 23, 0, 2, 1, 1) 183 MUX_CFG("N20_1610_GPIO11", 6, 18, 0, 1, 4, 0, 1, 1, 1) 184 MUX_CFG("N19_1610_GPIO13", 6, 12, 0, 1, 2, 0, 1, 1, 1) 185 MUX_CFG("P10_1610_GPIO22", C, 0, 7, 2, 26, 0, 2, 1, 1) 186 MUX_CFG("V5_1610_GPIO24", B, 15, 7, 2, 21, 0, 2, 1, 1) 187 MUX_CFG("AA20_1610_GPIO_41", 9, 9, 7, 1, 31, 0, 1, 1, 1) 188 MUX_CFG("W19_1610_GPIO48", 8, 15, 7, 1, 23, 1, 1, 0, 1) 189 MUX_CFG("M7_1610_GPIO62", 10, 0, 0, 4, 24, 0, 4, 0, 1) 190 MUX_CFG("V14_16XX_GPIO37", 9, 18, 7, 2, 2, 0, 2, 2, 0) 191 MUX_CFG("R9_16XX_GPIO18", C, 18, 7, 3, 0, 0, 3, 0, 0) 192 MUX_CFG("L14_16XX_GPIO49", 6, 3, 7, 0, 31, 0, 0, 31, 0) 193 194 /* OMAP-1610 uWire */ 195 MUX_CFG("V19_1610_UWIRE_SCLK", 8, 6, 0, 1, 20, 0, 1, 1, 1) 196 MUX_CFG("U18_1610_UWIRE_SDI", 8, 0, 0, 1, 18, 0, 1, 1, 1) 197 MUX_CFG("W21_1610_UWIRE_SDO", 8, 3, 0, 1, 19, 0, 1, 1, 1) 198 MUX_CFG("N14_1610_UWIRE_CS0", 8, 9, 1, 1, 21, 0, 1, 1, 1) 199 MUX_CFG("P15_1610_UWIRE_CS3", 8, 12, 1, 1, 22, 0, 1, 1, 1) 200 MUX_CFG("N15_1610_UWIRE_CS1", 7, 18, 2, 1, 14, 0, NA, 0, 1) 201 202 /* OMAP-1610 SPI */ 203 MUX_CFG("U19_1610_SPIF_SCK", 7, 21, 6, 1, 15, 0, 1, 1, 1) 204 MUX_CFG("U18_1610_SPIF_DIN", 8, 0, 6, 1, 18, 1, 1, 0, 1) 205 MUX_CFG("P20_1610_SPIF_DIN", 6, 27, 4, 1, 7, 1, 1, 0, 1) 206 MUX_CFG("W21_1610_SPIF_DOUT", 8, 3, 6, 1, 19, 0, 1, 0, 1) 207 MUX_CFG("R18_1610_SPIF_DOUT", 7, 9, 3, 1, 11, 0, 1, 0, 1) 208 MUX_CFG("N14_1610_SPIF_CS0", 8, 9, 6, 1, 21, 0, 1, 1, 1) 209 MUX_CFG("N15_1610_SPIF_CS1", 7, 18, 6, 1, 14, 0, 1, 1, 1) 210 MUX_CFG("T19_1610_SPIF_CS2", 7, 15, 4, 1, 13, 0, 1, 1, 1) 211 MUX_CFG("P15_1610_SPIF_CS3", 8, 12, 3, 1, 22, 0, 1, 1, 1) 212 213 /* OMAP-1610 Flash */ 214 MUX_CFG("L3_1610_FLASH_CS2B_OE",10, 6, 1, NA, 0, 0, NA, 0, 1) 215 MUX_CFG("M8_1610_FLASH_CS2B_WE",10, 3, 1, NA, 0, 0, NA, 0, 1) 216 217 /* First MMC interface, same on 1510, 1610 and 1710 */ 218 MUX_CFG("MMC_CMD", A, 27, 0, 2, 15, 1, 2, 1, 1) 219 MUX_CFG("MMC_DAT1", A, 24, 0, 2, 14, 1, 2, 1, 1) 220 MUX_CFG("MMC_DAT2", A, 18, 0, 2, 12, 1, 2, 1, 1) 221 MUX_CFG("MMC_DAT0", B, 0, 0, 2, 16, 1, 2, 1, 1) 222 MUX_CFG("MMC_CLK", A, 21, 0, NA, 0, 0, NA, 0, 1) 223 MUX_CFG("MMC_DAT3", 10, 15, 0, 3, 8, 1, 3, 1, 1) 224 MUX_CFG("M15_1710_MMC_CLKI", 6, 21, 2, 0, 0, 0, NA, 0, 1) 225 MUX_CFG("P19_1710_MMC_CMDDIR", 6, 24, 6, 0, 0, 0, NA, 0, 1) 226 MUX_CFG("P20_1710_MMC_DATDIR0", 6, 27, 5, 0, 0, 0, NA, 0, 1) 227 228 /* OMAP-1610 USB0 alternate configuration */ 229 MUX_CFG("W9_USB0_TXEN", B, 9, 5, 2, 19, 0, 2, 0, 1) 230 MUX_CFG("AA9_USB0_VP", B, 6, 5, 2, 18, 0, 2, 0, 1) 231 MUX_CFG("Y5_USB0_RCV", C, 21, 5, 3, 1, 0, 1, 0, 1) 232 MUX_CFG("R9_USB0_VM", C, 18, 5, 3, 0, 0, 3, 0, 1) 233 MUX_CFG("V6_USB0_TXD", C, 27, 5, 3, 3, 0, 3, 0, 1) 234 MUX_CFG("W5_USB0_SE0", C, 24, 5, 3, 2, 0, 3, 0, 1) 235 MUX_CFG("V9_USB0_SPEED", B, 12, 5, 2, 20, 0, 2, 0, 1) 236 MUX_CFG("Y10_USB0_SUSP", B, 3, 5, 2, 17, 0, 2, 0, 1) 237 238 /* USB2 interface */ 239 MUX_CFG("W9_USB2_TXEN", B, 9, 1, NA, 0, 0, NA, 0, 1) 240 MUX_CFG("AA9_USB2_VP", B, 6, 1, NA, 0, 0, NA, 0, 1) 241 MUX_CFG("Y5_USB2_RCV", C, 21, 1, NA, 0, 0, NA, 0, 1) 242 MUX_CFG("R9_USB2_VM", C, 18, 1, NA, 0, 0, NA, 0, 1) 243 MUX_CFG("V6_USB2_TXD", C, 27, 2, NA, 0, 0, NA, 0, 1) 244 MUX_CFG("W5_USB2_SE0", C, 24, 2, NA, 0, 0, NA, 0, 1) 245 246 /* 16XX UART */ 247 MUX_CFG("R13_1610_UART1_TX", A, 12, 6, 2, 10, 0, 2, 10, 1) 248 MUX_CFG("V14_16XX_UART1_RX", 9, 18, 0, 2, 2, 0, 2, 2, 1) 249 MUX_CFG("R14_1610_UART1_CTS", 9, 15, 0, 2, 1, 0, 2, 1, 1) 250 MUX_CFG("AA15_1610_UART1_RTS", 9, 12, 1, 2, 0, 0, 2, 0, 1) 251 MUX_CFG("R9_16XX_UART2_RX", C, 18, 0, 3, 0, 0, 3, 0, 1) 252 MUX_CFG("L14_16XX_UART3_RX", 6, 3, 0, 0, 31, 0, 0, 31, 1) 253 254 /* I2C interface */ 255 MUX_CFG("I2C_SCL", 7, 24, 0, NA, 0, 0, NA, 0, 0) 256 MUX_CFG("I2C_SDA", 7, 27, 0, NA, 0, 0, NA, 0, 0) 257 258 /* Keypad */ 259 MUX_CFG("F18_1610_KBC0", 3, 15, 0, 0, 5, 1, 0, 0, 0) 260 MUX_CFG("D20_1610_KBC1", 3, 12, 0, 0, 4, 1, 0, 0, 0) 261 MUX_CFG("D19_1610_KBC2", 3, 9, 0, 0, 3, 1, 0, 0, 0) 262 MUX_CFG("E18_1610_KBC3", 3, 6, 0, 0, 2, 1, 0, 0, 0) 263 MUX_CFG("C21_1610_KBC4", 3, 3, 0, 0, 1, 1, 0, 0, 0) 264 MUX_CFG("G18_1610_KBR0", 4, 0, 0, 0, 10, 1, 0, 1, 0) 265 MUX_CFG("F19_1610_KBR1", 3, 27, 0, 0, 9, 1, 0, 1, 0) 266 MUX_CFG("H14_1610_KBR2", 3, 24, 0, 0, 8, 1, 0, 1, 0) 267 MUX_CFG("E20_1610_KBR3", 3, 21, 0, 0, 7, 1, 0, 1, 0) 268 MUX_CFG("E19_1610_KBR4", 3, 18, 0, 0, 6, 1, 0, 1, 0) 269 MUX_CFG("N19_1610_KBR5", 6, 12, 1, 1, 2, 1, 1, 1, 0) 270 271 /* Power management */ 272 MUX_CFG("T20_1610_LOW_PWR", 7, 12, 1, NA, 0, 0, NA, 0, 0) 273 274 /* MCLK Settings */ 275 MUX_CFG("V5_1710_MCLK_ON", B, 15, 0, NA, 0, 0, NA, 0, 0) 276 MUX_CFG("V5_1710_MCLK_OFF", B, 15, 6, NA, 0, 0, NA, 0, 0) 277 MUX_CFG("R10_1610_MCLK_ON", B, 18, 0, NA, 22, 0, NA, 1, 0) 278 MUX_CFG("R10_1610_MCLK_OFF", B, 18, 6, 2, 22, 1, 2, 1, 1) 279 280 /* CompactFlash controller, conflicts with MMC1 */ 281 MUX_CFG("P11_1610_CF_CD2", A, 27, 3, 2, 15, 1, 2, 1, 1) 282 MUX_CFG("R11_1610_CF_IOIS16", B, 0, 3, 2, 16, 1, 2, 1, 1) 283 MUX_CFG("V10_1610_CF_IREQ", A, 24, 3, 2, 14, 0, 2, 0, 1) 284 MUX_CFG("W10_1610_CF_RESET", A, 18, 3, 2, 12, 1, 2, 1, 1) 285 MUX_CFG("W11_1610_CF_CD1", 10, 15, 3, 3, 8, 1, 3, 1, 1) 286 287 /* parallel camera */ 288 MUX_CFG("J15_1610_CAM_LCLK", 4, 24, 0, 0, 18, 1, 0, 0, 0) 289 MUX_CFG("J18_1610_CAM_D7", 4, 27, 0, 0, 19, 1, 0, 0, 0) 290 MUX_CFG("J19_1610_CAM_D6", 5, 0, 0, 0, 20, 1, 0, 0, 0) 291 MUX_CFG("J14_1610_CAM_D5", 5, 3, 0, 0, 21, 1, 0, 0, 0) 292 MUX_CFG("K18_1610_CAM_D4", 5, 6, 0, 0, 22, 1, 0, 0, 0) 293 MUX_CFG("K19_1610_CAM_D3", 5, 9, 0, 0, 23, 1, 0, 0, 0) 294 MUX_CFG("K15_1610_CAM_D2", 5, 12, 0, 0, 24, 1, 0, 0, 0) 295 MUX_CFG("K14_1610_CAM_D1", 5, 15, 0, 0, 25, 1, 0, 0, 0) 296 MUX_CFG("L19_1610_CAM_D0", 5, 18, 0, 0, 26, 1, 0, 0, 0) 297 MUX_CFG("L18_1610_CAM_VS", 5, 21, 0, 0, 27, 1, 0, 0, 0) 298 MUX_CFG("L15_1610_CAM_HS", 5, 24, 0, 0, 28, 1, 0, 0, 0) 299 MUX_CFG("M19_1610_CAM_RSTZ", 5, 27, 0, 0, 29, 0, 0, 0, 0) 300 MUX_CFG("Y15_1610_CAM_OUTCLK", A, 0, 6, 2, 6, 0, 2, 0, 0) 301 302 /* serial camera */ 303 MUX_CFG("H19_1610_CAM_EXCLK", 4, 21, 0, 0, 17, 0, 0, 0, 0) 304 /* REVISIT 5912 spec sez CCP_* can't pullup or pulldown ... ? */ 305 MUX_CFG("Y12_1610_CCP_CLKP", 8, 18, 6, 1, 24, 1, 1, 0, 0) 306 MUX_CFG("W13_1610_CCP_CLKM", 9, 0, 6, 1, 28, 1, 1, 0, 0) 307 MUX_CFG("W14_1610_CCP_DATAP", 9, 24, 6, 2, 4, 1, 2, 0, 0) 308 MUX_CFG("Y14_1610_CCP_DATAM", 9, 21, 6, 2, 3, 1, 2, 0, 0) 309 310 }; 311 #endif /* CONFIG_ARCH_OMAP15XX || CONFIG_ARCH_OMAP16XX */ 312 313 int __init omap1_mux_init(void) 314 { 315 316 #ifdef CONFIG_ARCH_OMAP730 317 omap_mux_register(omap730_pins, ARRAY_SIZE(omap730_pins)); 318 #endif 319 320 #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) 321 omap_mux_register(omap1xxx_pins, ARRAY_SIZE(omap1xxx_pins)); 322 #endif 323 324 return 0; 325 } 326 327 #endif 328