1 /* 2 * linux/arch/arm/mach-omap1/io.c 3 * 4 * OMAP1 I/O mapping code 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 11 #include <linux/module.h> 12 #include <linux/kernel.h> 13 #include <linux/init.h> 14 #include <linux/io.h> 15 16 #include <asm/tlb.h> 17 #include <asm/mach/map.h> 18 #include <mach/mux.h> 19 #include <mach/tc.h> 20 21 extern int omap1_clk_init(void); 22 extern void omap_check_revision(void); 23 extern void omap_sram_init(void); 24 extern void omapfb_reserve_sdram(void); 25 26 /* 27 * The machine specific code may provide the extra mapping besides the 28 * default mapping provided here. 29 */ 30 static struct map_desc omap_io_desc[] __initdata = { 31 { 32 .virtual = IO_VIRT, 33 .pfn = __phys_to_pfn(IO_PHYS), 34 .length = IO_SIZE, 35 .type = MT_DEVICE 36 } 37 }; 38 39 #ifdef CONFIG_ARCH_OMAP730 40 static struct map_desc omap730_io_desc[] __initdata = { 41 { 42 .virtual = OMAP730_DSP_BASE, 43 .pfn = __phys_to_pfn(OMAP730_DSP_START), 44 .length = OMAP730_DSP_SIZE, 45 .type = MT_DEVICE 46 }, { 47 .virtual = OMAP730_DSPREG_BASE, 48 .pfn = __phys_to_pfn(OMAP730_DSPREG_START), 49 .length = OMAP730_DSPREG_SIZE, 50 .type = MT_DEVICE 51 } 52 }; 53 #endif 54 55 #ifdef CONFIG_ARCH_OMAP850 56 static struct map_desc omap850_io_desc[] __initdata = { 57 { 58 .virtual = OMAP850_DSP_BASE, 59 .pfn = __phys_to_pfn(OMAP850_DSP_START), 60 .length = OMAP850_DSP_SIZE, 61 .type = MT_DEVICE 62 }, { 63 .virtual = OMAP850_DSPREG_BASE, 64 .pfn = __phys_to_pfn(OMAP850_DSPREG_START), 65 .length = OMAP850_DSPREG_SIZE, 66 .type = MT_DEVICE 67 } 68 }; 69 #endif 70 71 #ifdef CONFIG_ARCH_OMAP15XX 72 static struct map_desc omap1510_io_desc[] __initdata = { 73 { 74 .virtual = OMAP1510_DSP_BASE, 75 .pfn = __phys_to_pfn(OMAP1510_DSP_START), 76 .length = OMAP1510_DSP_SIZE, 77 .type = MT_DEVICE 78 }, { 79 .virtual = OMAP1510_DSPREG_BASE, 80 .pfn = __phys_to_pfn(OMAP1510_DSPREG_START), 81 .length = OMAP1510_DSPREG_SIZE, 82 .type = MT_DEVICE 83 } 84 }; 85 #endif 86 87 #if defined(CONFIG_ARCH_OMAP16XX) 88 static struct map_desc omap16xx_io_desc[] __initdata = { 89 { 90 .virtual = OMAP16XX_DSP_BASE, 91 .pfn = __phys_to_pfn(OMAP16XX_DSP_START), 92 .length = OMAP16XX_DSP_SIZE, 93 .type = MT_DEVICE 94 }, { 95 .virtual = OMAP16XX_DSPREG_BASE, 96 .pfn = __phys_to_pfn(OMAP16XX_DSPREG_START), 97 .length = OMAP16XX_DSPREG_SIZE, 98 .type = MT_DEVICE 99 } 100 }; 101 #endif 102 103 /* 104 * Maps common IO regions for omap1. This should only get called from 105 * board specific init. 106 */ 107 void __init omap1_map_common_io(void) 108 { 109 iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc)); 110 111 /* Normally devicemaps_init() would flush caches and tlb after 112 * mdesc->map_io(), but we must also do it here because of the CPU 113 * revision check below. 114 */ 115 local_flush_tlb_all(); 116 flush_cache_all(); 117 118 /* We want to check CPU revision early for cpu_is_omapxxxx() macros. 119 * IO space mapping must be initialized before we can do that. 120 */ 121 omap_check_revision(); 122 123 #ifdef CONFIG_ARCH_OMAP730 124 if (cpu_is_omap730()) { 125 iotable_init(omap730_io_desc, ARRAY_SIZE(omap730_io_desc)); 126 } 127 #endif 128 129 #ifdef CONFIG_ARCH_OMAP850 130 if (cpu_is_omap850()) { 131 iotable_init(omap850_io_desc, ARRAY_SIZE(omap850_io_desc)); 132 } 133 #endif 134 135 #ifdef CONFIG_ARCH_OMAP15XX 136 if (cpu_is_omap15xx()) { 137 iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc)); 138 } 139 #endif 140 #if defined(CONFIG_ARCH_OMAP16XX) 141 if (cpu_is_omap16xx()) { 142 iotable_init(omap16xx_io_desc, ARRAY_SIZE(omap16xx_io_desc)); 143 } 144 #endif 145 146 omap_sram_init(); 147 omapfb_reserve_sdram(); 148 } 149 150 /* 151 * Common low-level hardware init for omap1. This should only get called from 152 * board specific init. 153 */ 154 void __init omap1_init_common_hw(void) 155 { 156 /* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort 157 * on a Posted Write in the TIPB Bridge". 158 */ 159 omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL); 160 omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL); 161 162 /* Must init clocks early to assure that timer interrupt works 163 */ 164 omap1_clk_init(); 165 166 omap1_mux_init(); 167 } 168 169