xref: /openbmc/linux/arch/arm/mach-omap1/io.c (revision 52650505)
1f577ffd7STony Lindgren /*
2f577ffd7STony Lindgren  * linux/arch/arm/mach-omap1/io.c
3f577ffd7STony Lindgren  *
4f577ffd7STony Lindgren  * OMAP1 I/O mapping code
5f577ffd7STony Lindgren  *
6f577ffd7STony Lindgren  * This program is free software; you can redistribute it and/or modify
7f577ffd7STony Lindgren  * it under the terms of the GNU General Public License version 2 as
8f577ffd7STony Lindgren  * published by the Free Software Foundation.
9f577ffd7STony Lindgren  */
10f577ffd7STony Lindgren 
11f577ffd7STony Lindgren #include <linux/module.h>
12f577ffd7STony Lindgren #include <linux/kernel.h>
13f577ffd7STony Lindgren #include <linux/init.h>
14fced80c7SRussell King #include <linux/io.h>
15f577ffd7STony Lindgren 
1653d9cc73STony Lindgren #include <asm/tlb.h>
17f577ffd7STony Lindgren #include <asm/mach/map.h>
18ce491cf8STony Lindgren #include <plat/mux.h>
19ce491cf8STony Lindgren #include <plat/tc.h>
20f577ffd7STony Lindgren 
2152650505SPaul Walmsley #include "clock.h"
2252650505SPaul Walmsley 
23f577ffd7STony Lindgren extern void omap_check_revision(void);
247c38cf02STony Lindgren extern void omap_sram_init(void);
25b7cc6d46SImre Deak extern void omapfb_reserve_sdram(void);
26f577ffd7STony Lindgren 
27f577ffd7STony Lindgren /*
28f577ffd7STony Lindgren  * The machine specific code may provide the extra mapping besides the
29f577ffd7STony Lindgren  * default mapping provided here.
30f577ffd7STony Lindgren  */
31f577ffd7STony Lindgren static struct map_desc omap_io_desc[] __initdata = {
329fe133b1SDeepak Saxena 	{
33db326be1STony Lindgren 		.virtual	= OMAP1_IO_VIRT,
34db326be1STony Lindgren 		.pfn		= __phys_to_pfn(OMAP1_IO_PHYS),
35db326be1STony Lindgren 		.length		= OMAP1_IO_SIZE,
369fe133b1SDeepak Saxena 		.type		= MT_DEVICE
379fe133b1SDeepak Saxena 	}
38f577ffd7STony Lindgren };
39f577ffd7STony Lindgren 
40ab49df73SAlistair Buxton #if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
417c006926SAlistair Buxton static struct map_desc omap7xx_io_desc[] __initdata = {
429fe133b1SDeepak Saxena 	{
43b51988dbSAlistair Buxton 		.virtual	= OMAP7XX_DSP_BASE,
44b51988dbSAlistair Buxton 		.pfn		= __phys_to_pfn(OMAP7XX_DSP_START),
45b51988dbSAlistair Buxton 		.length		= OMAP7XX_DSP_SIZE,
469fe133b1SDeepak Saxena 		.type		= MT_DEVICE
479fe133b1SDeepak Saxena 	}, {
48b51988dbSAlistair Buxton 		.virtual	= OMAP7XX_DSPREG_BASE,
49b51988dbSAlistair Buxton 		.pfn		= __phys_to_pfn(OMAP7XX_DSPREG_START),
50b51988dbSAlistair Buxton 		.length		= OMAP7XX_DSPREG_SIZE,
519fe133b1SDeepak Saxena 		.type		= MT_DEVICE
529fe133b1SDeepak Saxena 	}
53f577ffd7STony Lindgren };
54f577ffd7STony Lindgren #endif
55f577ffd7STony Lindgren 
563179a019STony Lindgren #ifdef CONFIG_ARCH_OMAP15XX
57f577ffd7STony Lindgren static struct map_desc omap1510_io_desc[] __initdata = {
589fe133b1SDeepak Saxena 	{
599fe133b1SDeepak Saxena 		.virtual	= OMAP1510_DSP_BASE,
609fe133b1SDeepak Saxena 		.pfn		= __phys_to_pfn(OMAP1510_DSP_START),
619fe133b1SDeepak Saxena 		.length		= OMAP1510_DSP_SIZE,
629fe133b1SDeepak Saxena 		.type		= MT_DEVICE
639fe133b1SDeepak Saxena 	}, {
649fe133b1SDeepak Saxena 		.virtual	= OMAP1510_DSPREG_BASE,
659fe133b1SDeepak Saxena 		.pfn		= __phys_to_pfn(OMAP1510_DSPREG_START),
669fe133b1SDeepak Saxena 		.length		= OMAP1510_DSPREG_SIZE,
679fe133b1SDeepak Saxena 		.type		= MT_DEVICE
689fe133b1SDeepak Saxena 	}
69f577ffd7STony Lindgren };
70f577ffd7STony Lindgren #endif
71f577ffd7STony Lindgren 
72f577ffd7STony Lindgren #if defined(CONFIG_ARCH_OMAP16XX)
737c38cf02STony Lindgren static struct map_desc omap16xx_io_desc[] __initdata = {
749fe133b1SDeepak Saxena 	{
759fe133b1SDeepak Saxena 		.virtual	= OMAP16XX_DSP_BASE,
769fe133b1SDeepak Saxena 		.pfn		= __phys_to_pfn(OMAP16XX_DSP_START),
779fe133b1SDeepak Saxena 		.length		= OMAP16XX_DSP_SIZE,
789fe133b1SDeepak Saxena 		.type		= MT_DEVICE
799fe133b1SDeepak Saxena 	}, {
809fe133b1SDeepak Saxena 		.virtual	= OMAP16XX_DSPREG_BASE,
819fe133b1SDeepak Saxena 		.pfn		= __phys_to_pfn(OMAP16XX_DSPREG_START),
829fe133b1SDeepak Saxena 		.length		= OMAP16XX_DSPREG_SIZE,
839fe133b1SDeepak Saxena 		.type		= MT_DEVICE
849fe133b1SDeepak Saxena 	}
85f577ffd7STony Lindgren };
86f577ffd7STony Lindgren #endif
87f577ffd7STony Lindgren 
8853d9cc73STony Lindgren /*
8953d9cc73STony Lindgren  * Maps common IO regions for omap1. This should only get called from
9053d9cc73STony Lindgren  * board specific init.
9153d9cc73STony Lindgren  */
9253d9cc73STony Lindgren void __init omap1_map_common_io(void)
93f577ffd7STony Lindgren {
94f577ffd7STony Lindgren 	iotable_init(omap_io_desc, ARRAY_SIZE(omap_io_desc));
9553d9cc73STony Lindgren 
9653d9cc73STony Lindgren 	/* Normally devicemaps_init() would flush caches and tlb after
9753d9cc73STony Lindgren 	 * mdesc->map_io(), but we must also do it here because of the CPU
9853d9cc73STony Lindgren 	 * revision check below.
9953d9cc73STony Lindgren 	 */
10053d9cc73STony Lindgren 	local_flush_tlb_all();
10153d9cc73STony Lindgren 	flush_cache_all();
10253d9cc73STony Lindgren 
10353d9cc73STony Lindgren 	/* We want to check CPU revision early for cpu_is_omapxxxx() macros.
10453d9cc73STony Lindgren 	 * IO space mapping must be initialized before we can do that.
10553d9cc73STony Lindgren 	 */
106f577ffd7STony Lindgren 	omap_check_revision();
107f577ffd7STony Lindgren 
108ab49df73SAlistair Buxton #if defined (CONFIG_ARCH_OMAP730) || defined (CONFIG_ARCH_OMAP850)
109ab49df73SAlistair Buxton 	if (cpu_is_omap7xx()) {
1107c006926SAlistair Buxton 		iotable_init(omap7xx_io_desc, ARRAY_SIZE(omap7xx_io_desc));
111f577ffd7STony Lindgren 	}
112f577ffd7STony Lindgren #endif
1133179a019STony Lindgren #ifdef CONFIG_ARCH_OMAP15XX
114120db2cbSTony Lindgren 	if (cpu_is_omap15xx()) {
115f577ffd7STony Lindgren 		iotable_init(omap1510_io_desc, ARRAY_SIZE(omap1510_io_desc));
116f577ffd7STony Lindgren 	}
117f577ffd7STony Lindgren #endif
118f577ffd7STony Lindgren #if defined(CONFIG_ARCH_OMAP16XX)
1197c38cf02STony Lindgren 	if (cpu_is_omap16xx()) {
1207c38cf02STony Lindgren 		iotable_init(omap16xx_io_desc, ARRAY_SIZE(omap16xx_io_desc));
121f577ffd7STony Lindgren 	}
122f577ffd7STony Lindgren #endif
123f577ffd7STony Lindgren 
1247c38cf02STony Lindgren 	omap_sram_init();
125b7cc6d46SImre Deak 	omapfb_reserve_sdram();
12653d9cc73STony Lindgren }
1277c38cf02STony Lindgren 
12853d9cc73STony Lindgren /*
12953d9cc73STony Lindgren  * Common low-level hardware init for omap1. This should only get called from
13053d9cc73STony Lindgren  * board specific init.
13153d9cc73STony Lindgren  */
132020f9706SRussell King void __init omap1_init_common_hw(void)
13353d9cc73STony Lindgren {
134f577ffd7STony Lindgren 	/* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
135f577ffd7STony Lindgren 	 * on a Posted Write in the TIPB Bridge".
136f577ffd7STony Lindgren 	 */
137f577ffd7STony Lindgren 	omap_writew(0x0, MPU_PUBLIC_TIPB_CNTL);
138f577ffd7STony Lindgren 	omap_writew(0x0, MPU_PRIVATE_TIPB_CNTL);
139f577ffd7STony Lindgren 
140f577ffd7STony Lindgren 	/* Must init clocks early to assure that timer interrupt works
141f577ffd7STony Lindgren 	 */
1423179a019STony Lindgren 	omap1_clk_init();
143f577ffd7STony Lindgren 
1443179a019STony Lindgren 	omap1_mux_init();
1453179a019STony Lindgren }
1467c38cf02STony Lindgren 
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