1 /* 2 * OMAP16xx specific gpio init 3 * 4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * Author: 7 * Charulatha V <charu@ti.com> 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation version 2. 12 * 13 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 14 * kind, whether express or implied; without even the implied warranty 15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 */ 18 19 #include <linux/gpio.h> 20 21 #define OMAP1610_GPIO1_BASE 0xfffbe400 22 #define OMAP1610_GPIO2_BASE 0xfffbec00 23 #define OMAP1610_GPIO3_BASE 0xfffbb400 24 #define OMAP1610_GPIO4_BASE 0xfffbbc00 25 #define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE 26 27 /* smart idle, enable wakeup */ 28 #define SYSCONFIG_WORD 0x14 29 30 /* mpu gpio */ 31 static struct __initdata resource omap16xx_mpu_gpio_resources[] = { 32 { 33 .start = OMAP1_MPUIO_VBASE, 34 .end = OMAP1_MPUIO_VBASE + SZ_2K - 1, 35 .flags = IORESOURCE_MEM, 36 }, 37 { 38 .start = INT_MPUIO, 39 .flags = IORESOURCE_IRQ, 40 }, 41 }; 42 43 static struct omap_gpio_reg_offs omap16xx_mpuio_regs = { 44 .revision = USHRT_MAX, 45 .direction = OMAP_MPUIO_IO_CNTL, 46 .datain = OMAP_MPUIO_INPUT_LATCH, 47 .dataout = OMAP_MPUIO_OUTPUT, 48 .irqstatus = OMAP_MPUIO_GPIO_INT, 49 .irqenable = OMAP_MPUIO_GPIO_MASKIT, 50 .irqenable_inv = true, 51 .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE, 52 }; 53 54 static struct __initdata omap_gpio_platform_data omap16xx_mpu_gpio_config = { 55 .virtual_irq_start = IH_MPUIO_BASE, 56 .is_mpuio = true, 57 .bank_width = 16, 58 .bank_stride = 1, 59 .regs = &omap16xx_mpuio_regs, 60 }; 61 62 static struct platform_device omap16xx_mpu_gpio = { 63 .name = "omap_gpio", 64 .id = 0, 65 .dev = { 66 .platform_data = &omap16xx_mpu_gpio_config, 67 }, 68 .num_resources = ARRAY_SIZE(omap16xx_mpu_gpio_resources), 69 .resource = omap16xx_mpu_gpio_resources, 70 }; 71 72 /* gpio1 */ 73 static struct __initdata resource omap16xx_gpio1_resources[] = { 74 { 75 .start = OMAP1610_GPIO1_BASE, 76 .end = OMAP1610_GPIO1_BASE + SZ_2K - 1, 77 .flags = IORESOURCE_MEM, 78 }, 79 { 80 .start = INT_GPIO_BANK1, 81 .flags = IORESOURCE_IRQ, 82 }, 83 }; 84 85 static struct omap_gpio_reg_offs omap16xx_gpio_regs = { 86 .revision = OMAP1610_GPIO_REVISION, 87 .direction = OMAP1610_GPIO_DIRECTION, 88 .set_dataout = OMAP1610_GPIO_SET_DATAOUT, 89 .clr_dataout = OMAP1610_GPIO_CLEAR_DATAOUT, 90 .datain = OMAP1610_GPIO_DATAIN, 91 .dataout = OMAP1610_GPIO_DATAOUT, 92 .irqstatus = OMAP1610_GPIO_IRQSTATUS1, 93 .irqenable = OMAP1610_GPIO_IRQENABLE1, 94 .set_irqenable = OMAP1610_GPIO_SET_IRQENABLE1, 95 .clr_irqenable = OMAP1610_GPIO_CLEAR_IRQENABLE1, 96 .wkup_en = OMAP1610_GPIO_WAKEUPENABLE, 97 .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1, 98 .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2, 99 }; 100 101 static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = { 102 .virtual_irq_start = IH_GPIO_BASE, 103 .bank_width = 16, 104 .regs = &omap16xx_gpio_regs, 105 }; 106 107 static struct platform_device omap16xx_gpio1 = { 108 .name = "omap_gpio", 109 .id = 1, 110 .dev = { 111 .platform_data = &omap16xx_gpio1_config, 112 }, 113 .num_resources = ARRAY_SIZE(omap16xx_gpio1_resources), 114 .resource = omap16xx_gpio1_resources, 115 }; 116 117 /* gpio2 */ 118 static struct __initdata resource omap16xx_gpio2_resources[] = { 119 { 120 .start = OMAP1610_GPIO2_BASE, 121 .end = OMAP1610_GPIO2_BASE + SZ_2K - 1, 122 .flags = IORESOURCE_MEM, 123 }, 124 { 125 .start = INT_1610_GPIO_BANK2, 126 .flags = IORESOURCE_IRQ, 127 }, 128 }; 129 130 static struct __initdata omap_gpio_platform_data omap16xx_gpio2_config = { 131 .virtual_irq_start = IH_GPIO_BASE + 16, 132 .bank_width = 16, 133 .regs = &omap16xx_gpio_regs, 134 }; 135 136 static struct platform_device omap16xx_gpio2 = { 137 .name = "omap_gpio", 138 .id = 2, 139 .dev = { 140 .platform_data = &omap16xx_gpio2_config, 141 }, 142 .num_resources = ARRAY_SIZE(omap16xx_gpio2_resources), 143 .resource = omap16xx_gpio2_resources, 144 }; 145 146 /* gpio3 */ 147 static struct __initdata resource omap16xx_gpio3_resources[] = { 148 { 149 .start = OMAP1610_GPIO3_BASE, 150 .end = OMAP1610_GPIO3_BASE + SZ_2K - 1, 151 .flags = IORESOURCE_MEM, 152 }, 153 { 154 .start = INT_1610_GPIO_BANK3, 155 .flags = IORESOURCE_IRQ, 156 }, 157 }; 158 159 static struct __initdata omap_gpio_platform_data omap16xx_gpio3_config = { 160 .virtual_irq_start = IH_GPIO_BASE + 32, 161 .bank_width = 16, 162 .regs = &omap16xx_gpio_regs, 163 }; 164 165 static struct platform_device omap16xx_gpio3 = { 166 .name = "omap_gpio", 167 .id = 3, 168 .dev = { 169 .platform_data = &omap16xx_gpio3_config, 170 }, 171 .num_resources = ARRAY_SIZE(omap16xx_gpio3_resources), 172 .resource = omap16xx_gpio3_resources, 173 }; 174 175 /* gpio4 */ 176 static struct __initdata resource omap16xx_gpio4_resources[] = { 177 { 178 .start = OMAP1610_GPIO4_BASE, 179 .end = OMAP1610_GPIO4_BASE + SZ_2K - 1, 180 .flags = IORESOURCE_MEM, 181 }, 182 { 183 .start = INT_1610_GPIO_BANK4, 184 .flags = IORESOURCE_IRQ, 185 }, 186 }; 187 188 static struct __initdata omap_gpio_platform_data omap16xx_gpio4_config = { 189 .virtual_irq_start = IH_GPIO_BASE + 48, 190 .bank_width = 16, 191 .regs = &omap16xx_gpio_regs, 192 }; 193 194 static struct platform_device omap16xx_gpio4 = { 195 .name = "omap_gpio", 196 .id = 4, 197 .dev = { 198 .platform_data = &omap16xx_gpio4_config, 199 }, 200 .num_resources = ARRAY_SIZE(omap16xx_gpio4_resources), 201 .resource = omap16xx_gpio4_resources, 202 }; 203 204 static struct __initdata platform_device * omap16xx_gpio_dev[] = { 205 &omap16xx_mpu_gpio, 206 &omap16xx_gpio1, 207 &omap16xx_gpio2, 208 &omap16xx_gpio3, 209 &omap16xx_gpio4, 210 }; 211 212 /* 213 * omap16xx_gpio_init needs to be done before 214 * machine_init functions access gpio APIs. 215 * Hence omap16xx_gpio_init is a postcore_initcall. 216 */ 217 static int __init omap16xx_gpio_init(void) 218 { 219 int i; 220 void __iomem *base; 221 struct resource *res; 222 struct platform_device *pdev; 223 struct omap_gpio_platform_data *pdata; 224 225 if (!cpu_is_omap16xx()) 226 return -EINVAL; 227 228 /* 229 * Enable system clock for GPIO module. 230 * The CAM_CLK_CTRL *is* really the right place. 231 */ 232 omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04, 233 ULPD_CAM_CLK_CTRL); 234 235 for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) { 236 pdev = omap16xx_gpio_dev[i]; 237 pdata = pdev->dev.platform_data; 238 239 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 240 if (unlikely(!res)) { 241 dev_err(&pdev->dev, "Invalid mem resource.\n"); 242 return -ENODEV; 243 } 244 245 base = ioremap(res->start, resource_size(res)); 246 if (unlikely(!base)) { 247 dev_err(&pdev->dev, "ioremap failed.\n"); 248 return -ENOMEM; 249 } 250 251 __raw_writel(SYSCONFIG_WORD, base + OMAP1610_GPIO_SYSCONFIG); 252 iounmap(base); 253 254 platform_device_register(omap16xx_gpio_dev[i]); 255 } 256 257 return 0; 258 } 259 postcore_initcall(omap16xx_gpio_init); 260