xref: /openbmc/linux/arch/arm/mach-omap1/devices.c (revision f4356947)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * linux/arch/arm/mach-omap1/devices.c
4  *
5  * OMAP1 platform device setup/initialization
6  */
7 
8 #include <linux/dma-mapping.h>
9 #include <linux/gpio.h>
10 #include <linux/module.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/spi/spi.h>
15 
16 #include <linux/platform_data/omap-wd-timer.h>
17 #include <linux/soc/ti/omap1-io.h>
18 
19 #include <asm/mach/map.h>
20 
21 #include "tc.h"
22 #include "mux.h"
23 
24 #include "hardware.h"
25 #include "common.h"
26 #include "clock.h"
27 #include "mmc.h"
28 #include "sram.h"
29 
30 #if IS_ENABLED(CONFIG_RTC_DRV_OMAP)
31 
32 #define	OMAP_RTC_BASE		0xfffb4800
33 
34 static struct resource rtc_resources[] = {
35 	{
36 		.start		= OMAP_RTC_BASE,
37 		.end		= OMAP_RTC_BASE + 0x5f,
38 		.flags		= IORESOURCE_MEM,
39 	},
40 	{
41 		.start		= INT_RTC_TIMER,
42 		.flags		= IORESOURCE_IRQ,
43 	},
44 	{
45 		.start		= INT_RTC_ALARM,
46 		.flags		= IORESOURCE_IRQ,
47 	},
48 };
49 
50 static struct platform_device omap_rtc_device = {
51 	.name           = "omap_rtc",
52 	.id             = -1,
53 	.num_resources	= ARRAY_SIZE(rtc_resources),
54 	.resource	= rtc_resources,
55 };
56 
57 static void omap_init_rtc(void)
58 {
59 	(void) platform_device_register(&omap_rtc_device);
60 }
61 #else
62 static inline void omap_init_rtc(void) {}
63 #endif
64 
65 /*-------------------------------------------------------------------------*/
66 
67 #if IS_ENABLED(CONFIG_MMC_OMAP)
68 
69 static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
70 			int controller_nr)
71 {
72 	if (controller_nr == 0) {
73 		omap_cfg_reg(MMC_CMD);
74 		omap_cfg_reg(MMC_CLK);
75 		omap_cfg_reg(MMC_DAT0);
76 
77 		if (cpu_is_omap1710()) {
78 			omap_cfg_reg(M15_1710_MMC_CLKI);
79 			omap_cfg_reg(P19_1710_MMC_CMDDIR);
80 			omap_cfg_reg(P20_1710_MMC_DATDIR0);
81 		}
82 		if (mmc_controller->slots[0].wires == 4) {
83 			omap_cfg_reg(MMC_DAT1);
84 			/* NOTE: DAT2 can be on W10 (here) or M15 */
85 			if (!mmc_controller->slots[0].nomux)
86 				omap_cfg_reg(MMC_DAT2);
87 			omap_cfg_reg(MMC_DAT3);
88 		}
89 	}
90 
91 	/* Block 2 is on newer chips, and has many pinout options */
92 	if (cpu_is_omap16xx() && controller_nr == 1) {
93 		if (!mmc_controller->slots[1].nomux) {
94 			omap_cfg_reg(Y8_1610_MMC2_CMD);
95 			omap_cfg_reg(Y10_1610_MMC2_CLK);
96 			omap_cfg_reg(R18_1610_MMC2_CLKIN);
97 			omap_cfg_reg(W8_1610_MMC2_DAT0);
98 			if (mmc_controller->slots[1].wires == 4) {
99 				omap_cfg_reg(V8_1610_MMC2_DAT1);
100 				omap_cfg_reg(W15_1610_MMC2_DAT2);
101 				omap_cfg_reg(R10_1610_MMC2_DAT3);
102 			}
103 
104 			/* These are needed for the level shifter */
105 			omap_cfg_reg(V9_1610_MMC2_CMDDIR);
106 			omap_cfg_reg(V5_1610_MMC2_DATDIR0);
107 			omap_cfg_reg(W19_1610_MMC2_DATDIR1);
108 		}
109 
110 		/* Feedback clock must be set on OMAP-1710 MMC2 */
111 		if (cpu_is_omap1710())
112 			omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
113 					MOD_CONF_CTRL_1);
114 	}
115 }
116 
117 #define OMAP_MMC_NR_RES		4
118 
119 /*
120  * Register MMC devices.
121  */
122 static int __init omap_mmc_add(const char *name, int id, unsigned long base,
123 				unsigned long size, unsigned int irq,
124 				unsigned rx_req, unsigned tx_req,
125 				struct omap_mmc_platform_data *data)
126 {
127 	struct platform_device *pdev;
128 	struct resource res[OMAP_MMC_NR_RES];
129 	int ret;
130 
131 	pdev = platform_device_alloc(name, id);
132 	if (!pdev)
133 		return -ENOMEM;
134 
135 	memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));
136 	res[0].start = base;
137 	res[0].end = base + size - 1;
138 	res[0].flags = IORESOURCE_MEM;
139 	res[1].start = res[1].end = irq;
140 	res[1].flags = IORESOURCE_IRQ;
141 	res[2].start = rx_req;
142 	res[2].name = "rx";
143 	res[2].flags = IORESOURCE_DMA;
144 	res[3].start = tx_req;
145 	res[3].name = "tx";
146 	res[3].flags = IORESOURCE_DMA;
147 
148 	if (cpu_is_omap15xx())
149 		data->slots[0].features = MMC_OMAP15XX;
150 	if (cpu_is_omap16xx())
151 		data->slots[0].features = MMC_OMAP16XX;
152 
153 	ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
154 	if (ret == 0)
155 		ret = platform_device_add_data(pdev, data, sizeof(*data));
156 	if (ret)
157 		goto fail;
158 
159 	ret = platform_device_add(pdev);
160 	if (ret)
161 		goto fail;
162 
163 	/* return device handle to board setup code */
164 	data->dev = &pdev->dev;
165 	return 0;
166 
167 fail:
168 	platform_device_put(pdev);
169 	return ret;
170 }
171 
172 void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
173 			int nr_controllers)
174 {
175 	int i;
176 
177 	for (i = 0; i < nr_controllers; i++) {
178 		unsigned long base, size;
179 		unsigned rx_req, tx_req;
180 		unsigned int irq = 0;
181 
182 		if (!mmc_data[i])
183 			continue;
184 
185 		omap1_mmc_mux(mmc_data[i], i);
186 
187 		switch (i) {
188 		case 0:
189 			base = OMAP1_MMC1_BASE;
190 			irq = INT_MMC;
191 			rx_req = 22;
192 			tx_req = 21;
193 			break;
194 		case 1:
195 			if (!cpu_is_omap16xx())
196 				return;
197 			base = OMAP1_MMC2_BASE;
198 			irq = INT_1610_MMC2;
199 			rx_req = 55;
200 			tx_req = 54;
201 			break;
202 		default:
203 			continue;
204 		}
205 		size = OMAP1_MMC_SIZE;
206 
207 		omap_mmc_add("mmci-omap", i, base, size, irq,
208 				rx_req, tx_req, mmc_data[i]);
209 	}
210 }
211 
212 #endif
213 
214 /*-------------------------------------------------------------------------*/
215 
216 /* Numbering for the SPI-capable controllers when used for SPI:
217  * spi		= 1
218  * uwire	= 2
219  * mmc1..2	= 3..4
220  * mcbsp1..3	= 5..7
221  */
222 
223 #if IS_ENABLED(CONFIG_SPI_OMAP_UWIRE)
224 
225 #define	OMAP_UWIRE_BASE		0xfffb3000
226 
227 static struct resource uwire_resources[] = {
228 	{
229 		.start		= OMAP_UWIRE_BASE,
230 		.end		= OMAP_UWIRE_BASE + 0x20,
231 		.flags		= IORESOURCE_MEM,
232 	},
233 };
234 
235 static struct platform_device omap_uwire_device = {
236 	.name	   = "omap_uwire",
237 	.id	     = -1,
238 	.num_resources	= ARRAY_SIZE(uwire_resources),
239 	.resource	= uwire_resources,
240 };
241 
242 static void omap_init_uwire(void)
243 {
244 	/* FIXME define and use a boot tag; not all boards will be hooking
245 	 * up devices to the microwire controller, and multi-board configs
246 	 * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
247 	 */
248 
249 	/* board-specific code must configure chipselects (only a few
250 	 * are normally used) and SCLK/SDI/SDO (each has two choices).
251 	 */
252 	(void) platform_device_register(&omap_uwire_device);
253 }
254 #else
255 static inline void omap_init_uwire(void) {}
256 #endif
257 
258 
259 #define OMAP1_RNG_BASE		0xfffe5000
260 
261 static struct resource omap1_rng_resources[] = {
262 	{
263 		.start		= OMAP1_RNG_BASE,
264 		.end		= OMAP1_RNG_BASE + 0x4f,
265 		.flags		= IORESOURCE_MEM,
266 	},
267 };
268 
269 static struct platform_device omap1_rng_device = {
270 	.name		= "omap_rng",
271 	.id		= -1,
272 	.num_resources	= ARRAY_SIZE(omap1_rng_resources),
273 	.resource	= omap1_rng_resources,
274 };
275 
276 static void omap1_init_rng(void)
277 {
278 	if (!cpu_is_omap16xx())
279 		return;
280 
281 	(void) platform_device_register(&omap1_rng_device);
282 }
283 
284 /*-------------------------------------------------------------------------*/
285 
286 /*
287  * This gets called after board-specific INIT_MACHINE, and initializes most
288  * on-chip peripherals accessible on this board (except for few like USB):
289  *
290  *  (a) Does any "standard config" pin muxing needed.  Board-specific
291  *	code will have muxed GPIO pins and done "nonstandard" setup;
292  *	that code could live in the boot loader.
293  *  (b) Populating board-specific platform_data with the data drivers
294  *	rely on to handle wiring variations.
295  *  (c) Creating platform devices as meaningful on this board and
296  *	with this kernel configuration.
297  *
298  * Claiming GPIOs, and setting their direction and initial values, is the
299  * responsibility of the device drivers.  So is responding to probe().
300  *
301  * Board-specific knowledge like creating devices or pin setup is to be
302  * kept out of drivers as much as possible.  In particular, pin setup
303  * may be handled by the boot loader, and drivers should expect it will
304  * normally have been done by the time they're probed.
305  */
306 static int __init omap1_init_devices(void)
307 {
308 	if (!cpu_class_is_omap1())
309 		return -ENODEV;
310 
311 	omap1_sram_init();
312 	omap1_clk_late_init();
313 
314 	/* please keep these calls, and their implementations above,
315 	 * in alphabetical order so they're easier to sort through.
316 	 */
317 
318 	omap_init_rtc();
319 	omap_init_uwire();
320 	omap1_init_rng();
321 
322 	return 0;
323 }
324 arch_initcall(omap1_init_devices);
325 
326 #if IS_ENABLED(CONFIG_OMAP_WATCHDOG)
327 
328 static struct resource wdt_resources[] = {
329 	{
330 		.start		= 0xfffeb000,
331 		.end		= 0xfffeb07F,
332 		.flags		= IORESOURCE_MEM,
333 	},
334 };
335 
336 static struct platform_device omap_wdt_device = {
337 	.name		= "omap_wdt",
338 	.id		= -1,
339 	.num_resources	= ARRAY_SIZE(wdt_resources),
340 	.resource	= wdt_resources,
341 };
342 
343 static int __init omap_init_wdt(void)
344 {
345 	struct omap_wd_timer_platform_data pdata;
346 	int ret;
347 
348 	if (!cpu_is_omap16xx())
349 		return -ENODEV;
350 
351 	pdata.read_reset_sources = omap1_get_reset_sources;
352 
353 	ret = platform_device_register(&omap_wdt_device);
354 	if (!ret) {
355 		ret = platform_device_add_data(&omap_wdt_device, &pdata,
356 					       sizeof(pdata));
357 		if (ret)
358 			platform_device_del(&omap_wdt_device);
359 	}
360 
361 	return ret;
362 }
363 subsys_initcall(omap_init_wdt);
364 #endif
365