1 /* 2 * linux/arch/arm/mach-omap1/devices.c 3 * 4 * OMAP1 platform device setup/initialization 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 */ 11 12 #include <linux/dma-mapping.h> 13 #include <linux/gpio.h> 14 #include <linux/module.h> 15 #include <linux/kernel.h> 16 #include <linux/init.h> 17 #include <linux/platform_device.h> 18 #include <linux/spi/spi.h> 19 20 #include <asm/mach/map.h> 21 22 #include <plat/tc.h> 23 #include <plat/board.h> 24 #include <plat/mux.h> 25 #include <plat/dma.h> 26 #include <plat/mmc.h> 27 #include <plat/omap7xx.h> 28 29 #include <mach/camera.h> 30 #include <mach/hardware.h> 31 32 #include "common.h" 33 #include "clock.h" 34 35 #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE) 36 37 static struct platform_device omap_pcm = { 38 .name = "omap-pcm-audio", 39 .id = -1, 40 }; 41 42 static void omap_init_audio(void) 43 { 44 platform_device_register(&omap_pcm); 45 } 46 47 #else 48 static inline void omap_init_audio(void) {} 49 #endif 50 51 /*-------------------------------------------------------------------------*/ 52 53 #if defined(CONFIG_RTC_DRV_OMAP) || defined(CONFIG_RTC_DRV_OMAP_MODULE) 54 55 #define OMAP_RTC_BASE 0xfffb4800 56 57 static struct resource rtc_resources[] = { 58 { 59 .start = OMAP_RTC_BASE, 60 .end = OMAP_RTC_BASE + 0x5f, 61 .flags = IORESOURCE_MEM, 62 }, 63 { 64 .start = INT_RTC_TIMER, 65 .flags = IORESOURCE_IRQ, 66 }, 67 { 68 .start = INT_RTC_ALARM, 69 .flags = IORESOURCE_IRQ, 70 }, 71 }; 72 73 static struct platform_device omap_rtc_device = { 74 .name = "omap_rtc", 75 .id = -1, 76 .num_resources = ARRAY_SIZE(rtc_resources), 77 .resource = rtc_resources, 78 }; 79 80 static void omap_init_rtc(void) 81 { 82 (void) platform_device_register(&omap_rtc_device); 83 } 84 #else 85 static inline void omap_init_rtc(void) {} 86 #endif 87 88 static inline void omap_init_mbox(void) { } 89 90 /*-------------------------------------------------------------------------*/ 91 92 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) 93 94 static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller, 95 int controller_nr) 96 { 97 if (controller_nr == 0) { 98 if (cpu_is_omap7xx()) { 99 omap_cfg_reg(MMC_7XX_CMD); 100 omap_cfg_reg(MMC_7XX_CLK); 101 omap_cfg_reg(MMC_7XX_DAT0); 102 } else { 103 omap_cfg_reg(MMC_CMD); 104 omap_cfg_reg(MMC_CLK); 105 omap_cfg_reg(MMC_DAT0); 106 } 107 108 if (cpu_is_omap1710()) { 109 omap_cfg_reg(M15_1710_MMC_CLKI); 110 omap_cfg_reg(P19_1710_MMC_CMDDIR); 111 omap_cfg_reg(P20_1710_MMC_DATDIR0); 112 } 113 if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) { 114 omap_cfg_reg(MMC_DAT1); 115 /* NOTE: DAT2 can be on W10 (here) or M15 */ 116 if (!mmc_controller->slots[0].nomux) 117 omap_cfg_reg(MMC_DAT2); 118 omap_cfg_reg(MMC_DAT3); 119 } 120 } 121 122 /* Block 2 is on newer chips, and has many pinout options */ 123 if (cpu_is_omap16xx() && controller_nr == 1) { 124 if (!mmc_controller->slots[1].nomux) { 125 omap_cfg_reg(Y8_1610_MMC2_CMD); 126 omap_cfg_reg(Y10_1610_MMC2_CLK); 127 omap_cfg_reg(R18_1610_MMC2_CLKIN); 128 omap_cfg_reg(W8_1610_MMC2_DAT0); 129 if (mmc_controller->slots[1].wires == 4) { 130 omap_cfg_reg(V8_1610_MMC2_DAT1); 131 omap_cfg_reg(W15_1610_MMC2_DAT2); 132 omap_cfg_reg(R10_1610_MMC2_DAT3); 133 } 134 135 /* These are needed for the level shifter */ 136 omap_cfg_reg(V9_1610_MMC2_CMDDIR); 137 omap_cfg_reg(V5_1610_MMC2_DATDIR0); 138 omap_cfg_reg(W19_1610_MMC2_DATDIR1); 139 } 140 141 /* Feedback clock must be set on OMAP-1710 MMC2 */ 142 if (cpu_is_omap1710()) 143 omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24), 144 MOD_CONF_CTRL_1); 145 } 146 } 147 148 #define OMAP_MMC_NR_RES 4 149 150 /* 151 * Register MMC devices. 152 */ 153 static int __init omap_mmc_add(const char *name, int id, unsigned long base, 154 unsigned long size, unsigned int irq, 155 unsigned rx_req, unsigned tx_req, 156 struct omap_mmc_platform_data *data) 157 { 158 struct platform_device *pdev; 159 struct resource res[OMAP_MMC_NR_RES]; 160 int ret; 161 162 pdev = platform_device_alloc(name, id); 163 if (!pdev) 164 return -ENOMEM; 165 166 memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource)); 167 res[0].start = base; 168 res[0].end = base + size - 1; 169 res[0].flags = IORESOURCE_MEM; 170 res[1].start = res[1].end = irq; 171 res[1].flags = IORESOURCE_IRQ; 172 res[2].start = rx_req; 173 res[2].name = "rx"; 174 res[2].flags = IORESOURCE_DMA; 175 res[3].start = tx_req; 176 res[3].name = "tx"; 177 res[3].flags = IORESOURCE_DMA; 178 179 ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res)); 180 if (ret == 0) 181 ret = platform_device_add_data(pdev, data, sizeof(*data)); 182 if (ret) 183 goto fail; 184 185 ret = platform_device_add(pdev); 186 if (ret) 187 goto fail; 188 189 /* return device handle to board setup code */ 190 data->dev = &pdev->dev; 191 return 0; 192 193 fail: 194 platform_device_put(pdev); 195 return ret; 196 } 197 198 void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, 199 int nr_controllers) 200 { 201 int i; 202 203 for (i = 0; i < nr_controllers; i++) { 204 unsigned long base, size; 205 unsigned rx_req, tx_req; 206 unsigned int irq = 0; 207 208 if (!mmc_data[i]) 209 continue; 210 211 omap1_mmc_mux(mmc_data[i], i); 212 213 switch (i) { 214 case 0: 215 base = OMAP1_MMC1_BASE; 216 irq = INT_MMC; 217 rx_req = OMAP_DMA_MMC_RX; 218 tx_req = OMAP_DMA_MMC_TX; 219 break; 220 case 1: 221 if (!cpu_is_omap16xx()) 222 return; 223 base = OMAP1_MMC2_BASE; 224 irq = INT_1610_MMC2; 225 rx_req = OMAP_DMA_MMC2_RX; 226 tx_req = OMAP_DMA_MMC2_TX; 227 break; 228 default: 229 continue; 230 } 231 size = OMAP1_MMC_SIZE; 232 233 omap_mmc_add("mmci-omap", i, base, size, irq, 234 rx_req, tx_req, mmc_data[i]); 235 }; 236 } 237 238 #endif 239 240 /*-------------------------------------------------------------------------*/ 241 242 /* OMAP7xx SPI support */ 243 #if defined(CONFIG_SPI_OMAP_100K) || defined(CONFIG_SPI_OMAP_100K_MODULE) 244 245 struct platform_device omap_spi1 = { 246 .name = "omap1_spi100k", 247 .id = 1, 248 }; 249 250 struct platform_device omap_spi2 = { 251 .name = "omap1_spi100k", 252 .id = 2, 253 }; 254 255 static void omap_init_spi100k(void) 256 { 257 omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff); 258 if (omap_spi1.dev.platform_data) 259 platform_device_register(&omap_spi1); 260 261 omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff); 262 if (omap_spi2.dev.platform_data) 263 platform_device_register(&omap_spi2); 264 } 265 266 #else 267 static inline void omap_init_spi100k(void) 268 { 269 } 270 #endif 271 272 273 #define OMAP1_CAMERA_BASE 0xfffb6800 274 #define OMAP1_CAMERA_IOSIZE 0x1c 275 276 static struct resource omap1_camera_resources[] = { 277 [0] = { 278 .start = OMAP1_CAMERA_BASE, 279 .end = OMAP1_CAMERA_BASE + OMAP1_CAMERA_IOSIZE - 1, 280 .flags = IORESOURCE_MEM, 281 }, 282 [1] = { 283 .start = INT_CAMERA, 284 .flags = IORESOURCE_IRQ, 285 }, 286 }; 287 288 static u64 omap1_camera_dma_mask = DMA_BIT_MASK(32); 289 290 static struct platform_device omap1_camera_device = { 291 .name = "omap1-camera", 292 .id = 0, /* This is used to put cameras on this interface */ 293 .dev = { 294 .dma_mask = &omap1_camera_dma_mask, 295 .coherent_dma_mask = DMA_BIT_MASK(32), 296 }, 297 .num_resources = ARRAY_SIZE(omap1_camera_resources), 298 .resource = omap1_camera_resources, 299 }; 300 301 void __init omap1_camera_init(void *info) 302 { 303 struct platform_device *dev = &omap1_camera_device; 304 int ret; 305 306 dev->dev.platform_data = info; 307 308 ret = platform_device_register(dev); 309 if (ret) 310 dev_err(&dev->dev, "unable to register device: %d\n", ret); 311 } 312 313 314 /*-------------------------------------------------------------------------*/ 315 316 static inline void omap_init_sti(void) {} 317 318 /* Numbering for the SPI-capable controllers when used for SPI: 319 * spi = 1 320 * uwire = 2 321 * mmc1..2 = 3..4 322 * mcbsp1..3 = 5..7 323 */ 324 325 #if defined(CONFIG_SPI_OMAP_UWIRE) || defined(CONFIG_SPI_OMAP_UWIRE_MODULE) 326 327 #define OMAP_UWIRE_BASE 0xfffb3000 328 329 static struct resource uwire_resources[] = { 330 { 331 .start = OMAP_UWIRE_BASE, 332 .end = OMAP_UWIRE_BASE + 0x20, 333 .flags = IORESOURCE_MEM, 334 }, 335 }; 336 337 static struct platform_device omap_uwire_device = { 338 .name = "omap_uwire", 339 .id = -1, 340 .num_resources = ARRAY_SIZE(uwire_resources), 341 .resource = uwire_resources, 342 }; 343 344 static void omap_init_uwire(void) 345 { 346 /* FIXME define and use a boot tag; not all boards will be hooking 347 * up devices to the microwire controller, and multi-board configs 348 * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway... 349 */ 350 351 /* board-specific code must configure chipselects (only a few 352 * are normally used) and SCLK/SDI/SDO (each has two choices). 353 */ 354 (void) platform_device_register(&omap_uwire_device); 355 } 356 #else 357 static inline void omap_init_uwire(void) {} 358 #endif 359 360 361 /* 362 * This gets called after board-specific INIT_MACHINE, and initializes most 363 * on-chip peripherals accessible on this board (except for few like USB): 364 * 365 * (a) Does any "standard config" pin muxing needed. Board-specific 366 * code will have muxed GPIO pins and done "nonstandard" setup; 367 * that code could live in the boot loader. 368 * (b) Populating board-specific platform_data with the data drivers 369 * rely on to handle wiring variations. 370 * (c) Creating platform devices as meaningful on this board and 371 * with this kernel configuration. 372 * 373 * Claiming GPIOs, and setting their direction and initial values, is the 374 * responsibility of the device drivers. So is responding to probe(). 375 * 376 * Board-specific knowledge like creating devices or pin setup is to be 377 * kept out of drivers as much as possible. In particular, pin setup 378 * may be handled by the boot loader, and drivers should expect it will 379 * normally have been done by the time they're probed. 380 */ 381 static int __init omap1_init_devices(void) 382 { 383 if (!cpu_class_is_omap1()) 384 return -ENODEV; 385 386 omap_sram_init(); 387 omap1_clk_late_init(); 388 389 /* please keep these calls, and their implementations above, 390 * in alphabetical order so they're easier to sort through. 391 */ 392 393 omap_init_audio(); 394 omap_init_mbox(); 395 omap_init_rtc(); 396 omap_init_spi100k(); 397 omap_init_sti(); 398 omap_init_uwire(); 399 400 return 0; 401 } 402 arch_initcall(omap1_init_devices); 403 404 #if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE) 405 406 static struct resource wdt_resources[] = { 407 { 408 .start = 0xfffeb000, 409 .end = 0xfffeb07F, 410 .flags = IORESOURCE_MEM, 411 }, 412 }; 413 414 static struct platform_device omap_wdt_device = { 415 .name = "omap_wdt", 416 .id = -1, 417 .num_resources = ARRAY_SIZE(wdt_resources), 418 .resource = wdt_resources, 419 }; 420 421 static int __init omap_init_wdt(void) 422 { 423 if (!cpu_is_omap16xx()) 424 return -ENODEV; 425 426 return platform_device_register(&omap_wdt_device); 427 } 428 subsys_initcall(omap_init_wdt); 429 #endif 430