1 /* 2 * linux/arch/arm/mach-omap1/devices.c 3 * 4 * OMAP1 platform device setup/initialization 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 */ 11 12 #include <linux/dma-mapping.h> 13 #include <linux/gpio.h> 14 #include <linux/module.h> 15 #include <linux/kernel.h> 16 #include <linux/init.h> 17 #include <linux/platform_device.h> 18 #include <linux/spi/spi.h> 19 20 #include <linux/platform_data/omap-wd-timer.h> 21 22 #include <asm/mach/map.h> 23 24 #include <mach/tc.h> 25 #include <mach/mux.h> 26 27 #include <mach/omap7xx.h> 28 #include "camera.h" 29 #include <mach/hardware.h> 30 31 #include "common.h" 32 #include "clock.h" 33 #include "mmc.h" 34 #include "sram.h" 35 36 #if IS_ENABLED(CONFIG_RTC_DRV_OMAP) 37 38 #define OMAP_RTC_BASE 0xfffb4800 39 40 static struct resource rtc_resources[] = { 41 { 42 .start = OMAP_RTC_BASE, 43 .end = OMAP_RTC_BASE + 0x5f, 44 .flags = IORESOURCE_MEM, 45 }, 46 { 47 .start = INT_RTC_TIMER, 48 .flags = IORESOURCE_IRQ, 49 }, 50 { 51 .start = INT_RTC_ALARM, 52 .flags = IORESOURCE_IRQ, 53 }, 54 }; 55 56 static struct platform_device omap_rtc_device = { 57 .name = "omap_rtc", 58 .id = -1, 59 .num_resources = ARRAY_SIZE(rtc_resources), 60 .resource = rtc_resources, 61 }; 62 63 static void omap_init_rtc(void) 64 { 65 (void) platform_device_register(&omap_rtc_device); 66 } 67 #else 68 static inline void omap_init_rtc(void) {} 69 #endif 70 71 static inline void omap_init_mbox(void) { } 72 73 /*-------------------------------------------------------------------------*/ 74 75 #if IS_ENABLED(CONFIG_MMC_OMAP) 76 77 static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller, 78 int controller_nr) 79 { 80 if (controller_nr == 0) { 81 if (cpu_is_omap7xx()) { 82 omap_cfg_reg(MMC_7XX_CMD); 83 omap_cfg_reg(MMC_7XX_CLK); 84 omap_cfg_reg(MMC_7XX_DAT0); 85 } else { 86 omap_cfg_reg(MMC_CMD); 87 omap_cfg_reg(MMC_CLK); 88 omap_cfg_reg(MMC_DAT0); 89 } 90 91 if (cpu_is_omap1710()) { 92 omap_cfg_reg(M15_1710_MMC_CLKI); 93 omap_cfg_reg(P19_1710_MMC_CMDDIR); 94 omap_cfg_reg(P20_1710_MMC_DATDIR0); 95 } 96 if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) { 97 omap_cfg_reg(MMC_DAT1); 98 /* NOTE: DAT2 can be on W10 (here) or M15 */ 99 if (!mmc_controller->slots[0].nomux) 100 omap_cfg_reg(MMC_DAT2); 101 omap_cfg_reg(MMC_DAT3); 102 } 103 } 104 105 /* Block 2 is on newer chips, and has many pinout options */ 106 if (cpu_is_omap16xx() && controller_nr == 1) { 107 if (!mmc_controller->slots[1].nomux) { 108 omap_cfg_reg(Y8_1610_MMC2_CMD); 109 omap_cfg_reg(Y10_1610_MMC2_CLK); 110 omap_cfg_reg(R18_1610_MMC2_CLKIN); 111 omap_cfg_reg(W8_1610_MMC2_DAT0); 112 if (mmc_controller->slots[1].wires == 4) { 113 omap_cfg_reg(V8_1610_MMC2_DAT1); 114 omap_cfg_reg(W15_1610_MMC2_DAT2); 115 omap_cfg_reg(R10_1610_MMC2_DAT3); 116 } 117 118 /* These are needed for the level shifter */ 119 omap_cfg_reg(V9_1610_MMC2_CMDDIR); 120 omap_cfg_reg(V5_1610_MMC2_DATDIR0); 121 omap_cfg_reg(W19_1610_MMC2_DATDIR1); 122 } 123 124 /* Feedback clock must be set on OMAP-1710 MMC2 */ 125 if (cpu_is_omap1710()) 126 omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24), 127 MOD_CONF_CTRL_1); 128 } 129 } 130 131 #define OMAP_MMC_NR_RES 4 132 133 /* 134 * Register MMC devices. 135 */ 136 static int __init omap_mmc_add(const char *name, int id, unsigned long base, 137 unsigned long size, unsigned int irq, 138 unsigned rx_req, unsigned tx_req, 139 struct omap_mmc_platform_data *data) 140 { 141 struct platform_device *pdev; 142 struct resource res[OMAP_MMC_NR_RES]; 143 int ret; 144 145 pdev = platform_device_alloc(name, id); 146 if (!pdev) 147 return -ENOMEM; 148 149 memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource)); 150 res[0].start = base; 151 res[0].end = base + size - 1; 152 res[0].flags = IORESOURCE_MEM; 153 res[1].start = res[1].end = irq; 154 res[1].flags = IORESOURCE_IRQ; 155 res[2].start = rx_req; 156 res[2].name = "rx"; 157 res[2].flags = IORESOURCE_DMA; 158 res[3].start = tx_req; 159 res[3].name = "tx"; 160 res[3].flags = IORESOURCE_DMA; 161 162 if (cpu_is_omap7xx()) 163 data->slots[0].features = MMC_OMAP7XX; 164 if (cpu_is_omap15xx()) 165 data->slots[0].features = MMC_OMAP15XX; 166 if (cpu_is_omap16xx()) 167 data->slots[0].features = MMC_OMAP16XX; 168 169 ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res)); 170 if (ret == 0) 171 ret = platform_device_add_data(pdev, data, sizeof(*data)); 172 if (ret) 173 goto fail; 174 175 ret = platform_device_add(pdev); 176 if (ret) 177 goto fail; 178 179 /* return device handle to board setup code */ 180 data->dev = &pdev->dev; 181 return 0; 182 183 fail: 184 platform_device_put(pdev); 185 return ret; 186 } 187 188 void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, 189 int nr_controllers) 190 { 191 int i; 192 193 for (i = 0; i < nr_controllers; i++) { 194 unsigned long base, size; 195 unsigned rx_req, tx_req; 196 unsigned int irq = 0; 197 198 if (!mmc_data[i]) 199 continue; 200 201 omap1_mmc_mux(mmc_data[i], i); 202 203 switch (i) { 204 case 0: 205 base = OMAP1_MMC1_BASE; 206 irq = INT_MMC; 207 rx_req = 22; 208 tx_req = 21; 209 break; 210 case 1: 211 if (!cpu_is_omap16xx()) 212 return; 213 base = OMAP1_MMC2_BASE; 214 irq = INT_1610_MMC2; 215 rx_req = 55; 216 tx_req = 54; 217 break; 218 default: 219 continue; 220 } 221 size = OMAP1_MMC_SIZE; 222 223 omap_mmc_add("mmci-omap", i, base, size, irq, 224 rx_req, tx_req, mmc_data[i]); 225 } 226 } 227 228 #endif 229 230 /*-------------------------------------------------------------------------*/ 231 232 /* OMAP7xx SPI support */ 233 #if IS_ENABLED(CONFIG_SPI_OMAP_100K) 234 235 struct platform_device omap_spi1 = { 236 .name = "omap1_spi100k", 237 .id = 1, 238 }; 239 240 struct platform_device omap_spi2 = { 241 .name = "omap1_spi100k", 242 .id = 2, 243 }; 244 245 static void omap_init_spi100k(void) 246 { 247 omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff); 248 if (omap_spi1.dev.platform_data) 249 platform_device_register(&omap_spi1); 250 251 omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff); 252 if (omap_spi2.dev.platform_data) 253 platform_device_register(&omap_spi2); 254 } 255 256 #else 257 static inline void omap_init_spi100k(void) 258 { 259 } 260 #endif 261 262 263 #define OMAP1_CAMERA_BASE 0xfffb6800 264 #define OMAP1_CAMERA_IOSIZE 0x1c 265 266 static struct resource omap1_camera_resources[] = { 267 [0] = { 268 .start = OMAP1_CAMERA_BASE, 269 .end = OMAP1_CAMERA_BASE + OMAP1_CAMERA_IOSIZE - 1, 270 .flags = IORESOURCE_MEM, 271 }, 272 [1] = { 273 .start = INT_CAMERA, 274 .flags = IORESOURCE_IRQ, 275 }, 276 }; 277 278 static u64 omap1_camera_dma_mask = DMA_BIT_MASK(32); 279 280 static struct platform_device omap1_camera_device = { 281 .name = "omap1-camera", 282 .id = 0, /* This is used to put cameras on this interface */ 283 .dev = { 284 .dma_mask = &omap1_camera_dma_mask, 285 .coherent_dma_mask = DMA_BIT_MASK(32), 286 }, 287 .num_resources = ARRAY_SIZE(omap1_camera_resources), 288 .resource = omap1_camera_resources, 289 }; 290 291 void __init omap1_camera_init(void *info) 292 { 293 struct platform_device *dev = &omap1_camera_device; 294 int ret; 295 296 dev->dev.platform_data = info; 297 298 ret = platform_device_register(dev); 299 if (ret) 300 dev_err(&dev->dev, "unable to register device: %d\n", ret); 301 } 302 303 304 /*-------------------------------------------------------------------------*/ 305 306 static inline void omap_init_sti(void) {} 307 308 /* Numbering for the SPI-capable controllers when used for SPI: 309 * spi = 1 310 * uwire = 2 311 * mmc1..2 = 3..4 312 * mcbsp1..3 = 5..7 313 */ 314 315 #if IS_ENABLED(CONFIG_SPI_OMAP_UWIRE) 316 317 #define OMAP_UWIRE_BASE 0xfffb3000 318 319 static struct resource uwire_resources[] = { 320 { 321 .start = OMAP_UWIRE_BASE, 322 .end = OMAP_UWIRE_BASE + 0x20, 323 .flags = IORESOURCE_MEM, 324 }, 325 }; 326 327 static struct platform_device omap_uwire_device = { 328 .name = "omap_uwire", 329 .id = -1, 330 .num_resources = ARRAY_SIZE(uwire_resources), 331 .resource = uwire_resources, 332 }; 333 334 static void omap_init_uwire(void) 335 { 336 /* FIXME define and use a boot tag; not all boards will be hooking 337 * up devices to the microwire controller, and multi-board configs 338 * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway... 339 */ 340 341 /* board-specific code must configure chipselects (only a few 342 * are normally used) and SCLK/SDI/SDO (each has two choices). 343 */ 344 (void) platform_device_register(&omap_uwire_device); 345 } 346 #else 347 static inline void omap_init_uwire(void) {} 348 #endif 349 350 351 #define OMAP1_RNG_BASE 0xfffe5000 352 353 static struct resource omap1_rng_resources[] = { 354 { 355 .start = OMAP1_RNG_BASE, 356 .end = OMAP1_RNG_BASE + 0x4f, 357 .flags = IORESOURCE_MEM, 358 }, 359 }; 360 361 static struct platform_device omap1_rng_device = { 362 .name = "omap_rng", 363 .id = -1, 364 .num_resources = ARRAY_SIZE(omap1_rng_resources), 365 .resource = omap1_rng_resources, 366 }; 367 368 static void omap1_init_rng(void) 369 { 370 if (!cpu_is_omap16xx()) 371 return; 372 373 (void) platform_device_register(&omap1_rng_device); 374 } 375 376 /*-------------------------------------------------------------------------*/ 377 378 /* 379 * This gets called after board-specific INIT_MACHINE, and initializes most 380 * on-chip peripherals accessible on this board (except for few like USB): 381 * 382 * (a) Does any "standard config" pin muxing needed. Board-specific 383 * code will have muxed GPIO pins and done "nonstandard" setup; 384 * that code could live in the boot loader. 385 * (b) Populating board-specific platform_data with the data drivers 386 * rely on to handle wiring variations. 387 * (c) Creating platform devices as meaningful on this board and 388 * with this kernel configuration. 389 * 390 * Claiming GPIOs, and setting their direction and initial values, is the 391 * responsibility of the device drivers. So is responding to probe(). 392 * 393 * Board-specific knowledge like creating devices or pin setup is to be 394 * kept out of drivers as much as possible. In particular, pin setup 395 * may be handled by the boot loader, and drivers should expect it will 396 * normally have been done by the time they're probed. 397 */ 398 static int __init omap1_init_devices(void) 399 { 400 if (!cpu_class_is_omap1()) 401 return -ENODEV; 402 403 omap_sram_init(); 404 omap1_clk_late_init(); 405 406 /* please keep these calls, and their implementations above, 407 * in alphabetical order so they're easier to sort through. 408 */ 409 410 omap_init_mbox(); 411 omap_init_rtc(); 412 omap_init_spi100k(); 413 omap_init_sti(); 414 omap_init_uwire(); 415 omap1_init_rng(); 416 417 return 0; 418 } 419 arch_initcall(omap1_init_devices); 420 421 #if IS_ENABLED(CONFIG_OMAP_WATCHDOG) 422 423 static struct resource wdt_resources[] = { 424 { 425 .start = 0xfffeb000, 426 .end = 0xfffeb07F, 427 .flags = IORESOURCE_MEM, 428 }, 429 }; 430 431 static struct platform_device omap_wdt_device = { 432 .name = "omap_wdt", 433 .id = -1, 434 .num_resources = ARRAY_SIZE(wdt_resources), 435 .resource = wdt_resources, 436 }; 437 438 static int __init omap_init_wdt(void) 439 { 440 struct omap_wd_timer_platform_data pdata; 441 int ret; 442 443 if (!cpu_is_omap16xx()) 444 return -ENODEV; 445 446 pdata.read_reset_sources = omap1_get_reset_sources; 447 448 ret = platform_device_register(&omap_wdt_device); 449 if (!ret) { 450 ret = platform_device_add_data(&omap_wdt_device, &pdata, 451 sizeof(pdata)); 452 if (ret) 453 platform_device_del(&omap_wdt_device); 454 } 455 456 return ret; 457 } 458 subsys_initcall(omap_init_wdt); 459 #endif 460