1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * linux/arch/arm/mach-omap1/clock.h 4 * 5 * Copyright (C) 2004 - 2005, 2009 Nokia corporation 6 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com> 7 * Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc 8 */ 9 10 #ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H 11 #define __ARCH_ARM_MACH_OMAP1_CLOCK_H 12 13 #include <linux/clk.h> 14 #include <linux/list.h> 15 16 #include <linux/clkdev.h> 17 18 struct module; 19 struct clk; 20 21 struct omap_clk { 22 u16 cpu; 23 struct clk_lookup lk; 24 }; 25 26 #define CLK(dev, con, ck, cp) \ 27 { \ 28 .cpu = cp, \ 29 .lk = { \ 30 .dev_id = dev, \ 31 .con_id = con, \ 32 .clk = ck, \ 33 }, \ 34 } 35 36 /* Platform flags for the clkdev-OMAP integration code */ 37 #define CK_310 (1 << 0) 38 #define CK_7XX (1 << 1) /* 7xx, 850 */ 39 #define CK_1510 (1 << 2) 40 #define CK_16XX (1 << 3) /* 16xx, 17xx, 5912 */ 41 #define CK_1710 (1 << 4) /* 1710 extra for rate selection */ 42 43 44 /* Temporary, needed during the common clock framework conversion */ 45 #define __clk_get_name(clk) (clk->name) 46 47 /** 48 * struct clkops - some clock function pointers 49 * @enable: fn ptr that enables the current clock in hardware 50 * @disable: fn ptr that enables the current clock in hardware 51 * @allow_idle: fn ptr that enables autoidle for the current clock in hardware 52 */ 53 struct clkops { 54 int (*enable)(struct clk *); 55 void (*disable)(struct clk *); 56 }; 57 58 /* 59 * struct clk.flags possibilities 60 * 61 * XXX document the rest of the clock flags here 62 */ 63 #define ENABLE_REG_32BIT (1 << 0) /* Use 32-bit access */ 64 #define CLOCK_IDLE_CONTROL (1 << 1) 65 #define CLOCK_NO_IDLE_PARENT (1 << 2) 66 67 /** 68 * struct clk - OMAP struct clk 69 * @node: list_head connecting this clock into the full clock list 70 * @ops: struct clkops * for this clock 71 * @name: the name of the clock in the hardware (used in hwmod data and debug) 72 * @parent: pointer to this clock's parent struct clk 73 * @children: list_head connecting to the child clks' @sibling list_heads 74 * @sibling: list_head connecting this clk to its parent clk's @children 75 * @rate: current clock rate 76 * @enable_reg: register to write to enable the clock (see @enable_bit) 77 * @recalc: fn ptr that returns the clock's current rate 78 * @set_rate: fn ptr that can change the clock's current rate 79 * @round_rate: fn ptr that can round the clock's current rate 80 * @init: fn ptr to do clock-specific initialization 81 * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg) 82 * @usecount: number of users that have requested this clock to be enabled 83 * @fixed_div: when > 0, this clock's rate is its parent's rate / @fixed_div 84 * @flags: see "struct clk.flags possibilities" above 85 * @rate_offset: bitshift for rate selection bitfield (OMAP1 only) 86 * 87 * XXX @rate_offset should probably be removed and OMAP1 88 * clock code converted to use clksel. 89 * 90 * XXX @usecount is poorly named. It should be "enable_count" or 91 * something similar. "users" in the description refers to kernel 92 * code (core code or drivers) that have called clk_enable() and not 93 * yet called clk_disable(); the usecount of parent clocks is also 94 * incremented by the clock code when clk_enable() is called on child 95 * clocks and decremented by the clock code when clk_disable() is 96 * called on child clocks. 97 * 98 * XXX @usecount, @children, @sibling should be marked for 99 * internal use only. 100 * 101 * @children and @sibling are used to optimize parent-to-child clock 102 * tree traversals. (child-to-parent traversals use @parent.) 103 * 104 * XXX The notion of the clock's current rate probably needs to be 105 * separated from the clock's target rate. 106 */ 107 struct clk { 108 struct list_head node; 109 const struct clkops *ops; 110 const char *name; 111 struct clk *parent; 112 struct list_head children; 113 struct list_head sibling; /* node for children */ 114 unsigned long rate; 115 void __iomem *enable_reg; 116 unsigned long (*recalc)(struct clk *); 117 int (*set_rate)(struct clk *, unsigned long); 118 long (*round_rate)(struct clk *, unsigned long); 119 void (*init)(struct clk *); 120 u8 enable_bit; 121 s8 usecount; 122 u8 fixed_div; 123 u8 flags; 124 u8 rate_offset; 125 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) 126 struct dentry *dent; /* For visible tree hierarchy */ 127 #endif 128 }; 129 130 extern void clk_preinit(struct clk *clk); 131 extern int clk_register(struct clk *clk); 132 extern void clk_unregister(struct clk *clk); 133 extern void propagate_rate(struct clk *clk); 134 extern unsigned long followparent_recalc(struct clk *clk); 135 unsigned long omap_fixed_divisor_recalc(struct clk *clk); 136 137 extern const struct clkops clkops_null; 138 139 extern struct clk dummy_ck; 140 141 int omap1_clk_init(void); 142 void omap1_clk_late_init(void); 143 extern int omap1_clk_enable(struct clk *clk); 144 extern void omap1_clk_disable(struct clk *clk); 145 extern long omap1_clk_round_rate(struct clk *clk, unsigned long rate); 146 extern int omap1_clk_set_rate(struct clk *clk, unsigned long rate); 147 extern unsigned long omap1_ckctl_recalc(struct clk *clk); 148 extern int omap1_set_sossi_rate(struct clk *clk, unsigned long rate); 149 extern unsigned long omap1_sossi_recalc(struct clk *clk); 150 extern unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk); 151 extern int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate); 152 extern int omap1_set_uart_rate(struct clk *clk, unsigned long rate); 153 extern unsigned long omap1_uart_recalc(struct clk *clk); 154 extern int omap1_set_ext_clk_rate(struct clk *clk, unsigned long rate); 155 extern long omap1_round_ext_clk_rate(struct clk *clk, unsigned long rate); 156 extern void omap1_init_ext_clk(struct clk *clk); 157 extern int omap1_select_table_rate(struct clk *clk, unsigned long rate); 158 extern long omap1_round_to_table_rate(struct clk *clk, unsigned long rate); 159 extern int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate); 160 extern long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate); 161 162 #ifdef CONFIG_OMAP_RESET_CLOCKS 163 extern void omap1_clk_disable_unused(struct clk *clk); 164 #else 165 #define omap1_clk_disable_unused NULL 166 #endif 167 168 struct uart_clk { 169 struct clk clk; 170 unsigned long sysc_addr; 171 }; 172 173 /* Provide a method for preventing idling some ARM IDLECT clocks */ 174 struct arm_idlect1_clk { 175 struct clk clk; 176 unsigned long no_idle_count; 177 __u8 idlect_shift; 178 }; 179 180 /* ARM_CKCTL bit shifts */ 181 #define CKCTL_PERDIV_OFFSET 0 182 #define CKCTL_LCDDIV_OFFSET 2 183 #define CKCTL_ARMDIV_OFFSET 4 184 #define CKCTL_DSPDIV_OFFSET 6 185 #define CKCTL_TCDIV_OFFSET 8 186 #define CKCTL_DSPMMUDIV_OFFSET 10 187 /*#define ARM_TIMXO 12*/ 188 #define EN_DSPCK 13 189 /*#define ARM_INTHCK_SEL 14*/ /* Divide-by-2 for mpu inth_ck */ 190 /* DSP_CKCTL bit shifts */ 191 #define CKCTL_DSPPERDIV_OFFSET 0 192 193 /* ARM_IDLECT2 bit shifts */ 194 #define EN_WDTCK 0 195 #define EN_XORPCK 1 196 #define EN_PERCK 2 197 #define EN_LCDCK 3 198 #define EN_LBCK 4 /* Not on 1610/1710 */ 199 /*#define EN_HSABCK 5*/ 200 #define EN_APICK 6 201 #define EN_TIMCK 7 202 #define DMACK_REQ 8 203 #define EN_GPIOCK 9 /* Not on 1610/1710 */ 204 /*#define EN_LBFREECK 10*/ 205 #define EN_CKOUT_ARM 11 206 207 /* ARM_IDLECT3 bit shifts */ 208 #define EN_OCPI_CK 0 209 #define EN_TC1_CK 2 210 #define EN_TC2_CK 4 211 212 /* DSP_IDLECT2 bit shifts (0,1,2 are same as for ARM_IDLECT2) */ 213 #define EN_DSPTIMCK 5 214 215 /* Various register defines for clock controls scattered around OMAP chip */ 216 #define SDW_MCLK_INV_BIT 2 /* In ULPD_CLKC_CTRL */ 217 #define USB_MCLK_EN_BIT 4 /* In ULPD_CLKC_CTRL */ 218 #define USB_HOST_HHC_UHOST_EN 9 /* In MOD_CONF_CTRL_0 */ 219 #define SWD_ULPD_PLL_CLK_REQ 1 /* In SWD_CLK_DIV_CTRL_SEL */ 220 #define COM_ULPD_PLL_CLK_REQ 1 /* In COM_CLK_DIV_CTRL_SEL */ 221 #define SWD_CLK_DIV_CTRL_SEL 0xfffe0874 222 #define COM_CLK_DIV_CTRL_SEL 0xfffe0878 223 #define SOFT_REQ_REG 0xfffe0834 224 #define SOFT_REQ_REG2 0xfffe0880 225 226 extern __u32 arm_idlect1_mask; 227 extern struct clk *api_ck_p, *ck_dpll1_p, *ck_ref_p; 228 229 extern const struct clkops clkops_dspck; 230 extern const struct clkops clkops_uart_16xx; 231 extern const struct clkops clkops_generic; 232 233 /* used for passing SoC type to omap1_{select,round_to}_table_rate() */ 234 extern u32 cpu_mask; 235 236 #endif 237