1 /* 2 * Copyright STMicroelectronics, 2007. 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 */ 18 19 #include <linux/types.h> 20 #include <linux/init.h> 21 #include <linux/device.h> 22 #include <linux/amba/bus.h> 23 #include <linux/platform_device.h> 24 #include <linux/io.h> 25 #include <linux/slab.h> 26 #include <linux/irq.h> 27 #include <linux/dma-mapping.h> 28 #include <linux/irqchip.h> 29 #include <linux/platform_data/clk-nomadik.h> 30 #include <linux/clocksource.h> 31 #include <linux/of_irq.h> 32 #include <linux/of_gpio.h> 33 #include <linux/of_address.h> 34 #include <linux/of_platform.h> 35 #include <linux/mtd/fsmc.h> 36 #include <linux/gpio.h> 37 #include <linux/amba/mmci.h> 38 39 #include <asm/mach/arch.h> 40 #include <asm/mach/map.h> 41 #include <asm/mach/time.h> 42 #include <asm/mach-types.h> 43 44 #include <asm/cacheflush.h> 45 #include <asm/hardware/cache-l2x0.h> 46 47 /* 48 * These are the only hard-coded address offsets we still have to use. 49 */ 50 #define NOMADIK_FSMC_BASE 0x10100000 /* FSMC registers */ 51 #define NOMADIK_SDRAMC_BASE 0x10110000 /* SDRAM Controller */ 52 #define NOMADIK_CLCDC_BASE 0x10120000 /* CLCD Controller */ 53 #define NOMADIK_MDIF_BASE 0x10120000 /* MDIF */ 54 #define NOMADIK_DMA0_BASE 0x10130000 /* DMA0 Controller */ 55 #define NOMADIK_IC_BASE 0x10140000 /* Vectored Irq Controller */ 56 #define NOMADIK_DMA1_BASE 0x10150000 /* DMA1 Controller */ 57 #define NOMADIK_USB_BASE 0x10170000 /* USB-OTG conf reg base */ 58 #define NOMADIK_CRYP_BASE 0x10180000 /* Crypto processor */ 59 #define NOMADIK_SHA1_BASE 0x10190000 /* SHA-1 Processor */ 60 #define NOMADIK_XTI_BASE 0x101A0000 /* XTI */ 61 #define NOMADIK_RNG_BASE 0x101B0000 /* Random number generator */ 62 #define NOMADIK_SRC_BASE 0x101E0000 /* SRC base */ 63 #define NOMADIK_WDOG_BASE 0x101E1000 /* Watchdog */ 64 #define NOMADIK_MTU0_BASE 0x101E2000 /* Multiple Timer 0 */ 65 #define NOMADIK_MTU1_BASE 0x101E3000 /* Multiple Timer 1 */ 66 #define NOMADIK_GPIO0_BASE 0x101E4000 /* GPIO0 */ 67 #define NOMADIK_GPIO1_BASE 0x101E5000 /* GPIO1 */ 68 #define NOMADIK_GPIO2_BASE 0x101E6000 /* GPIO2 */ 69 #define NOMADIK_GPIO3_BASE 0x101E7000 /* GPIO3 */ 70 #define NOMADIK_RTC_BASE 0x101E8000 /* Real Time Clock base */ 71 #define NOMADIK_PMU_BASE 0x101E9000 /* Power Management Unit */ 72 #define NOMADIK_OWM_BASE 0x101EA000 /* One wire master */ 73 #define NOMADIK_SCR_BASE 0x101EF000 /* Secure Control registers */ 74 #define NOMADIK_MSP2_BASE 0x101F0000 /* MSP 2 interface */ 75 #define NOMADIK_MSP1_BASE 0x101F1000 /* MSP 1 interface */ 76 #define NOMADIK_UART2_BASE 0x101F2000 /* UART 2 interface */ 77 #define NOMADIK_SSIRx_BASE 0x101F3000 /* SSI 8-ch rx interface */ 78 #define NOMADIK_SSITx_BASE 0x101F4000 /* SSI 8-ch tx interface */ 79 #define NOMADIK_MSHC_BASE 0x101F5000 /* Memory Stick(Pro) Host */ 80 #define NOMADIK_SDI_BASE 0x101F6000 /* SD-card/MM-Card */ 81 #define NOMADIK_I2C1_BASE 0x101F7000 /* I2C1 interface */ 82 #define NOMADIK_I2C0_BASE 0x101F8000 /* I2C0 interface */ 83 #define NOMADIK_MSP0_BASE 0x101F9000 /* MSP 0 interface */ 84 #define NOMADIK_FIRDA_BASE 0x101FA000 /* FIrDA interface */ 85 #define NOMADIK_UART1_BASE 0x101FB000 /* UART 1 interface */ 86 #define NOMADIK_SSP_BASE 0x101FC000 /* SSP interface */ 87 #define NOMADIK_UART0_BASE 0x101FD000 /* UART 0 interface */ 88 #define NOMADIK_SGA_BASE 0x101FE000 /* SGA interface */ 89 #define NOMADIK_L2CC_BASE 0x10210000 /* L2 Cache controller */ 90 #define NOMADIK_UART1_VBASE 0xF01FB000 91 92 /* This is needed for LL-debug/earlyprintk/debug-macro.S */ 93 static struct map_desc cpu8815_io_desc[] __initdata = { 94 { 95 .virtual = NOMADIK_UART1_VBASE, 96 .pfn = __phys_to_pfn(NOMADIK_UART1_BASE), 97 .length = SZ_4K, 98 .type = MT_DEVICE, 99 }, 100 }; 101 102 static void __init cpu8815_map_io(void) 103 { 104 iotable_init(cpu8815_io_desc, ARRAY_SIZE(cpu8815_io_desc)); 105 } 106 107 static void cpu8815_restart(char mode, const char *cmd) 108 { 109 void __iomem *srcbase = ioremap(NOMADIK_SRC_BASE, SZ_4K); 110 111 /* FIXME: use egpio when implemented */ 112 113 /* Write anything to Reset status register */ 114 writel(1, srcbase + 0x18); 115 } 116 117 /* Initial value for SRC control register: all timers use MXTAL/8 source */ 118 #define SRC_CR_INIT_MASK 0x00007fff 119 #define SRC_CR_INIT_VAL 0x2aaa8000 120 121 static void __init cpu8815_timer_init_of(void) 122 { 123 struct device_node *mtu; 124 void __iomem *base; 125 int irq; 126 u32 src_cr; 127 128 /* We need this to be up now */ 129 nomadik_clk_init(); 130 131 mtu = of_find_node_by_path("/mtu@101e2000"); 132 if (!mtu) 133 return; 134 base = of_iomap(mtu, 0); 135 if (WARN_ON(!base)) 136 return; 137 irq = irq_of_parse_and_map(mtu, 0); 138 139 pr_info("Remapped MTU @ %p, irq: %d\n", base, irq); 140 141 /* Configure timer sources in "system reset controller" ctrl reg */ 142 src_cr = readl(base); 143 src_cr &= SRC_CR_INIT_MASK; 144 src_cr |= SRC_CR_INIT_VAL; 145 writel(src_cr, base); 146 147 clocksource_of_init(); 148 } 149 150 static struct fsmc_nand_timings cpu8815_nand_timings = { 151 .thiz = 0, 152 .thold = 0x10, 153 .twait = 0x0A, 154 .tset = 0, 155 }; 156 157 static struct fsmc_nand_platform_data cpu8815_nand_data = { 158 .nand_timings = &cpu8815_nand_timings, 159 }; 160 161 /* 162 * The SMSC911x IRQ is connected to a GPIO pin, but the driver expects 163 * to simply request an IRQ passed as a resource. So the GPIO pin needs 164 * to be requested by this hog and set as input. 165 */ 166 static int __init cpu8815_eth_init(void) 167 { 168 struct device_node *eth; 169 int gpio, irq, err; 170 171 eth = of_find_node_by_path("/usb-s8815/ethernet-gpio"); 172 if (!eth) { 173 pr_info("could not find any ethernet GPIO\n"); 174 return 0; 175 } 176 gpio = of_get_gpio(eth, 0); 177 err = gpio_request(gpio, "eth_irq"); 178 if (err) { 179 pr_info("failed to request ethernet GPIO\n"); 180 return -ENODEV; 181 } 182 err = gpio_direction_input(gpio); 183 if (err) { 184 pr_info("failed to set ethernet GPIO as input\n"); 185 return -ENODEV; 186 } 187 irq = gpio_to_irq(gpio); 188 pr_info("enabled USB-S8815 ethernet GPIO %d, IRQ %d\n", gpio, irq); 189 return 0; 190 } 191 device_initcall(cpu8815_eth_init); 192 193 /* 194 * TODO: 195 * cannot be set from device tree, convert to a proper DT 196 * binding. 197 */ 198 static struct mmci_platform_data mmcsd_plat_data = { 199 .ocr_mask = MMC_VDD_29_30, 200 }; 201 202 /* 203 * This GPIO pin turns on a line that is used to detect card insertion 204 * on this board. 205 */ 206 static int __init cpu8815_mmcsd_init(void) 207 { 208 struct device_node *cdbias; 209 int gpio, err; 210 211 cdbias = of_find_node_by_path("/usb-s8815/mmcsd-gpio"); 212 if (!cdbias) { 213 pr_info("could not find MMC/SD card detect bias node\n"); 214 return 0; 215 } 216 gpio = of_get_gpio(cdbias, 0); 217 if (gpio < 0) { 218 pr_info("could not obtain MMC/SD card detect bias GPIO\n"); 219 return 0; 220 } 221 err = gpio_request(gpio, "card detect bias"); 222 if (err) { 223 pr_info("failed to request card detect bias GPIO %d\n", gpio); 224 return -ENODEV; 225 } 226 err = gpio_direction_output(gpio, 0); 227 if (err){ 228 pr_info("failed to set GPIO %d as output, low\n", gpio); 229 return err; 230 } 231 pr_info("enabled USB-S8815 CD bias GPIO %d, low\n", gpio); 232 return 0; 233 } 234 device_initcall(cpu8815_mmcsd_init); 235 236 237 /* These are mostly to get the right device names for the clock lookups */ 238 static struct of_dev_auxdata cpu8815_auxdata_lookup[] __initdata = { 239 OF_DEV_AUXDATA("stericsson,fsmc-nand", NOMADIK_FSMC_BASE, 240 NULL, &cpu8815_nand_data), 241 OF_DEV_AUXDATA("arm,primecell", NOMADIK_SDI_BASE, 242 NULL, &mmcsd_plat_data), 243 { /* sentinel */ }, 244 }; 245 246 static void __init cpu8815_init_of(void) 247 { 248 #ifdef CONFIG_CACHE_L2X0 249 /* At full speed latency must be >=2, so 0x249 in low bits */ 250 l2x0_of_init(0x00730249, 0xfe000fff); 251 #endif 252 of_platform_populate(NULL, of_default_bus_match_table, 253 cpu8815_auxdata_lookup, NULL); 254 } 255 256 static const char * cpu8815_board_compat[] = { 257 "calaosystems,usb-s8815", 258 NULL, 259 }; 260 261 DT_MACHINE_START(NOMADIK_DT, "Nomadik STn8815") 262 .map_io = cpu8815_map_io, 263 .init_irq = irqchip_init, 264 .init_time = cpu8815_timer_init_of, 265 .init_machine = cpu8815_init_of, 266 .restart = cpu8815_restart, 267 .dt_compat = cpu8815_board_compat, 268 MACHINE_END 269