xref: /openbmc/linux/arch/arm/mach-nomadik/cpu-8815.c (revision dea3eacd)
128ad94ecSAlessandro Rubini /*
228ad94ecSAlessandro Rubini  * Copyright STMicroelectronics, 2007.
328ad94ecSAlessandro Rubini  *
428ad94ecSAlessandro Rubini  *  This program is free software; you can redistribute it and/or modify
528ad94ecSAlessandro Rubini  *  it under the terms of the GNU General Public License as published by
628ad94ecSAlessandro Rubini  *  the Free Software Foundation; either version 2 of the License, or
728ad94ecSAlessandro Rubini  *  (at your option) any later version.
828ad94ecSAlessandro Rubini  *
928ad94ecSAlessandro Rubini  *  This program is distributed in the hope that it will be useful,
1028ad94ecSAlessandro Rubini  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
1128ad94ecSAlessandro Rubini  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
1228ad94ecSAlessandro Rubini  *  GNU General Public License for more details.
1328ad94ecSAlessandro Rubini  *
1428ad94ecSAlessandro Rubini  *  You should have received a copy of the GNU General Public License
1528ad94ecSAlessandro Rubini  *  along with this program; if not, write to the Free Software
1628ad94ecSAlessandro Rubini  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
1728ad94ecSAlessandro Rubini  */
1828ad94ecSAlessandro Rubini 
1928ad94ecSAlessandro Rubini #include <linux/types.h>
2028ad94ecSAlessandro Rubini #include <linux/init.h>
2128ad94ecSAlessandro Rubini #include <linux/device.h>
222ec1d359SAlessandro Rubini #include <linux/amba/bus.h>
233e3c62caSRabin Vincent #include <linux/platform_device.h>
2435b47a40SRussell King #include <linux/io.h>
257c77852dSLinus Walleij #include <linux/slab.h>
267c77852dSLinus Walleij #include <linux/irq.h>
277c77852dSLinus Walleij #include <linux/dma-mapping.h>
28f8635abdSLinus Walleij #include <linux/irqchip.h>
294a31bd28SLinus Walleij #include <linux/platform_data/clk-nomadik.h>
30bb16bd9bSLinus Walleij #include <linux/platform_data/pinctrl-nomadik.h>
311b542757SLinus Walleij #include <linux/pinctrl/machine.h>
32f8635abdSLinus Walleij #include <linux/platform_data/clocksource-nomadik-mtu.h>
33f8635abdSLinus Walleij #include <linux/of_irq.h>
342ad6e398SLinus Walleij #include <linux/of_gpio.h>
35f8635abdSLinus Walleij #include <linux/of_address.h>
36f8635abdSLinus Walleij #include <linux/of_platform.h>
37ba785205SLinus Walleij #include <linux/mtd/fsmc.h>
382ad6e398SLinus Walleij #include <linux/gpio.h>
394fd243c6SLinus Walleij #include <linux/amba/mmci.h>
4028ad94ecSAlessandro Rubini 
4128ad94ecSAlessandro Rubini #include <mach/irqs.h>
42f8635abdSLinus Walleij #include <asm/mach/arch.h>
4328ad94ecSAlessandro Rubini #include <asm/mach/map.h>
44f8635abdSLinus Walleij #include <asm/mach/time.h>
4527bda036SLinus Walleij #include <asm/mach-types.h>
4628ad94ecSAlessandro Rubini 
470b260fd4SAlessandro Rubini #include <asm/cacheflush.h>
480b260fd4SAlessandro Rubini #include <asm/hardware/cache-l2x0.h>
490b260fd4SAlessandro Rubini 
50dea3eacdSLinus Walleij /*
51dea3eacdSLinus Walleij  * These are the only hard-coded address offsets we still have to use.
52dea3eacdSLinus Walleij  */
53dea3eacdSLinus Walleij #define NOMADIK_FSMC_BASE	0x10100000	/* FSMC registers */
54dea3eacdSLinus Walleij #define NOMADIK_SDRAMC_BASE	0x10110000	/* SDRAM Controller */
55dea3eacdSLinus Walleij #define NOMADIK_CLCDC_BASE	0x10120000	/* CLCD Controller */
56dea3eacdSLinus Walleij #define NOMADIK_MDIF_BASE	0x10120000	/* MDIF */
57dea3eacdSLinus Walleij #define NOMADIK_DMA0_BASE	0x10130000	/* DMA0 Controller */
58dea3eacdSLinus Walleij #define NOMADIK_IC_BASE		0x10140000	/* Vectored Irq Controller */
59dea3eacdSLinus Walleij #define NOMADIK_DMA1_BASE	0x10150000	/* DMA1 Controller */
60dea3eacdSLinus Walleij #define NOMADIK_USB_BASE	0x10170000	/* USB-OTG conf reg base */
61dea3eacdSLinus Walleij #define NOMADIK_CRYP_BASE	0x10180000	/* Crypto processor */
62dea3eacdSLinus Walleij #define NOMADIK_SHA1_BASE	0x10190000	/* SHA-1 Processor */
63dea3eacdSLinus Walleij #define NOMADIK_XTI_BASE	0x101A0000	/* XTI */
64dea3eacdSLinus Walleij #define NOMADIK_RNG_BASE	0x101B0000	/* Random number generator */
65dea3eacdSLinus Walleij #define NOMADIK_SRC_BASE	0x101E0000	/* SRC base */
66dea3eacdSLinus Walleij #define NOMADIK_WDOG_BASE	0x101E1000	/* Watchdog */
67dea3eacdSLinus Walleij #define NOMADIK_MTU0_BASE	0x101E2000	/* Multiple Timer 0 */
68dea3eacdSLinus Walleij #define NOMADIK_MTU1_BASE	0x101E3000	/* Multiple Timer 1 */
69dea3eacdSLinus Walleij #define NOMADIK_GPIO0_BASE	0x101E4000	/* GPIO0 */
70dea3eacdSLinus Walleij #define NOMADIK_GPIO1_BASE	0x101E5000	/* GPIO1 */
71dea3eacdSLinus Walleij #define NOMADIK_GPIO2_BASE	0x101E6000	/* GPIO2 */
72dea3eacdSLinus Walleij #define NOMADIK_GPIO3_BASE	0x101E7000	/* GPIO3 */
73dea3eacdSLinus Walleij #define NOMADIK_RTC_BASE	0x101E8000	/* Real Time Clock base */
74dea3eacdSLinus Walleij #define NOMADIK_PMU_BASE	0x101E9000	/* Power Management Unit */
75dea3eacdSLinus Walleij #define NOMADIK_OWM_BASE	0x101EA000	/* One wire master */
76dea3eacdSLinus Walleij #define NOMADIK_SCR_BASE	0x101EF000	/* Secure Control registers */
77dea3eacdSLinus Walleij #define NOMADIK_MSP2_BASE	0x101F0000	/* MSP 2 interface */
78dea3eacdSLinus Walleij #define NOMADIK_MSP1_BASE	0x101F1000	/* MSP 1 interface */
79dea3eacdSLinus Walleij #define NOMADIK_UART2_BASE	0x101F2000	/* UART 2 interface */
80dea3eacdSLinus Walleij #define NOMADIK_SSIRx_BASE	0x101F3000	/* SSI 8-ch rx interface */
81dea3eacdSLinus Walleij #define NOMADIK_SSITx_BASE	0x101F4000	/* SSI 8-ch tx interface */
82dea3eacdSLinus Walleij #define NOMADIK_MSHC_BASE	0x101F5000	/* Memory Stick(Pro) Host */
83dea3eacdSLinus Walleij #define NOMADIK_SDI_BASE	0x101F6000	/* SD-card/MM-Card */
84dea3eacdSLinus Walleij #define NOMADIK_I2C1_BASE	0x101F7000	/* I2C1 interface */
85dea3eacdSLinus Walleij #define NOMADIK_I2C0_BASE	0x101F8000	/* I2C0 interface */
86dea3eacdSLinus Walleij #define NOMADIK_MSP0_BASE	0x101F9000	/* MSP 0 interface */
87dea3eacdSLinus Walleij #define NOMADIK_FIRDA_BASE	0x101FA000	/* FIrDA interface */
88dea3eacdSLinus Walleij #define NOMADIK_UART1_BASE	0x101FB000	/* UART 1 interface */
89dea3eacdSLinus Walleij #define NOMADIK_SSP_BASE	0x101FC000	/* SSP interface */
90dea3eacdSLinus Walleij #define NOMADIK_UART0_BASE	0x101FD000	/* UART 0 interface */
91dea3eacdSLinus Walleij #define NOMADIK_SGA_BASE	0x101FE000	/* SGA interface */
92dea3eacdSLinus Walleij #define NOMADIK_L2CC_BASE	0x10210000	/* L2 Cache controller */
93dea3eacdSLinus Walleij #define NOMADIK_UART1_VBASE	0xF01FB000
94dea3eacdSLinus Walleij 
951b542757SLinus Walleij static unsigned long out_low[] = { PIN_OUTPUT_LOW };
961b542757SLinus Walleij static unsigned long out_high[] = { PIN_OUTPUT_HIGH };
971b542757SLinus Walleij static unsigned long in_nopull[] = { PIN_INPUT_NOPULL };
981b542757SLinus Walleij static unsigned long in_pullup[] = { PIN_INPUT_PULLUP };
991b542757SLinus Walleij 
1001b542757SLinus Walleij static struct pinctrl_map __initdata nhk8815_pinmap[] = {
1011b542757SLinus Walleij 	PIN_MAP_MUX_GROUP_DEFAULT("uart0", "pinctrl-stn8815", "u0_a_1", "u0"),
1021b542757SLinus Walleij 	PIN_MAP_MUX_GROUP_DEFAULT("uart1", "pinctrl-stn8815", "u1_a_1", "u1"),
1031b542757SLinus Walleij 	/* Hog in MMC/SD card mux */
1041b542757SLinus Walleij 	PIN_MAP_MUX_GROUP_HOG_DEFAULT("pinctrl-stn8815", "mmcsd_a_1", "mmcsd"),
1051b542757SLinus Walleij 	/* MCCLK */
1061b542757SLinus Walleij 	PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO8_B10", out_low),
1071b542757SLinus Walleij 	/* MCCMD */
1081b542757SLinus Walleij 	PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO9_A10", in_pullup),
1091b542757SLinus Walleij 	/* MCCMDDIR */
1101b542757SLinus Walleij 	PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO10_C11", out_high),
1111b542757SLinus Walleij 	/* MCDAT3-0 */
1121b542757SLinus Walleij 	PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO11_B11", in_pullup),
1131b542757SLinus Walleij 	PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO12_A11", in_pullup),
1141b542757SLinus Walleij 	PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO13_C12", in_pullup),
1151b542757SLinus Walleij 	PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO14_B12", in_pullup),
1161b542757SLinus Walleij 	/* MCDAT0DIR */
1171b542757SLinus Walleij 	PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO15_A12", out_high),
1181b542757SLinus Walleij 	/* MCDAT31DIR */
1191b542757SLinus Walleij 	PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO16_C13", out_high),
1201b542757SLinus Walleij 	/* MCMSFBCLK */
1211b542757SLinus Walleij 	PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO24_C15", in_pullup),
1221b542757SLinus Walleij 	/* CD input GPIO */
1231b542757SLinus Walleij 	PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO111_H21", in_nopull),
1241b542757SLinus Walleij 	/* CD bias drive */
1251b542757SLinus Walleij 	PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO112_J21", out_low),
1261b542757SLinus Walleij 	/* I2C0 */
1271b542757SLinus Walleij 	PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO62_D3", in_pullup),
1281b542757SLinus Walleij 	PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO63_D2", in_pullup),
1291b542757SLinus Walleij 	/* I2C1 */
1301b542757SLinus Walleij 	PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO53_L4", in_pullup),
1311b542757SLinus Walleij 	PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO54_L3", in_pullup),
1321b542757SLinus Walleij 	/* I2C2 */
1331b542757SLinus Walleij 	PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO73_C21", in_pullup),
1341b542757SLinus Walleij 	PIN_MAP_CONFIGS_PIN_HOG_DEFAULT("pinctrl-stn8815", "GPIO74_C20", in_pullup),
1351b542757SLinus Walleij };
1361b542757SLinus Walleij 
137dea3eacdSLinus Walleij /* This is needed for LL-debug/earlyprintk/debug-macro.S */
138dea3eacdSLinus Walleij static struct map_desc cpu8815_io_desc[] __initdata = {
13928ad94ecSAlessandro Rubini 	{
140dea3eacdSLinus Walleij 		.virtual =	NOMADIK_UART1_VBASE,
141dea3eacdSLinus Walleij 		.pfn =		__phys_to_pfn(NOMADIK_UART1_BASE),
142dea3eacdSLinus Walleij 		.length =	SZ_4K,
14328ad94ecSAlessandro Rubini 		.type =		MT_DEVICE,
144dea3eacdSLinus Walleij 	},
14528ad94ecSAlessandro Rubini };
14628ad94ecSAlessandro Rubini 
1475f66d482SLinus Walleij static void __init cpu8815_map_io(void)
14828ad94ecSAlessandro Rubini {
149dea3eacdSLinus Walleij 	iotable_init(cpu8815_io_desc, ARRAY_SIZE(cpu8815_io_desc));
15028ad94ecSAlessandro Rubini }
15128ad94ecSAlessandro Rubini 
1525f66d482SLinus Walleij static void cpu8815_restart(char mode, const char *cmd)
15335b47a40SRussell King {
154dea3eacdSLinus Walleij 	void __iomem *srcbase = ioremap(NOMADIK_SRC_BASE, SZ_4K);
15535b47a40SRussell King 
15635b47a40SRussell King 	/* FIXME: use egpio when implemented */
15735b47a40SRussell King 
15835b47a40SRussell King 	/* Write anything to Reset status register */
159dea3eacdSLinus Walleij 	writel(1, srcbase + 0x18);
16035b47a40SRussell King }
161f8635abdSLinus Walleij 
162f8635abdSLinus Walleij /* Initial value for SRC control register: all timers use MXTAL/8 source */
163f8635abdSLinus Walleij #define SRC_CR_INIT_MASK	0x00007fff
164f8635abdSLinus Walleij #define SRC_CR_INIT_VAL		0x2aaa8000
165f8635abdSLinus Walleij 
166f8635abdSLinus Walleij static void __init cpu8815_timer_init_of(void)
167f8635abdSLinus Walleij {
168f8635abdSLinus Walleij 	struct device_node *mtu;
169f8635abdSLinus Walleij 	void __iomem *base;
170f8635abdSLinus Walleij 	int irq;
171f8635abdSLinus Walleij 	u32 src_cr;
172f8635abdSLinus Walleij 
173f8635abdSLinus Walleij 	/* We need this to be up now */
174f8635abdSLinus Walleij 	nomadik_clk_init();
175f8635abdSLinus Walleij 
176f8635abdSLinus Walleij 	mtu = of_find_node_by_path("/mtu0");
177f8635abdSLinus Walleij 	if (!mtu)
178f8635abdSLinus Walleij 		return;
179f8635abdSLinus Walleij 	base = of_iomap(mtu, 0);
180f8635abdSLinus Walleij 	if (WARN_ON(!base))
181f8635abdSLinus Walleij 		return;
182f8635abdSLinus Walleij 	irq = irq_of_parse_and_map(mtu, 0);
183f8635abdSLinus Walleij 
184f8635abdSLinus Walleij 	pr_info("Remapped MTU @ %p, irq: %d\n", base, irq);
185f8635abdSLinus Walleij 
186f8635abdSLinus Walleij 	/* Configure timer sources in "system reset controller" ctrl reg */
187f8635abdSLinus Walleij 	src_cr = readl(base);
188f8635abdSLinus Walleij 	src_cr &= SRC_CR_INIT_MASK;
189f8635abdSLinus Walleij 	src_cr |= SRC_CR_INIT_VAL;
190f8635abdSLinus Walleij 	writel(src_cr, base);
191f8635abdSLinus Walleij 
192f8635abdSLinus Walleij 	nmdk_timer_init(base, irq);
193f8635abdSLinus Walleij }
194f8635abdSLinus Walleij 
195ba785205SLinus Walleij static struct fsmc_nand_timings cpu8815_nand_timings = {
196ba785205SLinus Walleij 	.thiz	= 0,
197ba785205SLinus Walleij 	.thold	= 0x10,
198ba785205SLinus Walleij 	.twait	= 0x0A,
199ba785205SLinus Walleij 	.tset	= 0,
200ba785205SLinus Walleij };
201ba785205SLinus Walleij 
202ba785205SLinus Walleij static struct fsmc_nand_platform_data cpu8815_nand_data = {
203ba785205SLinus Walleij 	.nand_timings = &cpu8815_nand_timings,
204ba785205SLinus Walleij };
205ba785205SLinus Walleij 
2062ad6e398SLinus Walleij /*
2072ad6e398SLinus Walleij  * The SMSC911x IRQ is connected to a GPIO pin, but the driver expects
2082ad6e398SLinus Walleij  * to simply request an IRQ passed as a resource. So the GPIO pin needs
2092ad6e398SLinus Walleij  * to be requested by this hog and set as input.
2102ad6e398SLinus Walleij  */
2112ad6e398SLinus Walleij static int __init cpu8815_eth_init(void)
2122ad6e398SLinus Walleij {
2132ad6e398SLinus Walleij 	struct device_node *eth;
2142ad6e398SLinus Walleij 	int gpio, irq, err;
2152ad6e398SLinus Walleij 
2162ad6e398SLinus Walleij 	eth = of_find_node_by_path("/usb-s8815/ethernet-gpio");
2172ad6e398SLinus Walleij 	if (!eth) {
2182ad6e398SLinus Walleij 		pr_info("could not find any ethernet GPIO\n");
2192ad6e398SLinus Walleij 		return 0;
2202ad6e398SLinus Walleij 	}
2212ad6e398SLinus Walleij 	gpio = of_get_gpio(eth, 0);
2222ad6e398SLinus Walleij 	err = gpio_request(gpio, "eth_irq");
2232ad6e398SLinus Walleij 	if (err) {
2242ad6e398SLinus Walleij 		pr_info("failed to request ethernet GPIO\n");
2252ad6e398SLinus Walleij 		return -ENODEV;
2262ad6e398SLinus Walleij 	}
2272ad6e398SLinus Walleij 	err = gpio_direction_input(gpio);
2282ad6e398SLinus Walleij 	if (err) {
2292ad6e398SLinus Walleij 		pr_info("failed to set ethernet GPIO as input\n");
2302ad6e398SLinus Walleij 		return -ENODEV;
2312ad6e398SLinus Walleij 	}
2322ad6e398SLinus Walleij 	irq = gpio_to_irq(gpio);
2332ad6e398SLinus Walleij 	pr_info("enabled USB-S8815 ethernet GPIO %d, IRQ %d\n", gpio, irq);
2342ad6e398SLinus Walleij 	return 0;
2352ad6e398SLinus Walleij }
2362ad6e398SLinus Walleij device_initcall(cpu8815_eth_init);
2372ad6e398SLinus Walleij 
2384fd243c6SLinus Walleij /*
2394fd243c6SLinus Walleij  * TODO:
2404fd243c6SLinus Walleij  * cannot be set from device tree, convert to a proper DT
2414fd243c6SLinus Walleij  * binding.
2424fd243c6SLinus Walleij  */
2434fd243c6SLinus Walleij static struct mmci_platform_data mmcsd_plat_data = {
2444fd243c6SLinus Walleij 	.ocr_mask = MMC_VDD_29_30,
2454fd243c6SLinus Walleij };
2464fd243c6SLinus Walleij 
2474fd243c6SLinus Walleij /*
2484fd243c6SLinus Walleij  * This GPIO pin turns on a line that is used to detect card insertion
2494fd243c6SLinus Walleij  * on this board.
2504fd243c6SLinus Walleij  */
2514fd243c6SLinus Walleij static int __init cpu8815_mmcsd_init(void)
2524fd243c6SLinus Walleij {
2534fd243c6SLinus Walleij 	struct device_node *cdbias;
2544fd243c6SLinus Walleij 	int gpio, err;
2554fd243c6SLinus Walleij 
2564fd243c6SLinus Walleij 	cdbias = of_find_node_by_path("/usb-s8815/mmcsd-gpio");
2574fd243c6SLinus Walleij 	if (!cdbias) {
2584fd243c6SLinus Walleij 		pr_info("could not find MMC/SD card detect bias node\n");
2594fd243c6SLinus Walleij 		return 0;
2604fd243c6SLinus Walleij 	}
2614fd243c6SLinus Walleij 	gpio = of_get_gpio(cdbias, 0);
2624fd243c6SLinus Walleij 	if (gpio < 0) {
2634fd243c6SLinus Walleij 		pr_info("could not obtain MMC/SD card detect bias GPIO\n");
2644fd243c6SLinus Walleij 		return 0;
2654fd243c6SLinus Walleij 	}
2664fd243c6SLinus Walleij 	err = gpio_request(gpio, "card detect bias");
2674fd243c6SLinus Walleij 	if (err) {
2684fd243c6SLinus Walleij 		pr_info("failed to request card detect bias GPIO %d\n", gpio);
2694fd243c6SLinus Walleij 		return -ENODEV;
2704fd243c6SLinus Walleij 	}
2714fd243c6SLinus Walleij 	err = gpio_direction_output(gpio, 0);
2724fd243c6SLinus Walleij 	if (err){
2734fd243c6SLinus Walleij 		pr_info("failed to set GPIO %d as output, low\n", gpio);
2744fd243c6SLinus Walleij 		return err;
2754fd243c6SLinus Walleij 	}
2764fd243c6SLinus Walleij 	pr_info("enabled USB-S8815 CD bias GPIO %d, low\n", gpio);
2774fd243c6SLinus Walleij 	return 0;
2784fd243c6SLinus Walleij }
2794fd243c6SLinus Walleij device_initcall(cpu8815_mmcsd_init);
2804fd243c6SLinus Walleij 
2814fd243c6SLinus Walleij 
282f8635abdSLinus Walleij /* These are mostly to get the right device names for the clock lookups */
283f8635abdSLinus Walleij static struct of_dev_auxdata cpu8815_auxdata_lookup[] __initdata = {
2846010d403SLinus Walleij 	OF_DEV_AUXDATA("st,nomadik-gpio", NOMADIK_GPIO0_BASE,
2856010d403SLinus Walleij 		"gpio.0", NULL),
2866010d403SLinus Walleij 	OF_DEV_AUXDATA("st,nomadik-gpio", NOMADIK_GPIO1_BASE,
2876010d403SLinus Walleij 		"gpio.1", NULL),
2886010d403SLinus Walleij 	OF_DEV_AUXDATA("st,nomadik-gpio", NOMADIK_GPIO2_BASE,
2896010d403SLinus Walleij 		"gpio.2", NULL),
2906010d403SLinus Walleij 	OF_DEV_AUXDATA("st,nomadik-gpio", NOMADIK_GPIO3_BASE,
2916010d403SLinus Walleij 		"gpio.3", NULL),
2926010d403SLinus Walleij 	OF_DEV_AUXDATA("stericsson,nmk-pinctrl-stn8815", 0,
2936010d403SLinus Walleij 		"pinctrl-stn8815", NULL),
294f8635abdSLinus Walleij 	OF_DEV_AUXDATA("arm,primecell", NOMADIK_UART0_BASE,
295f8635abdSLinus Walleij 		"uart0", NULL),
296f8635abdSLinus Walleij 	OF_DEV_AUXDATA("arm,primecell", NOMADIK_UART1_BASE,
297f8635abdSLinus Walleij 		"uart1", NULL),
29827bda036SLinus Walleij 	OF_DEV_AUXDATA("arm,primecell", NOMADIK_RNG_BASE,
29927bda036SLinus Walleij 		"rng", NULL),
30027bda036SLinus Walleij 	OF_DEV_AUXDATA("arm,primecell", NOMADIK_RTC_BASE,
30127bda036SLinus Walleij 		"rtc-pl031", NULL),
302ba785205SLinus Walleij 	OF_DEV_AUXDATA("stericsson,fsmc-nand", NOMADIK_FSMC_BASE,
303ba785205SLinus Walleij 		"fsmc-nand", &cpu8815_nand_data),
3044fd243c6SLinus Walleij 	OF_DEV_AUXDATA("arm,primecell", NOMADIK_SDI_BASE,
3054fd243c6SLinus Walleij 		"mmci", &mmcsd_plat_data),
306f8635abdSLinus Walleij 	{ /* sentinel */ },
307f8635abdSLinus Walleij };
308f8635abdSLinus Walleij 
309f8635abdSLinus Walleij static void __init cpu8815_init_of(void)
310f8635abdSLinus Walleij {
311f8635abdSLinus Walleij #ifdef CONFIG_CACHE_L2X0
312f8635abdSLinus Walleij 	/* At full speed latency must be >=2, so 0x249 in low bits */
313f8635abdSLinus Walleij 	l2x0_of_init(0x00730249, 0xfe000fff);
314f8635abdSLinus Walleij #endif
3156010d403SLinus Walleij 	pinctrl_register_mappings(nhk8815_pinmap, ARRAY_SIZE(nhk8815_pinmap));
316f8635abdSLinus Walleij 	of_platform_populate(NULL, of_default_bus_match_table,
317f8635abdSLinus Walleij 			cpu8815_auxdata_lookup, NULL);
318f8635abdSLinus Walleij }
319f8635abdSLinus Walleij 
320f8635abdSLinus Walleij static const char * cpu8815_board_compat[] = {
321f8635abdSLinus Walleij 	"calaosystems,usb-s8815",
322f8635abdSLinus Walleij 	NULL,
323f8635abdSLinus Walleij };
324f8635abdSLinus Walleij 
325f8635abdSLinus Walleij DT_MACHINE_START(NOMADIK_DT, "Nomadik STn8815")
326f8635abdSLinus Walleij 	.map_io		= cpu8815_map_io,
327f8635abdSLinus Walleij 	.init_irq	= irqchip_init,
328f8635abdSLinus Walleij 	.init_time	= cpu8815_timer_init_of,
329f8635abdSLinus Walleij 	.init_machine	= cpu8815_init_of,
330f8635abdSLinus Walleij 	.restart	= cpu8815_restart,
331f8635abdSLinus Walleij 	.dt_compat      = cpu8815_board_compat,
332f8635abdSLinus Walleij MACHINE_END
333