1 /*
2  * System controller support for Armada 370, 375 and XP platforms.
3  *
4  * Copyright (C) 2012 Marvell
5  *
6  * Lior Amsalem <alior@marvell.com>
7  * Gregory CLEMENT <gregory.clement@free-electrons.com>
8  * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
9  *
10  * This file is licensed under the terms of the GNU General Public
11  * License version 2.  This program is licensed "as is" without any
12  * warranty of any kind, whether express or implied.
13  *
14  * The Armada 370, 375 and Armada XP SoCs have a range of
15  * miscellaneous registers, that do not belong to a particular device,
16  * but rather provide system-level features. This basic
17  * system-controller driver provides a device tree binding for those
18  * registers, and implements utility functions offering various
19  * features related to those registers.
20  *
21  * For now, the feature set is limited to restarting the platform by a
22  * soft-reset, but it might be extended in the future.
23  */
24 
25 #include <linux/kernel.h>
26 #include <linux/init.h>
27 #include <linux/of_address.h>
28 #include <linux/io.h>
29 #include <linux/reboot.h>
30 #include "common.h"
31 
32 static void __iomem *system_controller_base;
33 
34 struct mvebu_system_controller {
35 	u32 rstoutn_mask_offset;
36 	u32 system_soft_reset_offset;
37 
38 	u32 rstoutn_mask_reset_out_en;
39 	u32 system_soft_reset;
40 };
41 static struct mvebu_system_controller *mvebu_sc;
42 
43 static const struct mvebu_system_controller armada_370_xp_system_controller = {
44 	.rstoutn_mask_offset = 0x60,
45 	.system_soft_reset_offset = 0x64,
46 	.rstoutn_mask_reset_out_en = 0x1,
47 	.system_soft_reset = 0x1,
48 };
49 
50 static const struct mvebu_system_controller armada_375_system_controller = {
51 	.rstoutn_mask_offset = 0x54,
52 	.system_soft_reset_offset = 0x58,
53 	.rstoutn_mask_reset_out_en = 0x1,
54 	.system_soft_reset = 0x1,
55 };
56 
57 static const struct mvebu_system_controller orion_system_controller = {
58 	.rstoutn_mask_offset = 0x108,
59 	.system_soft_reset_offset = 0x10c,
60 	.rstoutn_mask_reset_out_en = 0x4,
61 	.system_soft_reset = 0x1,
62 };
63 
64 static const struct of_device_id of_system_controller_table[] = {
65 	{
66 		.compatible = "marvell,orion-system-controller",
67 		.data = (void *) &orion_system_controller,
68 	}, {
69 		.compatible = "marvell,armada-370-xp-system-controller",
70 		.data = (void *) &armada_370_xp_system_controller,
71 	}, {
72 		.compatible = "marvell,armada-375-system-controller",
73 		.data = (void *) &armada_375_system_controller,
74 	},
75 	{ /* end of list */ },
76 };
77 
78 void mvebu_restart(enum reboot_mode mode, const char *cmd)
79 {
80 	if (!system_controller_base) {
81 		pr_err("Cannot restart, system-controller not available: check the device tree\n");
82 	} else {
83 		/*
84 		 * Enable soft reset to assert RSTOUTn.
85 		 */
86 		writel(mvebu_sc->rstoutn_mask_reset_out_en,
87 			system_controller_base +
88 			mvebu_sc->rstoutn_mask_offset);
89 		/*
90 		 * Assert soft reset.
91 		 */
92 		writel(mvebu_sc->system_soft_reset,
93 			system_controller_base +
94 			mvebu_sc->system_soft_reset_offset);
95 	}
96 
97 	while (1)
98 		;
99 }
100 
101 static int __init mvebu_system_controller_init(void)
102 {
103 	const struct of_device_id *match;
104 	struct device_node *np;
105 
106 	np = of_find_matching_node_and_match(NULL, of_system_controller_table,
107 					     &match);
108 	if (np) {
109 		system_controller_base = of_iomap(np, 0);
110 		mvebu_sc = (struct mvebu_system_controller *)match->data;
111 		of_node_put(np);
112 	}
113 
114 	return 0;
115 }
116 
117 arch_initcall(mvebu_system_controller_init);
118