16509dc74SThomas Petazzoni/* 26509dc74SThomas Petazzoni * Copyright (C) 2014 Marvell 36509dc74SThomas Petazzoni * 46509dc74SThomas Petazzoni * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 56509dc74SThomas Petazzoni * Gregory Clement <gregory.clement@free-electrons.com> 66509dc74SThomas Petazzoni * 76509dc74SThomas Petazzoni * This file is licensed under the terms of the GNU General Public 86509dc74SThomas Petazzoni * License version 2. This program is licensed "as is" without any 96509dc74SThomas Petazzoni * warranty of any kind, whether express or implied. 106509dc74SThomas Petazzoni */ 116509dc74SThomas Petazzoni 126509dc74SThomas Petazzoni#include <linux/linkage.h> 136509dc74SThomas Petazzoni#include <asm/assembler.h> 146509dc74SThomas Petazzoni 156509dc74SThomas Petazzoni/* 166509dc74SThomas Petazzoni * This is the entry point through which CPUs exiting cpuidle deep 176509dc74SThomas Petazzoni * idle state are going. 186509dc74SThomas Petazzoni */ 196509dc74SThomas PetazzoniENTRY(armada_370_xp_cpu_resume) 206509dc74SThomas PetazzoniARM_BE8(setend be ) @ go BE8 if entered LE 216509dc74SThomas Petazzoni bl ll_add_cpu_to_smp_group 226509dc74SThomas Petazzoni bl ll_enable_coherency 236509dc74SThomas Petazzoni b cpu_resume 246509dc74SThomas PetazzoniENDPROC(armada_370_xp_cpu_resume) 256509dc74SThomas Petazzoni 263076cc58SGregory CLEMENT.global mvebu_boot_wa_start 273076cc58SGregory CLEMENT.global mvebu_boot_wa_end 283076cc58SGregory CLEMENT 293076cc58SGregory CLEMENT/* The following code will be executed from SRAM */ 303076cc58SGregory CLEMENTENTRY(mvebu_boot_wa_start) 313076cc58SGregory CLEMENTmvebu_boot_wa_start: 323076cc58SGregory CLEMENTARM_BE8(setend be) 333076cc58SGregory CLEMENT adr r0, 1f 343076cc58SGregory CLEMENT ldr r0, [r0] @ load the address of the 353076cc58SGregory CLEMENT @ resume register 363076cc58SGregory CLEMENT ldr r0, [r0] @ load the value in the 373076cc58SGregory CLEMENT @ resume register 383076cc58SGregory CLEMENTARM_BE8(rev r0, r0) @ the value is stored LE 393076cc58SGregory CLEMENT mov pc, r0 @ jump to this value 403076cc58SGregory CLEMENT/* 413076cc58SGregory CLEMENT * the last word of this piece of code will be filled by the physical 423076cc58SGregory CLEMENT * address of the boot address register just after being copied in SRAM 433076cc58SGregory CLEMENT */ 443076cc58SGregory CLEMENT1: 453076cc58SGregory CLEMENT .long . 463076cc58SGregory CLEMENTmvebu_boot_wa_end: 473076cc58SGregory CLEMENTENDPROC(mvebu_boot_wa_end) 48