1 /* 2 * Symmetric Multi Processing (SMP) support for Armada XP 3 * 4 * Copyright (C) 2012 Marvell 5 * 6 * Lior Amsalem <alior@marvell.com> 7 * Yehuda Yitschak <yehuday@marvell.com> 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 9 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 10 * 11 * This file is licensed under the terms of the GNU General Public 12 * License version 2. This program is licensed "as is" without any 13 * warranty of any kind, whether express or implied. 14 * 15 * The Armada XP SoC has 4 ARMv7 PJ4B CPUs running in full HW coherency 16 * This file implements the routines for preparing the SMP infrastructure 17 * and waking up the secondary CPUs 18 */ 19 20 #include <linux/init.h> 21 #include <linux/smp.h> 22 #include <linux/clk.h> 23 #include <linux/of.h> 24 #include <linux/of_address.h> 25 #include <linux/mbus.h> 26 #include <asm/cacheflush.h> 27 #include <asm/smp_plat.h> 28 #include "common.h" 29 #include "armada-370-xp.h" 30 #include "pmsu.h" 31 #include "coherency.h" 32 33 #define ARMADA_XP_MAX_CPUS 4 34 35 #define AXP_BOOTROM_BASE 0xfff00000 36 #define AXP_BOOTROM_SIZE 0x100000 37 38 static struct clk *get_cpu_clk(int cpu) 39 { 40 struct clk *cpu_clk; 41 struct device_node *np = of_get_cpu_node(cpu, NULL); 42 43 if (WARN(!np, "missing cpu node\n")) 44 return NULL; 45 cpu_clk = of_clk_get(np, 0); 46 if (WARN_ON(IS_ERR(cpu_clk))) 47 return NULL; 48 return cpu_clk; 49 } 50 51 static void set_secondary_cpu_clock(unsigned int cpu) 52 { 53 int thiscpu; 54 unsigned long rate; 55 struct clk *cpu_clk; 56 57 thiscpu = get_cpu(); 58 59 cpu_clk = get_cpu_clk(thiscpu); 60 if (!cpu_clk) 61 goto out; 62 clk_prepare_enable(cpu_clk); 63 rate = clk_get_rate(cpu_clk); 64 65 cpu_clk = get_cpu_clk(cpu); 66 if (!cpu_clk) 67 goto out; 68 clk_set_rate(cpu_clk, rate); 69 clk_prepare_enable(cpu_clk); 70 71 out: 72 put_cpu(); 73 } 74 75 static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle) 76 { 77 int ret, hw_cpu; 78 79 pr_info("Booting CPU %d\n", cpu); 80 81 hw_cpu = cpu_logical_map(cpu); 82 set_secondary_cpu_clock(hw_cpu); 83 mvebu_pmsu_set_cpu_boot_addr(hw_cpu, armada_xp_secondary_startup); 84 85 /* 86 * This is needed to wake up CPUs in the offline state after 87 * using CPU hotplug. 88 */ 89 arch_send_wakeup_ipi_mask(cpumask_of(cpu)); 90 91 /* 92 * This is needed to take secondary CPUs out of reset on the 93 * initial boot. 94 */ 95 ret = mvebu_cpu_reset_deassert(hw_cpu); 96 if (ret) { 97 pr_warn("unable to boot CPU: %d\n", ret); 98 return ret; 99 } 100 101 return 0; 102 } 103 104 /* 105 * When a CPU is brought back online, either through CPU hotplug, or 106 * because of the boot of a kexec'ed kernel, the PMSU configuration 107 * for this CPU might be in the deep idle state, preventing this CPU 108 * from receiving interrupts. Here, we therefore take out the current 109 * CPU from this state, which was entered by armada_xp_cpu_die() 110 * below. 111 */ 112 static void armada_xp_secondary_init(unsigned int cpu) 113 { 114 mvebu_v7_pmsu_idle_exit(); 115 } 116 117 static void __init armada_xp_smp_init_cpus(void) 118 { 119 unsigned int ncores = num_possible_cpus(); 120 121 if (ncores == 0 || ncores > ARMADA_XP_MAX_CPUS) 122 panic("Invalid number of CPUs in DT\n"); 123 } 124 125 static void __init armada_xp_smp_prepare_cpus(unsigned int max_cpus) 126 { 127 struct device_node *node; 128 struct resource res; 129 int err; 130 131 flush_cache_all(); 132 set_cpu_coherent(); 133 134 /* 135 * In order to boot the secondary CPUs we need to ensure 136 * the bootROM is mapped at the correct address. 137 */ 138 node = of_find_compatible_node(NULL, NULL, "marvell,bootrom"); 139 if (!node) 140 panic("Cannot find 'marvell,bootrom' compatible node"); 141 142 err = of_address_to_resource(node, 0, &res); 143 of_node_put(node); 144 if (err < 0) 145 panic("Cannot get 'bootrom' node address"); 146 147 if (res.start != AXP_BOOTROM_BASE || 148 resource_size(&res) != AXP_BOOTROM_SIZE) 149 panic("The address for the BootROM is incorrect"); 150 } 151 152 #ifdef CONFIG_HOTPLUG_CPU 153 static void armada_xp_cpu_die(unsigned int cpu) 154 { 155 /* 156 * CPU hotplug is implemented by putting offline CPUs into the 157 * deep idle sleep state. 158 */ 159 armada_370_xp_pmsu_idle_enter(true); 160 } 161 162 /* 163 * We need a dummy function, so that platform_can_cpu_hotplug() knows 164 * we support CPU hotplug. However, the function does not need to do 165 * anything, because CPUs going offline can enter the deep idle state 166 * by themselves, without any help from a still alive CPU. 167 */ 168 static int armada_xp_cpu_kill(unsigned int cpu) 169 { 170 return 1; 171 } 172 #endif 173 174 const struct smp_operations armada_xp_smp_ops __initconst = { 175 .smp_init_cpus = armada_xp_smp_init_cpus, 176 .smp_prepare_cpus = armada_xp_smp_prepare_cpus, 177 .smp_boot_secondary = armada_xp_boot_secondary, 178 .smp_secondary_init = armada_xp_secondary_init, 179 #ifdef CONFIG_HOTPLUG_CPU 180 .cpu_die = armada_xp_cpu_die, 181 .cpu_kill = armada_xp_cpu_kill, 182 #endif 183 }; 184 185 CPU_METHOD_OF_DECLARE(armada_xp_smp, "marvell,armada-xp-smp", 186 &armada_xp_smp_ops); 187 188 #define MV98DX3236_CPU_RESUME_CTRL_REG 0x08 189 #define MV98DX3236_CPU_RESUME_ADDR_REG 0x04 190 191 static const struct of_device_id of_mv98dx3236_resume_table[] = { 192 { 193 .compatible = "marvell,98dx3336-resume-ctrl", 194 }, 195 { /* end of list */ }, 196 }; 197 198 static int mv98dx3236_resume_set_cpu_boot_addr(int hw_cpu, void *boot_addr) 199 { 200 struct device_node *np; 201 void __iomem *base; 202 WARN_ON(hw_cpu != 1); 203 204 np = of_find_matching_node(NULL, of_mv98dx3236_resume_table); 205 if (!np) 206 return -ENODEV; 207 208 base = of_io_request_and_map(np, 0, of_node_full_name(np)); 209 of_node_put(np); 210 if (IS_ERR(base)) 211 return PTR_ERR(base); 212 213 writel(0, base + MV98DX3236_CPU_RESUME_CTRL_REG); 214 writel(__pa_symbol(boot_addr), base + MV98DX3236_CPU_RESUME_ADDR_REG); 215 216 iounmap(base); 217 218 return 0; 219 } 220 221 static int mv98dx3236_boot_secondary(unsigned int cpu, struct task_struct *idle) 222 { 223 int ret, hw_cpu; 224 225 hw_cpu = cpu_logical_map(cpu); 226 set_secondary_cpu_clock(hw_cpu); 227 mv98dx3236_resume_set_cpu_boot_addr(hw_cpu, 228 armada_xp_secondary_startup); 229 230 /* 231 * This is needed to wake up CPUs in the offline state after 232 * using CPU hotplug. 233 */ 234 arch_send_wakeup_ipi_mask(cpumask_of(cpu)); 235 236 /* 237 * This is needed to take secondary CPUs out of reset on the 238 * initial boot. 239 */ 240 ret = mvebu_cpu_reset_deassert(hw_cpu); 241 if (ret) { 242 pr_warn("unable to boot CPU: %d\n", ret); 243 return ret; 244 } 245 246 return 0; 247 } 248 249 static const struct smp_operations mv98dx3236_smp_ops __initconst = { 250 .smp_init_cpus = armada_xp_smp_init_cpus, 251 .smp_prepare_cpus = armada_xp_smp_prepare_cpus, 252 .smp_boot_secondary = mv98dx3236_boot_secondary, 253 .smp_secondary_init = armada_xp_secondary_init, 254 #ifdef CONFIG_HOTPLUG_CPU 255 .cpu_die = armada_xp_cpu_die, 256 .cpu_kill = armada_xp_cpu_kill, 257 #endif 258 }; 259 260 CPU_METHOD_OF_DECLARE(mv98dx3236_smp, "marvell,98dx3236-smp", 261 &mv98dx3236_smp_ops); 262