xref: /openbmc/linux/arch/arm/mach-mvebu/headsmp.S (revision 0fdebc5e)
1*0fdebc5eSThomas Gleixner/* SPDX-License-Identifier: GPL-2.0-only */
245f5984aSGregory CLEMENT/*
345f5984aSGregory CLEMENT * SMP support: Entry point for secondary CPUs
445f5984aSGregory CLEMENT *
545f5984aSGregory CLEMENT * Copyright (C) 2012 Marvell
645f5984aSGregory CLEMENT *
745f5984aSGregory CLEMENT * Yehuda Yitschak <yehuday@marvell.com>
845f5984aSGregory CLEMENT * Gregory CLEMENT <gregory.clement@free-electrons.com>
945f5984aSGregory CLEMENT * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
1045f5984aSGregory CLEMENT *
1145f5984aSGregory CLEMENT * This file implements the assembly entry point for secondary CPUs in
1245f5984aSGregory CLEMENT * an SMP kernel. The only thing we need to do is to add the CPU to
1345f5984aSGregory CLEMENT * the coherency fabric by writing to 2 registers. Currently the base
1445f5984aSGregory CLEMENT * register addresses are hard coded due to the early initialisation
1545f5984aSGregory CLEMENT * problems.
1645f5984aSGregory CLEMENT */
1745f5984aSGregory CLEMENT
1845f5984aSGregory CLEMENT#include <linux/linkage.h>
1945f5984aSGregory CLEMENT#include <linux/init.h>
2045f5984aSGregory CLEMENT
21bca028e7SBen Dooks#include <asm/assembler.h>
22bca028e7SBen Dooks
2345f5984aSGregory CLEMENT/*
2445f5984aSGregory CLEMENT * Armada XP specific entry point for secondary CPUs.
2545f5984aSGregory CLEMENT * We add the CPU to the coherency fabric and then jump to secondary
2645f5984aSGregory CLEMENT * startup
2745f5984aSGregory CLEMENT */
2845f5984aSGregory CLEMENTENTRY(armada_xp_secondary_startup)
29bca028e7SBen Dooks ARM_BE8(setend	be )			@ go BE8 if entered LE
30bca028e7SBen Dooks
312e8a5942SGregory CLEMENT	bl	ll_add_cpu_to_smp_group
322e8a5942SGregory CLEMENT
332e8a5942SGregory CLEMENT	bl	ll_enable_coherency
342e8a5942SGregory CLEMENT
3545f5984aSGregory CLEMENT	b	secondary_startup
3645f5984aSGregory CLEMENT
3745f5984aSGregory CLEMENTENDPROC(armada_xp_secondary_startup)
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