1/*
2 * Coherency fabric: low level functions
3 *
4 * Copyright (C) 2012 Marvell
5 *
6 * Gregory CLEMENT <gregory.clement@free-electrons.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2.  This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 *
12 * This file implements the assembly function to add a CPU to the
13 * coherency fabric. This function is called by each of the secondary
14 * CPUs during their early boot in an SMP kernel, this why this
15 * function have to callable from assembly. It can also be called by a
16 * primary CPU from C code during its boot.
17 */
18
19#include <linux/linkage.h>
20#define ARMADA_XP_CFB_CTL_REG_OFFSET 0x0
21#define ARMADA_XP_CFB_CFG_REG_OFFSET 0x4
22
23#include <asm/assembler.h>
24
25	.text
26/*
27 * r0: Coherency fabric base register address
28 * r1: HW CPU id
29 */
30ENTRY(ll_set_cpu_coherent)
31	/* Create bit by cpu index */
32	mov	r3, #(1 << 24)
33	lsl	r1, r3, r1
34ARM_BE8(rev	r1, r1)
35
36	/* Add CPU to SMP group - Atomic */
37	add	r3, r0, #ARMADA_XP_CFB_CTL_REG_OFFSET
381:
39	ldrex	r2, [r3]
40	orr	r2, r2, r1
41	strex 	r0, r2, [r3]
42	cmp	r0, #0
43	bne 1b
44
45	/* Enable coherency on CPU - Atomic */
46	add	r3, r3, #ARMADA_XP_CFB_CFG_REG_OFFSET
471:
48	ldrex	r2, [r3]
49	orr	r2, r2, r1
50	strex	r0, r2, [r3]
51	cmp	r0, #0
52	bne 1b
53
54	dsb
55
56	mov	r0, #0
57	mov	pc, lr
58ENDPROC(ll_set_cpu_coherent)
59