1 /* 2 * Device Tree support for Armada 370 and XP platforms. 3 * 4 * Copyright (C) 2012 Marvell 5 * 6 * Lior Amsalem <alior@marvell.com> 7 * Gregory CLEMENT <gregory.clement@free-electrons.com> 8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 9 * 10 * This file is licensed under the terms of the GNU General Public 11 * License version 2. This program is licensed "as is" without any 12 * warranty of any kind, whether express or implied. 13 */ 14 15 #include <linux/kernel.h> 16 #include <linux/init.h> 17 #include <linux/clk-provider.h> 18 #include <linux/of_address.h> 19 #include <linux/of_fdt.h> 20 #include <linux/of_platform.h> 21 #include <linux/io.h> 22 #include <linux/clocksource.h> 23 #include <linux/dma-mapping.h> 24 #include <linux/memblock.h> 25 #include <linux/mbus.h> 26 #include <linux/signal.h> 27 #include <linux/slab.h> 28 #include <linux/irqchip.h> 29 #include <asm/hardware/cache-l2x0.h> 30 #include <asm/mach/arch.h> 31 #include <asm/mach/map.h> 32 #include <asm/mach/time.h> 33 #include <asm/smp_scu.h> 34 #include "armada-370-xp.h" 35 #include "common.h" 36 #include "coherency.h" 37 #include "mvebu-soc-id.h" 38 39 static void __iomem *scu_base; 40 41 /* 42 * Enables the SCU when available. Obviously, this is only useful on 43 * Cortex-A based SOCs, not on PJ4B based ones. 44 */ 45 static void __init mvebu_scu_enable(void) 46 { 47 struct device_node *np = 48 of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu"); 49 if (np) { 50 scu_base = of_iomap(np, 0); 51 scu_enable(scu_base); 52 of_node_put(np); 53 } 54 } 55 56 void __iomem *mvebu_get_scu_base(void) 57 { 58 return scu_base; 59 } 60 61 /* 62 * When returning from suspend, the platform goes through the 63 * bootloader, which executes its DDR3 training code. This code has 64 * the unfortunate idea of using the first 10 KB of each DRAM bank to 65 * exercise the RAM and calculate the optimal timings. Therefore, this 66 * area of RAM is overwritten, and shouldn't be used by the kernel if 67 * suspend/resume is supported. 68 */ 69 70 #ifdef CONFIG_SUSPEND 71 #define MVEBU_DDR_TRAINING_AREA_SZ (10 * SZ_1K) 72 static int __init mvebu_scan_mem(unsigned long node, const char *uname, 73 int depth, void *data) 74 { 75 const char *type = of_get_flat_dt_prop(node, "device_type", NULL); 76 const __be32 *reg, *endp; 77 int l; 78 79 if (type == NULL || strcmp(type, "memory")) 80 return 0; 81 82 reg = of_get_flat_dt_prop(node, "linux,usable-memory", &l); 83 if (reg == NULL) 84 reg = of_get_flat_dt_prop(node, "reg", &l); 85 if (reg == NULL) 86 return 0; 87 88 endp = reg + (l / sizeof(__be32)); 89 while ((endp - reg) >= (dt_root_addr_cells + dt_root_size_cells)) { 90 u64 base, size; 91 92 base = dt_mem_next_cell(dt_root_addr_cells, ®); 93 size = dt_mem_next_cell(dt_root_size_cells, ®); 94 95 memblock_reserve(base, MVEBU_DDR_TRAINING_AREA_SZ); 96 } 97 98 return 0; 99 } 100 101 static void __init mvebu_memblock_reserve(void) 102 { 103 of_scan_flat_dt(mvebu_scan_mem, NULL); 104 } 105 #else 106 static void __init mvebu_memblock_reserve(void) {} 107 #endif 108 109 /* 110 * Early versions of Armada 375 SoC have a bug where the BootROM 111 * leaves an external data abort pending. The kernel is hit by this 112 * data abort as soon as it enters userspace, because it unmasks the 113 * data aborts at this moment. We register a custom abort handler 114 * below to ignore the first data abort to work around this 115 * problem. 116 */ 117 static int armada_375_external_abort_wa(unsigned long addr, unsigned int fsr, 118 struct pt_regs *regs) 119 { 120 static int ignore_first; 121 122 if (!ignore_first && fsr == 0x1406) { 123 ignore_first = 1; 124 return 0; 125 } 126 127 return 1; 128 } 129 130 static void __init mvebu_init_irq(void) 131 { 132 irqchip_init(); 133 mvebu_scu_enable(); 134 coherency_init(); 135 BUG_ON(mvebu_mbus_dt_init(coherency_available())); 136 } 137 138 static void __init external_abort_quirk(void) 139 { 140 u32 dev, rev; 141 142 if (mvebu_get_soc_id(&dev, &rev) == 0 && rev > ARMADA_375_Z1_REV) 143 return; 144 145 hook_fault_code(16 + 6, armada_375_external_abort_wa, SIGBUS, 0, 146 "imprecise external abort"); 147 } 148 149 static void __init i2c_quirk(void) 150 { 151 struct device_node *np; 152 u32 dev, rev; 153 154 /* 155 * Only revisons more recent than A0 support the offload 156 * mechanism. We can exit only if we are sure that we can 157 * get the SoC revision and it is more recent than A0. 158 */ 159 if (mvebu_get_soc_id(&dev, &rev) == 0 && rev > MV78XX0_A0_REV) 160 return; 161 162 for_each_compatible_node(np, NULL, "marvell,mv78230-i2c") { 163 struct property *new_compat; 164 165 new_compat = kzalloc(sizeof(*new_compat), GFP_KERNEL); 166 167 new_compat->name = kstrdup("compatible", GFP_KERNEL); 168 new_compat->length = sizeof("marvell,mv78230-a0-i2c"); 169 new_compat->value = kstrdup("marvell,mv78230-a0-i2c", 170 GFP_KERNEL); 171 172 of_update_property(np, new_compat); 173 } 174 return; 175 } 176 177 static void __init mvebu_dt_init(void) 178 { 179 if (of_machine_is_compatible("marvell,armadaxp")) 180 i2c_quirk(); 181 if (of_machine_is_compatible("marvell,a375-db")) 182 external_abort_quirk(); 183 184 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 185 } 186 187 static const char * const armada_370_xp_dt_compat[] = { 188 "marvell,armada-370-xp", 189 NULL, 190 }; 191 192 DT_MACHINE_START(ARMADA_370_XP_DT, "Marvell Armada 370/XP (Device Tree)") 193 .l2c_aux_val = 0, 194 .l2c_aux_mask = ~0, 195 /* 196 * The following field (.smp) is still needed to ensure backward 197 * compatibility with old Device Trees that were not specifying the 198 * cpus enable-method property. 199 */ 200 .smp = smp_ops(armada_xp_smp_ops), 201 .init_machine = mvebu_dt_init, 202 .init_irq = mvebu_init_irq, 203 .restart = mvebu_restart, 204 .reserve = mvebu_memblock_reserve, 205 .dt_compat = armada_370_xp_dt_compat, 206 MACHINE_END 207 208 static const char * const armada_375_dt_compat[] = { 209 "marvell,armada375", 210 NULL, 211 }; 212 213 DT_MACHINE_START(ARMADA_375_DT, "Marvell Armada 375 (Device Tree)") 214 .l2c_aux_val = 0, 215 .l2c_aux_mask = ~0, 216 .init_irq = mvebu_init_irq, 217 .init_machine = mvebu_dt_init, 218 .restart = mvebu_restart, 219 .dt_compat = armada_375_dt_compat, 220 MACHINE_END 221 222 static const char * const armada_38x_dt_compat[] = { 223 "marvell,armada380", 224 "marvell,armada385", 225 NULL, 226 }; 227 228 DT_MACHINE_START(ARMADA_38X_DT, "Marvell Armada 380/385 (Device Tree)") 229 .l2c_aux_val = 0, 230 .l2c_aux_mask = ~0, 231 .init_irq = mvebu_init_irq, 232 .restart = mvebu_restart, 233 .dt_compat = armada_38x_dt_compat, 234 MACHINE_END 235