1 /* 2 * Device Tree support for Armada 370 and XP platforms. 3 * 4 * Copyright (C) 2012 Marvell 5 * 6 * Lior Amsalem <alior@marvell.com> 7 * Gregory CLEMENT <gregory.clement@free-electrons.com> 8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 9 * 10 * This file is licensed under the terms of the GNU General Public 11 * License version 2. This program is licensed "as is" without any 12 * warranty of any kind, whether express or implied. 13 */ 14 15 #include <linux/kernel.h> 16 #include <linux/init.h> 17 #include <linux/clk-provider.h> 18 #include <linux/of_address.h> 19 #include <linux/of_platform.h> 20 #include <linux/io.h> 21 #include <linux/clocksource.h> 22 #include <linux/dma-mapping.h> 23 #include <linux/mbus.h> 24 #include <linux/signal.h> 25 #include <linux/slab.h> 26 #include <asm/hardware/cache-l2x0.h> 27 #include <asm/mach/arch.h> 28 #include <asm/mach/map.h> 29 #include <asm/mach/time.h> 30 #include <asm/smp_scu.h> 31 #include "armada-370-xp.h" 32 #include "common.h" 33 #include "coherency.h" 34 #include "mvebu-soc-id.h" 35 36 /* 37 * Enables the SCU when available. Obviously, this is only useful on 38 * Cortex-A based SOCs, not on PJ4B based ones. 39 */ 40 static void __init mvebu_scu_enable(void) 41 { 42 void __iomem *scu_base; 43 44 struct device_node *np = 45 of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu"); 46 if (np) { 47 scu_base = of_iomap(np, 0); 48 scu_enable(scu_base); 49 of_node_put(np); 50 } 51 } 52 53 /* 54 * Early versions of Armada 375 SoC have a bug where the BootROM 55 * leaves an external data abort pending. The kernel is hit by this 56 * data abort as soon as it enters userspace, because it unmasks the 57 * data aborts at this moment. We register a custom abort handler 58 * below to ignore the first data abort to work around this 59 * problem. 60 */ 61 static int armada_375_external_abort_wa(unsigned long addr, unsigned int fsr, 62 struct pt_regs *regs) 63 { 64 static int ignore_first; 65 66 if (!ignore_first && fsr == 0x1406) { 67 ignore_first = 1; 68 return 0; 69 } 70 71 return 1; 72 } 73 74 static void __init mvebu_timer_and_clk_init(void) 75 { 76 of_clk_init(NULL); 77 clocksource_of_init(); 78 mvebu_scu_enable(); 79 coherency_init(); 80 BUG_ON(mvebu_mbus_dt_init(coherency_available())); 81 82 if (of_machine_is_compatible("marvell,armada375")) 83 hook_fault_code(16 + 6, armada_375_external_abort_wa, SIGBUS, 0, 84 "imprecise external abort"); 85 } 86 87 static void __init i2c_quirk(void) 88 { 89 struct device_node *np; 90 u32 dev, rev; 91 92 /* 93 * Only revisons more recent than A0 support the offload 94 * mechanism. We can exit only if we are sure that we can 95 * get the SoC revision and it is more recent than A0. 96 */ 97 if (mvebu_get_soc_id(&dev, &rev) == 0 && rev > MV78XX0_A0_REV) 98 return; 99 100 for_each_compatible_node(np, NULL, "marvell,mv78230-i2c") { 101 struct property *new_compat; 102 103 new_compat = kzalloc(sizeof(*new_compat), GFP_KERNEL); 104 105 new_compat->name = kstrdup("compatible", GFP_KERNEL); 106 new_compat->length = sizeof("marvell,mv78230-a0-i2c"); 107 new_compat->value = kstrdup("marvell,mv78230-a0-i2c", 108 GFP_KERNEL); 109 110 of_update_property(np, new_compat); 111 } 112 return; 113 } 114 115 #define A375_Z1_THERMAL_FIXUP_OFFSET 0xc 116 117 static void __init thermal_quirk(void) 118 { 119 struct device_node *np; 120 u32 dev, rev; 121 122 if (mvebu_get_soc_id(&dev, &rev) == 0 && rev > ARMADA_375_Z1_REV) 123 return; 124 125 for_each_compatible_node(np, NULL, "marvell,armada375-thermal") { 126 struct property *prop; 127 __be32 newval, *newprop, *oldprop; 128 int len; 129 130 /* 131 * The register offset is at a wrong location. This quirk 132 * creates a new reg property as a clone of the previous 133 * one and corrects the offset. 134 */ 135 oldprop = (__be32 *)of_get_property(np, "reg", &len); 136 if (!oldprop) 137 continue; 138 139 /* Create a duplicate of the 'reg' property */ 140 prop = kzalloc(sizeof(*prop), GFP_KERNEL); 141 prop->length = len; 142 prop->name = kstrdup("reg", GFP_KERNEL); 143 prop->value = kzalloc(len, GFP_KERNEL); 144 memcpy(prop->value, oldprop, len); 145 146 /* Fixup the register offset of the second entry */ 147 oldprop += 2; 148 newprop = (__be32 *)prop->value + 2; 149 newval = cpu_to_be32(be32_to_cpu(*oldprop) - 150 A375_Z1_THERMAL_FIXUP_OFFSET); 151 *newprop = newval; 152 of_update_property(np, prop); 153 154 /* 155 * The thermal controller needs some quirk too, so let's change 156 * the compatible string to reflect this. 157 */ 158 prop = kzalloc(sizeof(*prop), GFP_KERNEL); 159 prop->name = kstrdup("compatible", GFP_KERNEL); 160 prop->length = sizeof("marvell,armada375-z1-thermal"); 161 prop->value = kstrdup("marvell,armada375-z1-thermal", 162 GFP_KERNEL); 163 of_update_property(np, prop); 164 } 165 return; 166 } 167 168 static void __init mvebu_dt_init(void) 169 { 170 if (of_machine_is_compatible("plathome,openblocks-ax3-4")) 171 i2c_quirk(); 172 if (of_machine_is_compatible("marvell,a375-db")) 173 thermal_quirk(); 174 175 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 176 } 177 178 static const char * const armada_370_xp_dt_compat[] = { 179 "marvell,armada-370-xp", 180 NULL, 181 }; 182 183 DT_MACHINE_START(ARMADA_370_XP_DT, "Marvell Armada 370/XP (Device Tree)") 184 .l2c_aux_val = 0, 185 .l2c_aux_mask = ~0, 186 .smp = smp_ops(armada_xp_smp_ops), 187 .init_machine = mvebu_dt_init, 188 .init_time = mvebu_timer_and_clk_init, 189 .restart = mvebu_restart, 190 .dt_compat = armada_370_xp_dt_compat, 191 MACHINE_END 192 193 static const char * const armada_375_dt_compat[] = { 194 "marvell,armada375", 195 NULL, 196 }; 197 198 DT_MACHINE_START(ARMADA_375_DT, "Marvell Armada 375 (Device Tree)") 199 .l2c_aux_val = 0, 200 .l2c_aux_mask = ~0, 201 .init_time = mvebu_timer_and_clk_init, 202 .init_machine = mvebu_dt_init, 203 .restart = mvebu_restart, 204 .dt_compat = armada_375_dt_compat, 205 MACHINE_END 206 207 static const char * const armada_38x_dt_compat[] = { 208 "marvell,armada380", 209 "marvell,armada385", 210 NULL, 211 }; 212 213 DT_MACHINE_START(ARMADA_38X_DT, "Marvell Armada 380/385 (Device Tree)") 214 .l2c_aux_val = 0, 215 .l2c_aux_mask = ~0, 216 .init_time = mvebu_timer_and_clk_init, 217 .restart = mvebu_restart, 218 .dt_compat = armada_38x_dt_compat, 219 MACHINE_END 220