1 /* 2 * Device Tree support for Armada 370 and XP platforms. 3 * 4 * Copyright (C) 2012 Marvell 5 * 6 * Lior Amsalem <alior@marvell.com> 7 * Gregory CLEMENT <gregory.clement@free-electrons.com> 8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 9 * 10 * This file is licensed under the terms of the GNU General Public 11 * License version 2. This program is licensed "as is" without any 12 * warranty of any kind, whether express or implied. 13 */ 14 15 #include <linux/kernel.h> 16 #include <linux/init.h> 17 #include <linux/clk-provider.h> 18 #include <linux/of_address.h> 19 #include <linux/of_platform.h> 20 #include <linux/io.h> 21 #include <linux/clocksource.h> 22 #include <linux/dma-mapping.h> 23 #include <linux/mbus.h> 24 #include <linux/signal.h> 25 #include <linux/slab.h> 26 #include <linux/irqchip.h> 27 #include <asm/hardware/cache-l2x0.h> 28 #include <asm/mach/arch.h> 29 #include <asm/mach/map.h> 30 #include <asm/mach/time.h> 31 #include <asm/smp_scu.h> 32 #include "armada-370-xp.h" 33 #include "common.h" 34 #include "coherency.h" 35 #include "mvebu-soc-id.h" 36 37 static void __iomem *scu_base; 38 39 /* 40 * Enables the SCU when available. Obviously, this is only useful on 41 * Cortex-A based SOCs, not on PJ4B based ones. 42 */ 43 static void __init mvebu_scu_enable(void) 44 { 45 struct device_node *np = 46 of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu"); 47 if (np) { 48 scu_base = of_iomap(np, 0); 49 scu_enable(scu_base); 50 of_node_put(np); 51 } 52 } 53 54 void __iomem *mvebu_get_scu_base(void) 55 { 56 return scu_base; 57 } 58 59 /* 60 * Early versions of Armada 375 SoC have a bug where the BootROM 61 * leaves an external data abort pending. The kernel is hit by this 62 * data abort as soon as it enters userspace, because it unmasks the 63 * data aborts at this moment. We register a custom abort handler 64 * below to ignore the first data abort to work around this 65 * problem. 66 */ 67 static int armada_375_external_abort_wa(unsigned long addr, unsigned int fsr, 68 struct pt_regs *regs) 69 { 70 static int ignore_first; 71 72 if (!ignore_first && fsr == 0x1406) { 73 ignore_first = 1; 74 return 0; 75 } 76 77 return 1; 78 } 79 80 static void __init mvebu_init_irq(void) 81 { 82 irqchip_init(); 83 mvebu_scu_enable(); 84 coherency_init(); 85 BUG_ON(mvebu_mbus_dt_init(coherency_available())); 86 } 87 88 static void __init external_abort_quirk(void) 89 { 90 u32 dev, rev; 91 92 if (mvebu_get_soc_id(&dev, &rev) == 0 && rev > ARMADA_375_Z1_REV) 93 return; 94 95 hook_fault_code(16 + 6, armada_375_external_abort_wa, SIGBUS, 0, 96 "imprecise external abort"); 97 } 98 99 static void __init i2c_quirk(void) 100 { 101 struct device_node *np; 102 u32 dev, rev; 103 104 /* 105 * Only revisons more recent than A0 support the offload 106 * mechanism. We can exit only if we are sure that we can 107 * get the SoC revision and it is more recent than A0. 108 */ 109 if (mvebu_get_soc_id(&dev, &rev) == 0 && rev > MV78XX0_A0_REV) 110 return; 111 112 for_each_compatible_node(np, NULL, "marvell,mv78230-i2c") { 113 struct property *new_compat; 114 115 new_compat = kzalloc(sizeof(*new_compat), GFP_KERNEL); 116 117 new_compat->name = kstrdup("compatible", GFP_KERNEL); 118 new_compat->length = sizeof("marvell,mv78230-a0-i2c"); 119 new_compat->value = kstrdup("marvell,mv78230-a0-i2c", 120 GFP_KERNEL); 121 122 of_update_property(np, new_compat); 123 } 124 return; 125 } 126 127 #define A375_Z1_THERMAL_FIXUP_OFFSET 0xc 128 129 static void __init thermal_quirk(void) 130 { 131 struct device_node *np; 132 u32 dev, rev; 133 int res; 134 135 /* 136 * The early SoC Z1 revision needs a quirk to be applied in order 137 * for the thermal controller to work properly. This quirk breaks 138 * the thermal support if applied on a SoC that doesn't need it, 139 * so we enforce the SoC revision to be known. 140 */ 141 res = mvebu_get_soc_id(&dev, &rev); 142 if (res < 0 || (res == 0 && rev > ARMADA_375_Z1_REV)) 143 return; 144 145 for_each_compatible_node(np, NULL, "marvell,armada375-thermal") { 146 struct property *prop; 147 __be32 newval, *newprop, *oldprop; 148 int len; 149 150 /* 151 * The register offset is at a wrong location. This quirk 152 * creates a new reg property as a clone of the previous 153 * one and corrects the offset. 154 */ 155 oldprop = (__be32 *)of_get_property(np, "reg", &len); 156 if (!oldprop) 157 continue; 158 159 /* Create a duplicate of the 'reg' property */ 160 prop = kzalloc(sizeof(*prop), GFP_KERNEL); 161 prop->length = len; 162 prop->name = kstrdup("reg", GFP_KERNEL); 163 prop->value = kzalloc(len, GFP_KERNEL); 164 memcpy(prop->value, oldprop, len); 165 166 /* Fixup the register offset of the second entry */ 167 oldprop += 2; 168 newprop = (__be32 *)prop->value + 2; 169 newval = cpu_to_be32(be32_to_cpu(*oldprop) - 170 A375_Z1_THERMAL_FIXUP_OFFSET); 171 *newprop = newval; 172 of_update_property(np, prop); 173 174 /* 175 * The thermal controller needs some quirk too, so let's change 176 * the compatible string to reflect this and allow the driver 177 * the take the necessary action. 178 */ 179 prop = kzalloc(sizeof(*prop), GFP_KERNEL); 180 prop->name = kstrdup("compatible", GFP_KERNEL); 181 prop->length = sizeof("marvell,armada375-z1-thermal"); 182 prop->value = kstrdup("marvell,armada375-z1-thermal", 183 GFP_KERNEL); 184 of_update_property(np, prop); 185 } 186 return; 187 } 188 189 static void __init mvebu_dt_init(void) 190 { 191 if (of_machine_is_compatible("marvell,armadaxp")) 192 i2c_quirk(); 193 if (of_machine_is_compatible("marvell,a375-db")) { 194 external_abort_quirk(); 195 thermal_quirk(); 196 } 197 198 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 199 } 200 201 static const char * const armada_370_xp_dt_compat[] = { 202 "marvell,armada-370-xp", 203 NULL, 204 }; 205 206 DT_MACHINE_START(ARMADA_370_XP_DT, "Marvell Armada 370/XP (Device Tree)") 207 .l2c_aux_val = 0, 208 .l2c_aux_mask = ~0, 209 .smp = smp_ops(armada_xp_smp_ops), 210 .init_machine = mvebu_dt_init, 211 .init_irq = mvebu_init_irq, 212 .restart = mvebu_restart, 213 .dt_compat = armada_370_xp_dt_compat, 214 MACHINE_END 215 216 static const char * const armada_375_dt_compat[] = { 217 "marvell,armada375", 218 NULL, 219 }; 220 221 DT_MACHINE_START(ARMADA_375_DT, "Marvell Armada 375 (Device Tree)") 222 .l2c_aux_val = 0, 223 .l2c_aux_mask = ~0, 224 .init_irq = mvebu_init_irq, 225 .init_machine = mvebu_dt_init, 226 .restart = mvebu_restart, 227 .dt_compat = armada_375_dt_compat, 228 MACHINE_END 229 230 static const char * const armada_38x_dt_compat[] = { 231 "marvell,armada380", 232 "marvell,armada385", 233 NULL, 234 }; 235 236 DT_MACHINE_START(ARMADA_38X_DT, "Marvell Armada 380/385 (Device Tree)") 237 .l2c_aux_val = 0, 238 .l2c_aux_mask = ~0, 239 .init_irq = mvebu_init_irq, 240 .restart = mvebu_restart, 241 .dt_compat = armada_38x_dt_compat, 242 MACHINE_END 243