1*0fdebc5eSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2*0fdebc5eSThomas Gleixner /* IRQ definitions for Marvell MV78xx0 SoCs */ 34c811b99SArnd Bergmann 44c811b99SArnd Bergmann #ifndef __ASM_ARCH_IRQS_H 54c811b99SArnd Bergmann #define __ASM_ARCH_IRQS_H 64c811b99SArnd Bergmann 74c811b99SArnd Bergmann /* 84c811b99SArnd Bergmann * MV78xx0 Low Interrupt Controller 94c811b99SArnd Bergmann */ 104c811b99SArnd Bergmann #define IRQ_MV78XX0_ERR 0 114c811b99SArnd Bergmann #define IRQ_MV78XX0_SPI 1 124c811b99SArnd Bergmann #define IRQ_MV78XX0_I2C_0 2 134c811b99SArnd Bergmann #define IRQ_MV78XX0_I2C_1 3 144c811b99SArnd Bergmann #define IRQ_MV78XX0_IDMA_0 4 154c811b99SArnd Bergmann #define IRQ_MV78XX0_IDMA_1 5 164c811b99SArnd Bergmann #define IRQ_MV78XX0_IDMA_2 6 174c811b99SArnd Bergmann #define IRQ_MV78XX0_IDMA_3 7 184c811b99SArnd Bergmann #define IRQ_MV78XX0_TIMER_0 8 194c811b99SArnd Bergmann #define IRQ_MV78XX0_TIMER_1 9 204c811b99SArnd Bergmann #define IRQ_MV78XX0_TIMER_2 10 214c811b99SArnd Bergmann #define IRQ_MV78XX0_TIMER_3 11 224c811b99SArnd Bergmann #define IRQ_MV78XX0_UART_0 12 234c811b99SArnd Bergmann #define IRQ_MV78XX0_UART_1 13 244c811b99SArnd Bergmann #define IRQ_MV78XX0_UART_2 14 254c811b99SArnd Bergmann #define IRQ_MV78XX0_UART_3 15 264c811b99SArnd Bergmann #define IRQ_MV78XX0_USB_0 16 274c811b99SArnd Bergmann #define IRQ_MV78XX0_USB_1 17 284c811b99SArnd Bergmann #define IRQ_MV78XX0_USB_2 18 294c811b99SArnd Bergmann #define IRQ_MV78XX0_CRYPTO 19 304c811b99SArnd Bergmann #define IRQ_MV78XX0_SDIO_0 20 314c811b99SArnd Bergmann #define IRQ_MV78XX0_SDIO_1 21 324c811b99SArnd Bergmann #define IRQ_MV78XX0_XOR_0 22 334c811b99SArnd Bergmann #define IRQ_MV78XX0_XOR_1 23 344c811b99SArnd Bergmann #define IRQ_MV78XX0_I2S_0 24 354c811b99SArnd Bergmann #define IRQ_MV78XX0_I2S_1 25 364c811b99SArnd Bergmann #define IRQ_MV78XX0_SATA 26 374c811b99SArnd Bergmann #define IRQ_MV78XX0_TDMI 27 384c811b99SArnd Bergmann 394c811b99SArnd Bergmann /* 404c811b99SArnd Bergmann * MV78xx0 High Interrupt Controller 414c811b99SArnd Bergmann */ 424c811b99SArnd Bergmann #define IRQ_MV78XX0_PCIE_00 32 434c811b99SArnd Bergmann #define IRQ_MV78XX0_PCIE_01 33 444c811b99SArnd Bergmann #define IRQ_MV78XX0_PCIE_02 34 454c811b99SArnd Bergmann #define IRQ_MV78XX0_PCIE_03 35 464c811b99SArnd Bergmann #define IRQ_MV78XX0_PCIE_10 36 474c811b99SArnd Bergmann #define IRQ_MV78XX0_PCIE_11 37 484c811b99SArnd Bergmann #define IRQ_MV78XX0_PCIE_12 38 494c811b99SArnd Bergmann #define IRQ_MV78XX0_PCIE_13 39 504c811b99SArnd Bergmann #define IRQ_MV78XX0_GE00_SUM 40 514c811b99SArnd Bergmann #define IRQ_MV78XX0_GE00_RX 41 524c811b99SArnd Bergmann #define IRQ_MV78XX0_GE00_TX 42 534c811b99SArnd Bergmann #define IRQ_MV78XX0_GE00_MISC 43 544c811b99SArnd Bergmann #define IRQ_MV78XX0_GE01_SUM 44 554c811b99SArnd Bergmann #define IRQ_MV78XX0_GE01_RX 45 564c811b99SArnd Bergmann #define IRQ_MV78XX0_GE01_TX 46 574c811b99SArnd Bergmann #define IRQ_MV78XX0_GE01_MISC 47 584c811b99SArnd Bergmann #define IRQ_MV78XX0_GE10_SUM 48 594c811b99SArnd Bergmann #define IRQ_MV78XX0_GE10_RX 49 604c811b99SArnd Bergmann #define IRQ_MV78XX0_GE10_TX 50 614c811b99SArnd Bergmann #define IRQ_MV78XX0_GE10_MISC 51 624c811b99SArnd Bergmann #define IRQ_MV78XX0_GE11_SUM 52 634c811b99SArnd Bergmann #define IRQ_MV78XX0_GE11_RX 53 644c811b99SArnd Bergmann #define IRQ_MV78XX0_GE11_TX 54 654c811b99SArnd Bergmann #define IRQ_MV78XX0_GE11_MISC 55 664c811b99SArnd Bergmann #define IRQ_MV78XX0_GPIO_0_7 56 674c811b99SArnd Bergmann #define IRQ_MV78XX0_GPIO_8_15 57 684c811b99SArnd Bergmann #define IRQ_MV78XX0_GPIO_16_23 58 694c811b99SArnd Bergmann #define IRQ_MV78XX0_GPIO_24_31 59 704c811b99SArnd Bergmann #define IRQ_MV78XX0_DB_IN 60 714c811b99SArnd Bergmann #define IRQ_MV78XX0_DB_OUT 61 724c811b99SArnd Bergmann 734c811b99SArnd Bergmann /* 744c811b99SArnd Bergmann * MV78xx0 Error Interrupt Controller 754c811b99SArnd Bergmann */ 764c811b99SArnd Bergmann #define IRQ_MV78XX0_GE_ERR 70 774c811b99SArnd Bergmann 784c811b99SArnd Bergmann /* 794c811b99SArnd Bergmann * MV78XX0 General Purpose Pins 804c811b99SArnd Bergmann */ 814c811b99SArnd Bergmann #define IRQ_MV78XX0_GPIO_START 96 824c811b99SArnd Bergmann #define NR_GPIO_IRQS 32 834c811b99SArnd Bergmann 844c811b99SArnd Bergmann #define MV78XX0_NR_IRQS (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS) 854c811b99SArnd Bergmann 864c811b99SArnd Bergmann 874c811b99SArnd Bergmann #endif 88