1794d15b2SStanislav Samsonov /* 2794d15b2SStanislav Samsonov * arch/arm/mach-mv78xx0/common.c 3794d15b2SStanislav Samsonov * 4794d15b2SStanislav Samsonov * Core functions for Marvell MV78xx0 SoCs 5794d15b2SStanislav Samsonov * 6794d15b2SStanislav Samsonov * This file is licensed under the terms of the GNU General Public 7794d15b2SStanislav Samsonov * License version 2. This program is licensed "as is" without any 8794d15b2SStanislav Samsonov * warranty of any kind, whether express or implied. 9794d15b2SStanislav Samsonov */ 10794d15b2SStanislav Samsonov 11794d15b2SStanislav Samsonov #include <linux/kernel.h> 12794d15b2SStanislav Samsonov #include <linux/init.h> 13794d15b2SStanislav Samsonov #include <linux/platform_device.h> 14794d15b2SStanislav Samsonov #include <linux/serial_8250.h> 15794d15b2SStanislav Samsonov #include <linux/mbus.h> 16794d15b2SStanislav Samsonov #include <linux/mv643xx_eth.h> 1769359943SRiku Voipio #include <linux/mv643xx_i2c.h> 18794d15b2SStanislav Samsonov #include <linux/ata_platform.h> 19712424fdSLennert Buytenhek #include <linux/ethtool.h> 20794d15b2SStanislav Samsonov #include <asm/mach/map.h> 21794d15b2SStanislav Samsonov #include <asm/mach/time.h> 22a09e64fbSRussell King #include <mach/mv78xx0.h> 23fdd8b079SNicolas Pitre #include <mach/bridge-regs.h> 246f088f1dSLennert Buytenhek #include <plat/cache-feroceon-l2.h> 256f088f1dSLennert Buytenhek #include <plat/ehci-orion.h> 266f088f1dSLennert Buytenhek #include <plat/orion_nand.h> 276f088f1dSLennert Buytenhek #include <plat/time.h> 28794d15b2SStanislav Samsonov #include "common.h" 29794d15b2SStanislav Samsonov 30794d15b2SStanislav Samsonov 31794d15b2SStanislav Samsonov /***************************************************************************** 32794d15b2SStanislav Samsonov * Common bits 33794d15b2SStanislav Samsonov ****************************************************************************/ 34794d15b2SStanislav Samsonov int mv78xx0_core_index(void) 35794d15b2SStanislav Samsonov { 36794d15b2SStanislav Samsonov u32 extra; 37794d15b2SStanislav Samsonov 38794d15b2SStanislav Samsonov /* 39794d15b2SStanislav Samsonov * Read Extra Features register. 40794d15b2SStanislav Samsonov */ 41794d15b2SStanislav Samsonov __asm__("mrc p15, 1, %0, c15, c1, 0" : "=r" (extra)); 42794d15b2SStanislav Samsonov 43794d15b2SStanislav Samsonov return !!(extra & 0x00004000); 44794d15b2SStanislav Samsonov } 45794d15b2SStanislav Samsonov 46794d15b2SStanislav Samsonov static int get_hclk(void) 47794d15b2SStanislav Samsonov { 48794d15b2SStanislav Samsonov int hclk; 49794d15b2SStanislav Samsonov 50794d15b2SStanislav Samsonov /* 51794d15b2SStanislav Samsonov * HCLK tick rate is configured by DEV_D[7:5] pins. 52794d15b2SStanislav Samsonov */ 53794d15b2SStanislav Samsonov switch ((readl(SAMPLE_AT_RESET_LOW) >> 5) & 7) { 54794d15b2SStanislav Samsonov case 0: 55794d15b2SStanislav Samsonov hclk = 166666667; 56794d15b2SStanislav Samsonov break; 57794d15b2SStanislav Samsonov case 1: 58794d15b2SStanislav Samsonov hclk = 200000000; 59794d15b2SStanislav Samsonov break; 60794d15b2SStanislav Samsonov case 2: 61794d15b2SStanislav Samsonov hclk = 266666667; 62794d15b2SStanislav Samsonov break; 63794d15b2SStanislav Samsonov case 3: 64794d15b2SStanislav Samsonov hclk = 333333333; 65794d15b2SStanislav Samsonov break; 66794d15b2SStanislav Samsonov case 4: 67794d15b2SStanislav Samsonov hclk = 400000000; 68794d15b2SStanislav Samsonov break; 69794d15b2SStanislav Samsonov default: 70794d15b2SStanislav Samsonov panic("unknown HCLK PLL setting: %.8x\n", 71794d15b2SStanislav Samsonov readl(SAMPLE_AT_RESET_LOW)); 72794d15b2SStanislav Samsonov } 73794d15b2SStanislav Samsonov 74794d15b2SStanislav Samsonov return hclk; 75794d15b2SStanislav Samsonov } 76794d15b2SStanislav Samsonov 77794d15b2SStanislav Samsonov static void get_pclk_l2clk(int hclk, int core_index, int *pclk, int *l2clk) 78794d15b2SStanislav Samsonov { 79794d15b2SStanislav Samsonov u32 cfg; 80794d15b2SStanislav Samsonov 81794d15b2SStanislav Samsonov /* 82794d15b2SStanislav Samsonov * Core #0 PCLK/L2CLK is configured by bits [13:8], core #1 83794d15b2SStanislav Samsonov * PCLK/L2CLK by bits [19:14]. 84794d15b2SStanislav Samsonov */ 85794d15b2SStanislav Samsonov if (core_index == 0) { 86794d15b2SStanislav Samsonov cfg = (readl(SAMPLE_AT_RESET_LOW) >> 8) & 0x3f; 87794d15b2SStanislav Samsonov } else { 88794d15b2SStanislav Samsonov cfg = (readl(SAMPLE_AT_RESET_LOW) >> 14) & 0x3f; 89794d15b2SStanislav Samsonov } 90794d15b2SStanislav Samsonov 91794d15b2SStanislav Samsonov /* 92794d15b2SStanislav Samsonov * Bits [11:8] ([17:14] for core #1) configure the PCLK:HCLK 93794d15b2SStanislav Samsonov * ratio (1, 1.5, 2, 2.5, 3, 3.5, 4, 4.5, 5, 5.5, 6). 94794d15b2SStanislav Samsonov */ 95794d15b2SStanislav Samsonov *pclk = ((u64)hclk * (2 + (cfg & 0xf))) >> 1; 96794d15b2SStanislav Samsonov 97794d15b2SStanislav Samsonov /* 98794d15b2SStanislav Samsonov * Bits [13:12] ([19:18] for core #1) configure the PCLK:L2CLK 99794d15b2SStanislav Samsonov * ratio (1, 2, 3). 100794d15b2SStanislav Samsonov */ 101794d15b2SStanislav Samsonov *l2clk = *pclk / (((cfg >> 4) & 3) + 1); 102794d15b2SStanislav Samsonov } 103794d15b2SStanislav Samsonov 104794d15b2SStanislav Samsonov static int get_tclk(void) 105794d15b2SStanislav Samsonov { 106794d15b2SStanislav Samsonov int tclk; 107794d15b2SStanislav Samsonov 108794d15b2SStanislav Samsonov /* 109794d15b2SStanislav Samsonov * TCLK tick rate is configured by DEV_A[2:0] strap pins. 110794d15b2SStanislav Samsonov */ 111794d15b2SStanislav Samsonov switch ((readl(SAMPLE_AT_RESET_HIGH) >> 6) & 7) { 112794d15b2SStanislav Samsonov case 1: 113794d15b2SStanislav Samsonov tclk = 166666667; 114794d15b2SStanislav Samsonov break; 115794d15b2SStanislav Samsonov case 3: 116794d15b2SStanislav Samsonov tclk = 200000000; 117794d15b2SStanislav Samsonov break; 118794d15b2SStanislav Samsonov default: 119794d15b2SStanislav Samsonov panic("unknown TCLK PLL setting: %.8x\n", 120794d15b2SStanislav Samsonov readl(SAMPLE_AT_RESET_HIGH)); 121794d15b2SStanislav Samsonov } 122794d15b2SStanislav Samsonov 123794d15b2SStanislav Samsonov return tclk; 124794d15b2SStanislav Samsonov } 125794d15b2SStanislav Samsonov 126794d15b2SStanislav Samsonov 127794d15b2SStanislav Samsonov /***************************************************************************** 128794d15b2SStanislav Samsonov * I/O Address Mapping 129794d15b2SStanislav Samsonov ****************************************************************************/ 130794d15b2SStanislav Samsonov static struct map_desc mv78xx0_io_desc[] __initdata = { 131794d15b2SStanislav Samsonov { 132794d15b2SStanislav Samsonov .virtual = MV78XX0_CORE_REGS_VIRT_BASE, 133794d15b2SStanislav Samsonov .pfn = 0, 134794d15b2SStanislav Samsonov .length = MV78XX0_CORE_REGS_SIZE, 135794d15b2SStanislav Samsonov .type = MT_DEVICE, 136794d15b2SStanislav Samsonov }, { 137794d15b2SStanislav Samsonov .virtual = MV78XX0_PCIE_IO_VIRT_BASE(0), 138794d15b2SStanislav Samsonov .pfn = __phys_to_pfn(MV78XX0_PCIE_IO_PHYS_BASE(0)), 139794d15b2SStanislav Samsonov .length = MV78XX0_PCIE_IO_SIZE * 8, 140794d15b2SStanislav Samsonov .type = MT_DEVICE, 141794d15b2SStanislav Samsonov }, { 142794d15b2SStanislav Samsonov .virtual = MV78XX0_REGS_VIRT_BASE, 143794d15b2SStanislav Samsonov .pfn = __phys_to_pfn(MV78XX0_REGS_PHYS_BASE), 144794d15b2SStanislav Samsonov .length = MV78XX0_REGS_SIZE, 145794d15b2SStanislav Samsonov .type = MT_DEVICE, 146794d15b2SStanislav Samsonov }, 147794d15b2SStanislav Samsonov }; 148794d15b2SStanislav Samsonov 149794d15b2SStanislav Samsonov void __init mv78xx0_map_io(void) 150794d15b2SStanislav Samsonov { 151794d15b2SStanislav Samsonov unsigned long phys; 152794d15b2SStanislav Samsonov 153794d15b2SStanislav Samsonov /* 154794d15b2SStanislav Samsonov * Map the right set of per-core registers depending on 155794d15b2SStanislav Samsonov * which core we are running on. 156794d15b2SStanislav Samsonov */ 157794d15b2SStanislav Samsonov if (mv78xx0_core_index() == 0) { 158794d15b2SStanislav Samsonov phys = MV78XX0_CORE0_REGS_PHYS_BASE; 159794d15b2SStanislav Samsonov } else { 160794d15b2SStanislav Samsonov phys = MV78XX0_CORE1_REGS_PHYS_BASE; 161794d15b2SStanislav Samsonov } 162794d15b2SStanislav Samsonov mv78xx0_io_desc[0].pfn = __phys_to_pfn(phys); 163794d15b2SStanislav Samsonov 164794d15b2SStanislav Samsonov iotable_init(mv78xx0_io_desc, ARRAY_SIZE(mv78xx0_io_desc)); 165794d15b2SStanislav Samsonov } 166794d15b2SStanislav Samsonov 167794d15b2SStanislav Samsonov 168794d15b2SStanislav Samsonov /***************************************************************************** 169794d15b2SStanislav Samsonov * EHCI 170794d15b2SStanislav Samsonov ****************************************************************************/ 171794d15b2SStanislav Samsonov static struct orion_ehci_data mv78xx0_ehci_data = { 172794d15b2SStanislav Samsonov .dram = &mv78xx0_mbus_dram_info, 173fb6f5529SRonen Shitrit .phy_version = EHCI_PHY_NA, 174794d15b2SStanislav Samsonov }; 175794d15b2SStanislav Samsonov 176794d15b2SStanislav Samsonov static u64 ehci_dmamask = 0xffffffffUL; 177794d15b2SStanislav Samsonov 178794d15b2SStanislav Samsonov 179794d15b2SStanislav Samsonov /***************************************************************************** 180794d15b2SStanislav Samsonov * EHCI0 181794d15b2SStanislav Samsonov ****************************************************************************/ 182794d15b2SStanislav Samsonov static struct resource mv78xx0_ehci0_resources[] = { 183794d15b2SStanislav Samsonov { 184794d15b2SStanislav Samsonov .start = USB0_PHYS_BASE, 185794d15b2SStanislav Samsonov .end = USB0_PHYS_BASE + 0x0fff, 186794d15b2SStanislav Samsonov .flags = IORESOURCE_MEM, 187794d15b2SStanislav Samsonov }, { 188794d15b2SStanislav Samsonov .start = IRQ_MV78XX0_USB_0, 189794d15b2SStanislav Samsonov .end = IRQ_MV78XX0_USB_0, 190794d15b2SStanislav Samsonov .flags = IORESOURCE_IRQ, 191794d15b2SStanislav Samsonov }, 192794d15b2SStanislav Samsonov }; 193794d15b2SStanislav Samsonov 194794d15b2SStanislav Samsonov static struct platform_device mv78xx0_ehci0 = { 195794d15b2SStanislav Samsonov .name = "orion-ehci", 196794d15b2SStanislav Samsonov .id = 0, 197794d15b2SStanislav Samsonov .dev = { 198794d15b2SStanislav Samsonov .dma_mask = &ehci_dmamask, 199794d15b2SStanislav Samsonov .coherent_dma_mask = 0xffffffff, 200794d15b2SStanislav Samsonov .platform_data = &mv78xx0_ehci_data, 201794d15b2SStanislav Samsonov }, 202794d15b2SStanislav Samsonov .resource = mv78xx0_ehci0_resources, 203794d15b2SStanislav Samsonov .num_resources = ARRAY_SIZE(mv78xx0_ehci0_resources), 204794d15b2SStanislav Samsonov }; 205794d15b2SStanislav Samsonov 206794d15b2SStanislav Samsonov void __init mv78xx0_ehci0_init(void) 207794d15b2SStanislav Samsonov { 208794d15b2SStanislav Samsonov platform_device_register(&mv78xx0_ehci0); 209794d15b2SStanislav Samsonov } 210794d15b2SStanislav Samsonov 211794d15b2SStanislav Samsonov 212794d15b2SStanislav Samsonov /***************************************************************************** 213794d15b2SStanislav Samsonov * EHCI1 214794d15b2SStanislav Samsonov ****************************************************************************/ 215794d15b2SStanislav Samsonov static struct resource mv78xx0_ehci1_resources[] = { 216794d15b2SStanislav Samsonov { 217794d15b2SStanislav Samsonov .start = USB1_PHYS_BASE, 218794d15b2SStanislav Samsonov .end = USB1_PHYS_BASE + 0x0fff, 219794d15b2SStanislav Samsonov .flags = IORESOURCE_MEM, 220794d15b2SStanislav Samsonov }, { 221794d15b2SStanislav Samsonov .start = IRQ_MV78XX0_USB_1, 222794d15b2SStanislav Samsonov .end = IRQ_MV78XX0_USB_1, 223794d15b2SStanislav Samsonov .flags = IORESOURCE_IRQ, 224794d15b2SStanislav Samsonov }, 225794d15b2SStanislav Samsonov }; 226794d15b2SStanislav Samsonov 227794d15b2SStanislav Samsonov static struct platform_device mv78xx0_ehci1 = { 228794d15b2SStanislav Samsonov .name = "orion-ehci", 229794d15b2SStanislav Samsonov .id = 1, 230794d15b2SStanislav Samsonov .dev = { 231794d15b2SStanislav Samsonov .dma_mask = &ehci_dmamask, 232794d15b2SStanislav Samsonov .coherent_dma_mask = 0xffffffff, 233794d15b2SStanislav Samsonov .platform_data = &mv78xx0_ehci_data, 234794d15b2SStanislav Samsonov }, 235794d15b2SStanislav Samsonov .resource = mv78xx0_ehci1_resources, 236794d15b2SStanislav Samsonov .num_resources = ARRAY_SIZE(mv78xx0_ehci1_resources), 237794d15b2SStanislav Samsonov }; 238794d15b2SStanislav Samsonov 239794d15b2SStanislav Samsonov void __init mv78xx0_ehci1_init(void) 240794d15b2SStanislav Samsonov { 241794d15b2SStanislav Samsonov platform_device_register(&mv78xx0_ehci1); 242794d15b2SStanislav Samsonov } 243794d15b2SStanislav Samsonov 244794d15b2SStanislav Samsonov 245794d15b2SStanislav Samsonov /***************************************************************************** 246794d15b2SStanislav Samsonov * EHCI2 247794d15b2SStanislav Samsonov ****************************************************************************/ 248794d15b2SStanislav Samsonov static struct resource mv78xx0_ehci2_resources[] = { 249794d15b2SStanislav Samsonov { 250794d15b2SStanislav Samsonov .start = USB2_PHYS_BASE, 251794d15b2SStanislav Samsonov .end = USB2_PHYS_BASE + 0x0fff, 252794d15b2SStanislav Samsonov .flags = IORESOURCE_MEM, 253794d15b2SStanislav Samsonov }, { 254794d15b2SStanislav Samsonov .start = IRQ_MV78XX0_USB_2, 255794d15b2SStanislav Samsonov .end = IRQ_MV78XX0_USB_2, 256794d15b2SStanislav Samsonov .flags = IORESOURCE_IRQ, 257794d15b2SStanislav Samsonov }, 258794d15b2SStanislav Samsonov }; 259794d15b2SStanislav Samsonov 260794d15b2SStanislav Samsonov static struct platform_device mv78xx0_ehci2 = { 261794d15b2SStanislav Samsonov .name = "orion-ehci", 262794d15b2SStanislav Samsonov .id = 2, 263794d15b2SStanislav Samsonov .dev = { 264794d15b2SStanislav Samsonov .dma_mask = &ehci_dmamask, 265794d15b2SStanislav Samsonov .coherent_dma_mask = 0xffffffff, 266794d15b2SStanislav Samsonov .platform_data = &mv78xx0_ehci_data, 267794d15b2SStanislav Samsonov }, 268794d15b2SStanislav Samsonov .resource = mv78xx0_ehci2_resources, 269794d15b2SStanislav Samsonov .num_resources = ARRAY_SIZE(mv78xx0_ehci2_resources), 270794d15b2SStanislav Samsonov }; 271794d15b2SStanislav Samsonov 272794d15b2SStanislav Samsonov void __init mv78xx0_ehci2_init(void) 273794d15b2SStanislav Samsonov { 274794d15b2SStanislav Samsonov platform_device_register(&mv78xx0_ehci2); 275794d15b2SStanislav Samsonov } 276794d15b2SStanislav Samsonov 277794d15b2SStanislav Samsonov 278794d15b2SStanislav Samsonov /***************************************************************************** 279794d15b2SStanislav Samsonov * GE00 280794d15b2SStanislav Samsonov ****************************************************************************/ 281794d15b2SStanislav Samsonov struct mv643xx_eth_shared_platform_data mv78xx0_ge00_shared_data = { 282794d15b2SStanislav Samsonov .t_clk = 0, 283794d15b2SStanislav Samsonov .dram = &mv78xx0_mbus_dram_info, 284794d15b2SStanislav Samsonov }; 285794d15b2SStanislav Samsonov 286794d15b2SStanislav Samsonov static struct resource mv78xx0_ge00_shared_resources[] = { 287794d15b2SStanislav Samsonov { 288794d15b2SStanislav Samsonov .name = "ge00 base", 289794d15b2SStanislav Samsonov .start = GE00_PHYS_BASE + 0x2000, 290794d15b2SStanislav Samsonov .end = GE00_PHYS_BASE + 0x3fff, 291794d15b2SStanislav Samsonov .flags = IORESOURCE_MEM, 2921f8081f5SLennert Buytenhek }, { 2931f8081f5SLennert Buytenhek .name = "ge err irq", 2941f8081f5SLennert Buytenhek .start = IRQ_MV78XX0_GE_ERR, 2951f8081f5SLennert Buytenhek .end = IRQ_MV78XX0_GE_ERR, 2961f8081f5SLennert Buytenhek .flags = IORESOURCE_IRQ, 297794d15b2SStanislav Samsonov }, 298794d15b2SStanislav Samsonov }; 299794d15b2SStanislav Samsonov 300794d15b2SStanislav Samsonov static struct platform_device mv78xx0_ge00_shared = { 301794d15b2SStanislav Samsonov .name = MV643XX_ETH_SHARED_NAME, 302794d15b2SStanislav Samsonov .id = 0, 303794d15b2SStanislav Samsonov .dev = { 304794d15b2SStanislav Samsonov .platform_data = &mv78xx0_ge00_shared_data, 305794d15b2SStanislav Samsonov }, 3061f8081f5SLennert Buytenhek .num_resources = ARRAY_SIZE(mv78xx0_ge00_shared_resources), 307794d15b2SStanislav Samsonov .resource = mv78xx0_ge00_shared_resources, 308794d15b2SStanislav Samsonov }; 309794d15b2SStanislav Samsonov 310794d15b2SStanislav Samsonov static struct resource mv78xx0_ge00_resources[] = { 311794d15b2SStanislav Samsonov { 312794d15b2SStanislav Samsonov .name = "ge00 irq", 313794d15b2SStanislav Samsonov .start = IRQ_MV78XX0_GE00_SUM, 314794d15b2SStanislav Samsonov .end = IRQ_MV78XX0_GE00_SUM, 315794d15b2SStanislav Samsonov .flags = IORESOURCE_IRQ, 316794d15b2SStanislav Samsonov }, 317794d15b2SStanislav Samsonov }; 318794d15b2SStanislav Samsonov 319794d15b2SStanislav Samsonov static struct platform_device mv78xx0_ge00 = { 320794d15b2SStanislav Samsonov .name = MV643XX_ETH_NAME, 321794d15b2SStanislav Samsonov .id = 0, 322794d15b2SStanislav Samsonov .num_resources = 1, 323794d15b2SStanislav Samsonov .resource = mv78xx0_ge00_resources, 324a49a018aSNicolas Pitre .dev = { 325a49a018aSNicolas Pitre .coherent_dma_mask = 0xffffffff, 326a49a018aSNicolas Pitre }, 327794d15b2SStanislav Samsonov }; 328794d15b2SStanislav Samsonov 329794d15b2SStanislav Samsonov void __init mv78xx0_ge00_init(struct mv643xx_eth_platform_data *eth_data) 330794d15b2SStanislav Samsonov { 331794d15b2SStanislav Samsonov eth_data->shared = &mv78xx0_ge00_shared; 332794d15b2SStanislav Samsonov mv78xx0_ge00.dev.platform_data = eth_data; 333794d15b2SStanislav Samsonov 334794d15b2SStanislav Samsonov platform_device_register(&mv78xx0_ge00_shared); 335794d15b2SStanislav Samsonov platform_device_register(&mv78xx0_ge00); 336794d15b2SStanislav Samsonov } 337794d15b2SStanislav Samsonov 338794d15b2SStanislav Samsonov 339794d15b2SStanislav Samsonov /***************************************************************************** 340794d15b2SStanislav Samsonov * GE01 341794d15b2SStanislav Samsonov ****************************************************************************/ 342794d15b2SStanislav Samsonov struct mv643xx_eth_shared_platform_data mv78xx0_ge01_shared_data = { 343794d15b2SStanislav Samsonov .t_clk = 0, 344794d15b2SStanislav Samsonov .dram = &mv78xx0_mbus_dram_info, 345fc0eb9f2SLennert Buytenhek .shared_smi = &mv78xx0_ge00_shared, 346794d15b2SStanislav Samsonov }; 347794d15b2SStanislav Samsonov 348794d15b2SStanislav Samsonov static struct resource mv78xx0_ge01_shared_resources[] = { 349794d15b2SStanislav Samsonov { 350794d15b2SStanislav Samsonov .name = "ge01 base", 351794d15b2SStanislav Samsonov .start = GE01_PHYS_BASE + 0x2000, 352794d15b2SStanislav Samsonov .end = GE01_PHYS_BASE + 0x3fff, 353794d15b2SStanislav Samsonov .flags = IORESOURCE_MEM, 354794d15b2SStanislav Samsonov }, 355794d15b2SStanislav Samsonov }; 356794d15b2SStanislav Samsonov 357794d15b2SStanislav Samsonov static struct platform_device mv78xx0_ge01_shared = { 358794d15b2SStanislav Samsonov .name = MV643XX_ETH_SHARED_NAME, 359794d15b2SStanislav Samsonov .id = 1, 360794d15b2SStanislav Samsonov .dev = { 361794d15b2SStanislav Samsonov .platform_data = &mv78xx0_ge01_shared_data, 362794d15b2SStanislav Samsonov }, 363794d15b2SStanislav Samsonov .num_resources = 1, 364794d15b2SStanislav Samsonov .resource = mv78xx0_ge01_shared_resources, 365794d15b2SStanislav Samsonov }; 366794d15b2SStanislav Samsonov 367794d15b2SStanislav Samsonov static struct resource mv78xx0_ge01_resources[] = { 368794d15b2SStanislav Samsonov { 369794d15b2SStanislav Samsonov .name = "ge01 irq", 370794d15b2SStanislav Samsonov .start = IRQ_MV78XX0_GE01_SUM, 371794d15b2SStanislav Samsonov .end = IRQ_MV78XX0_GE01_SUM, 372794d15b2SStanislav Samsonov .flags = IORESOURCE_IRQ, 373794d15b2SStanislav Samsonov }, 374794d15b2SStanislav Samsonov }; 375794d15b2SStanislav Samsonov 376794d15b2SStanislav Samsonov static struct platform_device mv78xx0_ge01 = { 377794d15b2SStanislav Samsonov .name = MV643XX_ETH_NAME, 378794d15b2SStanislav Samsonov .id = 1, 379794d15b2SStanislav Samsonov .num_resources = 1, 380794d15b2SStanislav Samsonov .resource = mv78xx0_ge01_resources, 381a49a018aSNicolas Pitre .dev = { 382a49a018aSNicolas Pitre .coherent_dma_mask = 0xffffffff, 383a49a018aSNicolas Pitre }, 384794d15b2SStanislav Samsonov }; 385794d15b2SStanislav Samsonov 386794d15b2SStanislav Samsonov void __init mv78xx0_ge01_init(struct mv643xx_eth_platform_data *eth_data) 387794d15b2SStanislav Samsonov { 388794d15b2SStanislav Samsonov eth_data->shared = &mv78xx0_ge01_shared; 389794d15b2SStanislav Samsonov mv78xx0_ge01.dev.platform_data = eth_data; 390794d15b2SStanislav Samsonov 391794d15b2SStanislav Samsonov platform_device_register(&mv78xx0_ge01_shared); 392794d15b2SStanislav Samsonov platform_device_register(&mv78xx0_ge01); 393794d15b2SStanislav Samsonov } 394794d15b2SStanislav Samsonov 395794d15b2SStanislav Samsonov 396794d15b2SStanislav Samsonov /***************************************************************************** 397794d15b2SStanislav Samsonov * GE10 398794d15b2SStanislav Samsonov ****************************************************************************/ 399794d15b2SStanislav Samsonov struct mv643xx_eth_shared_platform_data mv78xx0_ge10_shared_data = { 400794d15b2SStanislav Samsonov .t_clk = 0, 401794d15b2SStanislav Samsonov .dram = &mv78xx0_mbus_dram_info, 402fc0eb9f2SLennert Buytenhek .shared_smi = &mv78xx0_ge00_shared, 403794d15b2SStanislav Samsonov }; 404794d15b2SStanislav Samsonov 405794d15b2SStanislav Samsonov static struct resource mv78xx0_ge10_shared_resources[] = { 406794d15b2SStanislav Samsonov { 407794d15b2SStanislav Samsonov .name = "ge10 base", 408794d15b2SStanislav Samsonov .start = GE10_PHYS_BASE + 0x2000, 409794d15b2SStanislav Samsonov .end = GE10_PHYS_BASE + 0x3fff, 410794d15b2SStanislav Samsonov .flags = IORESOURCE_MEM, 411794d15b2SStanislav Samsonov }, 412794d15b2SStanislav Samsonov }; 413794d15b2SStanislav Samsonov 414794d15b2SStanislav Samsonov static struct platform_device mv78xx0_ge10_shared = { 415794d15b2SStanislav Samsonov .name = MV643XX_ETH_SHARED_NAME, 416794d15b2SStanislav Samsonov .id = 2, 417794d15b2SStanislav Samsonov .dev = { 418794d15b2SStanislav Samsonov .platform_data = &mv78xx0_ge10_shared_data, 419794d15b2SStanislav Samsonov }, 420794d15b2SStanislav Samsonov .num_resources = 1, 421794d15b2SStanislav Samsonov .resource = mv78xx0_ge10_shared_resources, 422794d15b2SStanislav Samsonov }; 423794d15b2SStanislav Samsonov 424794d15b2SStanislav Samsonov static struct resource mv78xx0_ge10_resources[] = { 425794d15b2SStanislav Samsonov { 426794d15b2SStanislav Samsonov .name = "ge10 irq", 427794d15b2SStanislav Samsonov .start = IRQ_MV78XX0_GE10_SUM, 428794d15b2SStanislav Samsonov .end = IRQ_MV78XX0_GE10_SUM, 429794d15b2SStanislav Samsonov .flags = IORESOURCE_IRQ, 430794d15b2SStanislav Samsonov }, 431794d15b2SStanislav Samsonov }; 432794d15b2SStanislav Samsonov 433794d15b2SStanislav Samsonov static struct platform_device mv78xx0_ge10 = { 434794d15b2SStanislav Samsonov .name = MV643XX_ETH_NAME, 435794d15b2SStanislav Samsonov .id = 2, 436794d15b2SStanislav Samsonov .num_resources = 1, 437794d15b2SStanislav Samsonov .resource = mv78xx0_ge10_resources, 438a49a018aSNicolas Pitre .dev = { 439a49a018aSNicolas Pitre .coherent_dma_mask = 0xffffffff, 440a49a018aSNicolas Pitre }, 441794d15b2SStanislav Samsonov }; 442794d15b2SStanislav Samsonov 443794d15b2SStanislav Samsonov void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data) 444794d15b2SStanislav Samsonov { 445712424fdSLennert Buytenhek u32 dev, rev; 446712424fdSLennert Buytenhek 447794d15b2SStanislav Samsonov eth_data->shared = &mv78xx0_ge10_shared; 448794d15b2SStanislav Samsonov mv78xx0_ge10.dev.platform_data = eth_data; 449794d15b2SStanislav Samsonov 450712424fdSLennert Buytenhek /* 451712424fdSLennert Buytenhek * On the Z0, ge10 and ge11 are internally connected back 452712424fdSLennert Buytenhek * to back, and not brought out. 453712424fdSLennert Buytenhek */ 454712424fdSLennert Buytenhek mv78xx0_pcie_id(&dev, &rev); 455712424fdSLennert Buytenhek if (dev == MV78X00_Z0_DEV_ID) { 456712424fdSLennert Buytenhek eth_data->phy_addr = MV643XX_ETH_PHY_NONE; 457712424fdSLennert Buytenhek eth_data->speed = SPEED_1000; 458712424fdSLennert Buytenhek eth_data->duplex = DUPLEX_FULL; 459712424fdSLennert Buytenhek } 460712424fdSLennert Buytenhek 461794d15b2SStanislav Samsonov platform_device_register(&mv78xx0_ge10_shared); 462794d15b2SStanislav Samsonov platform_device_register(&mv78xx0_ge10); 463794d15b2SStanislav Samsonov } 464794d15b2SStanislav Samsonov 465794d15b2SStanislav Samsonov 466794d15b2SStanislav Samsonov /***************************************************************************** 467794d15b2SStanislav Samsonov * GE11 468794d15b2SStanislav Samsonov ****************************************************************************/ 469794d15b2SStanislav Samsonov struct mv643xx_eth_shared_platform_data mv78xx0_ge11_shared_data = { 470794d15b2SStanislav Samsonov .t_clk = 0, 471794d15b2SStanislav Samsonov .dram = &mv78xx0_mbus_dram_info, 472fc0eb9f2SLennert Buytenhek .shared_smi = &mv78xx0_ge00_shared, 473794d15b2SStanislav Samsonov }; 474794d15b2SStanislav Samsonov 475794d15b2SStanislav Samsonov static struct resource mv78xx0_ge11_shared_resources[] = { 476794d15b2SStanislav Samsonov { 477794d15b2SStanislav Samsonov .name = "ge11 base", 478794d15b2SStanislav Samsonov .start = GE11_PHYS_BASE + 0x2000, 479794d15b2SStanislav Samsonov .end = GE11_PHYS_BASE + 0x3fff, 480794d15b2SStanislav Samsonov .flags = IORESOURCE_MEM, 481794d15b2SStanislav Samsonov }, 482794d15b2SStanislav Samsonov }; 483794d15b2SStanislav Samsonov 484794d15b2SStanislav Samsonov static struct platform_device mv78xx0_ge11_shared = { 485794d15b2SStanislav Samsonov .name = MV643XX_ETH_SHARED_NAME, 486794d15b2SStanislav Samsonov .id = 3, 487794d15b2SStanislav Samsonov .dev = { 488794d15b2SStanislav Samsonov .platform_data = &mv78xx0_ge11_shared_data, 489794d15b2SStanislav Samsonov }, 490794d15b2SStanislav Samsonov .num_resources = 1, 491794d15b2SStanislav Samsonov .resource = mv78xx0_ge11_shared_resources, 492794d15b2SStanislav Samsonov }; 493794d15b2SStanislav Samsonov 494794d15b2SStanislav Samsonov static struct resource mv78xx0_ge11_resources[] = { 495794d15b2SStanislav Samsonov { 496794d15b2SStanislav Samsonov .name = "ge11 irq", 497794d15b2SStanislav Samsonov .start = IRQ_MV78XX0_GE11_SUM, 498794d15b2SStanislav Samsonov .end = IRQ_MV78XX0_GE11_SUM, 499794d15b2SStanislav Samsonov .flags = IORESOURCE_IRQ, 500794d15b2SStanislav Samsonov }, 501794d15b2SStanislav Samsonov }; 502794d15b2SStanislav Samsonov 503794d15b2SStanislav Samsonov static struct platform_device mv78xx0_ge11 = { 504794d15b2SStanislav Samsonov .name = MV643XX_ETH_NAME, 505794d15b2SStanislav Samsonov .id = 3, 506794d15b2SStanislav Samsonov .num_resources = 1, 507794d15b2SStanislav Samsonov .resource = mv78xx0_ge11_resources, 508a49a018aSNicolas Pitre .dev = { 509a49a018aSNicolas Pitre .coherent_dma_mask = 0xffffffff, 510a49a018aSNicolas Pitre }, 511794d15b2SStanislav Samsonov }; 512794d15b2SStanislav Samsonov 513794d15b2SStanislav Samsonov void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data) 514794d15b2SStanislav Samsonov { 515712424fdSLennert Buytenhek u32 dev, rev; 516712424fdSLennert Buytenhek 517794d15b2SStanislav Samsonov eth_data->shared = &mv78xx0_ge11_shared; 518794d15b2SStanislav Samsonov mv78xx0_ge11.dev.platform_data = eth_data; 519794d15b2SStanislav Samsonov 520712424fdSLennert Buytenhek /* 521712424fdSLennert Buytenhek * On the Z0, ge10 and ge11 are internally connected back 522712424fdSLennert Buytenhek * to back, and not brought out. 523712424fdSLennert Buytenhek */ 524712424fdSLennert Buytenhek mv78xx0_pcie_id(&dev, &rev); 525712424fdSLennert Buytenhek if (dev == MV78X00_Z0_DEV_ID) { 526712424fdSLennert Buytenhek eth_data->phy_addr = MV643XX_ETH_PHY_NONE; 527712424fdSLennert Buytenhek eth_data->speed = SPEED_1000; 528712424fdSLennert Buytenhek eth_data->duplex = DUPLEX_FULL; 529712424fdSLennert Buytenhek } 530712424fdSLennert Buytenhek 531794d15b2SStanislav Samsonov platform_device_register(&mv78xx0_ge11_shared); 532794d15b2SStanislav Samsonov platform_device_register(&mv78xx0_ge11); 533794d15b2SStanislav Samsonov } 534794d15b2SStanislav Samsonov 53569359943SRiku Voipio /***************************************************************************** 53669359943SRiku Voipio * I2C bus 0 53769359943SRiku Voipio ****************************************************************************/ 53869359943SRiku Voipio 53969359943SRiku Voipio static struct mv64xxx_i2c_pdata mv78xx0_i2c_0_pdata = { 54069359943SRiku Voipio .freq_m = 8, /* assumes 166 MHz TCLK */ 54169359943SRiku Voipio .freq_n = 3, 54269359943SRiku Voipio .timeout = 1000, /* Default timeout of 1 second */ 54369359943SRiku Voipio }; 54469359943SRiku Voipio 54569359943SRiku Voipio static struct resource mv78xx0_i2c_0_resources[] = { 54669359943SRiku Voipio { 54769359943SRiku Voipio .start = I2C_0_PHYS_BASE, 54869359943SRiku Voipio .end = I2C_0_PHYS_BASE + 0x1f, 54969359943SRiku Voipio .flags = IORESOURCE_MEM, 55069359943SRiku Voipio }, { 55169359943SRiku Voipio .start = IRQ_MV78XX0_I2C_0, 55269359943SRiku Voipio .end = IRQ_MV78XX0_I2C_0, 55369359943SRiku Voipio .flags = IORESOURCE_IRQ, 55469359943SRiku Voipio }, 55569359943SRiku Voipio }; 55669359943SRiku Voipio 55769359943SRiku Voipio 55869359943SRiku Voipio static struct platform_device mv78xx0_i2c_0 = { 55969359943SRiku Voipio .name = MV64XXX_I2C_CTLR_NAME, 56069359943SRiku Voipio .id = 0, 56169359943SRiku Voipio .num_resources = ARRAY_SIZE(mv78xx0_i2c_0_resources), 56269359943SRiku Voipio .resource = mv78xx0_i2c_0_resources, 56369359943SRiku Voipio .dev = { 56469359943SRiku Voipio .platform_data = &mv78xx0_i2c_0_pdata, 56569359943SRiku Voipio }, 56669359943SRiku Voipio }; 56769359943SRiku Voipio 56869359943SRiku Voipio /***************************************************************************** 56969359943SRiku Voipio * I2C bus 1 57069359943SRiku Voipio ****************************************************************************/ 57169359943SRiku Voipio 57269359943SRiku Voipio static struct mv64xxx_i2c_pdata mv78xx0_i2c_1_pdata = { 57369359943SRiku Voipio .freq_m = 8, /* assumes 166 MHz TCLK */ 57469359943SRiku Voipio .freq_n = 3, 57569359943SRiku Voipio .timeout = 1000, /* Default timeout of 1 second */ 57669359943SRiku Voipio }; 57769359943SRiku Voipio 57869359943SRiku Voipio static struct resource mv78xx0_i2c_1_resources[] = { 57969359943SRiku Voipio { 58069359943SRiku Voipio .start = I2C_1_PHYS_BASE, 58169359943SRiku Voipio .end = I2C_1_PHYS_BASE + 0x1f, 58269359943SRiku Voipio .flags = IORESOURCE_MEM, 58369359943SRiku Voipio }, { 58469359943SRiku Voipio .start = IRQ_MV78XX0_I2C_1, 58569359943SRiku Voipio .end = IRQ_MV78XX0_I2C_1, 58669359943SRiku Voipio .flags = IORESOURCE_IRQ, 58769359943SRiku Voipio }, 58869359943SRiku Voipio }; 58969359943SRiku Voipio 59069359943SRiku Voipio 59169359943SRiku Voipio static struct platform_device mv78xx0_i2c_1 = { 59269359943SRiku Voipio .name = MV64XXX_I2C_CTLR_NAME, 59369359943SRiku Voipio .id = 1, 59469359943SRiku Voipio .num_resources = ARRAY_SIZE(mv78xx0_i2c_1_resources), 59569359943SRiku Voipio .resource = mv78xx0_i2c_1_resources, 59669359943SRiku Voipio .dev = { 59769359943SRiku Voipio .platform_data = &mv78xx0_i2c_1_pdata, 59869359943SRiku Voipio }, 59969359943SRiku Voipio }; 60069359943SRiku Voipio 60169359943SRiku Voipio void __init mv78xx0_i2c_init(void) 60269359943SRiku Voipio { 60369359943SRiku Voipio platform_device_register(&mv78xx0_i2c_0); 60469359943SRiku Voipio platform_device_register(&mv78xx0_i2c_1); 60569359943SRiku Voipio } 606794d15b2SStanislav Samsonov 607794d15b2SStanislav Samsonov /***************************************************************************** 608794d15b2SStanislav Samsonov * SATA 609794d15b2SStanislav Samsonov ****************************************************************************/ 610794d15b2SStanislav Samsonov static struct resource mv78xx0_sata_resources[] = { 611794d15b2SStanislav Samsonov { 612794d15b2SStanislav Samsonov .name = "sata base", 613794d15b2SStanislav Samsonov .start = SATA_PHYS_BASE, 614794d15b2SStanislav Samsonov .end = SATA_PHYS_BASE + 0x5000 - 1, 615794d15b2SStanislav Samsonov .flags = IORESOURCE_MEM, 616794d15b2SStanislav Samsonov }, { 617794d15b2SStanislav Samsonov .name = "sata irq", 618794d15b2SStanislav Samsonov .start = IRQ_MV78XX0_SATA, 619794d15b2SStanislav Samsonov .end = IRQ_MV78XX0_SATA, 620794d15b2SStanislav Samsonov .flags = IORESOURCE_IRQ, 621794d15b2SStanislav Samsonov }, 622794d15b2SStanislav Samsonov }; 623794d15b2SStanislav Samsonov 624794d15b2SStanislav Samsonov static struct platform_device mv78xx0_sata = { 625794d15b2SStanislav Samsonov .name = "sata_mv", 626794d15b2SStanislav Samsonov .id = 0, 627794d15b2SStanislav Samsonov .dev = { 628794d15b2SStanislav Samsonov .coherent_dma_mask = 0xffffffff, 629794d15b2SStanislav Samsonov }, 630794d15b2SStanislav Samsonov .num_resources = ARRAY_SIZE(mv78xx0_sata_resources), 631794d15b2SStanislav Samsonov .resource = mv78xx0_sata_resources, 632794d15b2SStanislav Samsonov }; 633794d15b2SStanislav Samsonov 634794d15b2SStanislav Samsonov void __init mv78xx0_sata_init(struct mv_sata_platform_data *sata_data) 635794d15b2SStanislav Samsonov { 636794d15b2SStanislav Samsonov sata_data->dram = &mv78xx0_mbus_dram_info; 637794d15b2SStanislav Samsonov mv78xx0_sata.dev.platform_data = sata_data; 638794d15b2SStanislav Samsonov platform_device_register(&mv78xx0_sata); 639794d15b2SStanislav Samsonov } 640794d15b2SStanislav Samsonov 641794d15b2SStanislav Samsonov 642794d15b2SStanislav Samsonov /***************************************************************************** 643794d15b2SStanislav Samsonov * UART0 644794d15b2SStanislav Samsonov ****************************************************************************/ 645794d15b2SStanislav Samsonov static struct plat_serial8250_port mv78xx0_uart0_data[] = { 646794d15b2SStanislav Samsonov { 647794d15b2SStanislav Samsonov .mapbase = UART0_PHYS_BASE, 648794d15b2SStanislav Samsonov .membase = (char *)UART0_VIRT_BASE, 649794d15b2SStanislav Samsonov .irq = IRQ_MV78XX0_UART_0, 650794d15b2SStanislav Samsonov .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 651794d15b2SStanislav Samsonov .iotype = UPIO_MEM, 652794d15b2SStanislav Samsonov .regshift = 2, 653794d15b2SStanislav Samsonov .uartclk = 0, 654794d15b2SStanislav Samsonov }, { 655794d15b2SStanislav Samsonov }, 656794d15b2SStanislav Samsonov }; 657794d15b2SStanislav Samsonov 658794d15b2SStanislav Samsonov static struct resource mv78xx0_uart0_resources[] = { 659794d15b2SStanislav Samsonov { 660794d15b2SStanislav Samsonov .start = UART0_PHYS_BASE, 661794d15b2SStanislav Samsonov .end = UART0_PHYS_BASE + 0xff, 662794d15b2SStanislav Samsonov .flags = IORESOURCE_MEM, 663794d15b2SStanislav Samsonov }, { 664794d15b2SStanislav Samsonov .start = IRQ_MV78XX0_UART_0, 665794d15b2SStanislav Samsonov .end = IRQ_MV78XX0_UART_0, 666794d15b2SStanislav Samsonov .flags = IORESOURCE_IRQ, 667794d15b2SStanislav Samsonov }, 668794d15b2SStanislav Samsonov }; 669794d15b2SStanislav Samsonov 670794d15b2SStanislav Samsonov static struct platform_device mv78xx0_uart0 = { 671794d15b2SStanislav Samsonov .name = "serial8250", 672794d15b2SStanislav Samsonov .id = 0, 673794d15b2SStanislav Samsonov .dev = { 674794d15b2SStanislav Samsonov .platform_data = mv78xx0_uart0_data, 675794d15b2SStanislav Samsonov }, 676794d15b2SStanislav Samsonov .resource = mv78xx0_uart0_resources, 677794d15b2SStanislav Samsonov .num_resources = ARRAY_SIZE(mv78xx0_uart0_resources), 678794d15b2SStanislav Samsonov }; 679794d15b2SStanislav Samsonov 680794d15b2SStanislav Samsonov void __init mv78xx0_uart0_init(void) 681794d15b2SStanislav Samsonov { 682794d15b2SStanislav Samsonov platform_device_register(&mv78xx0_uart0); 683794d15b2SStanislav Samsonov } 684794d15b2SStanislav Samsonov 685794d15b2SStanislav Samsonov 686794d15b2SStanislav Samsonov /***************************************************************************** 687794d15b2SStanislav Samsonov * UART1 688794d15b2SStanislav Samsonov ****************************************************************************/ 689794d15b2SStanislav Samsonov static struct plat_serial8250_port mv78xx0_uart1_data[] = { 690794d15b2SStanislav Samsonov { 691794d15b2SStanislav Samsonov .mapbase = UART1_PHYS_BASE, 692794d15b2SStanislav Samsonov .membase = (char *)UART1_VIRT_BASE, 693794d15b2SStanislav Samsonov .irq = IRQ_MV78XX0_UART_1, 694794d15b2SStanislav Samsonov .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 695794d15b2SStanislav Samsonov .iotype = UPIO_MEM, 696794d15b2SStanislav Samsonov .regshift = 2, 697794d15b2SStanislav Samsonov .uartclk = 0, 698794d15b2SStanislav Samsonov }, { 699794d15b2SStanislav Samsonov }, 700794d15b2SStanislav Samsonov }; 701794d15b2SStanislav Samsonov 702794d15b2SStanislav Samsonov static struct resource mv78xx0_uart1_resources[] = { 703794d15b2SStanislav Samsonov { 704794d15b2SStanislav Samsonov .start = UART1_PHYS_BASE, 705794d15b2SStanislav Samsonov .end = UART1_PHYS_BASE + 0xff, 706794d15b2SStanislav Samsonov .flags = IORESOURCE_MEM, 707794d15b2SStanislav Samsonov }, { 708794d15b2SStanislav Samsonov .start = IRQ_MV78XX0_UART_1, 709794d15b2SStanislav Samsonov .end = IRQ_MV78XX0_UART_1, 710794d15b2SStanislav Samsonov .flags = IORESOURCE_IRQ, 711794d15b2SStanislav Samsonov }, 712794d15b2SStanislav Samsonov }; 713794d15b2SStanislav Samsonov 714794d15b2SStanislav Samsonov static struct platform_device mv78xx0_uart1 = { 715794d15b2SStanislav Samsonov .name = "serial8250", 716794d15b2SStanislav Samsonov .id = 1, 717794d15b2SStanislav Samsonov .dev = { 718794d15b2SStanislav Samsonov .platform_data = mv78xx0_uart1_data, 719794d15b2SStanislav Samsonov }, 720794d15b2SStanislav Samsonov .resource = mv78xx0_uart1_resources, 721794d15b2SStanislav Samsonov .num_resources = ARRAY_SIZE(mv78xx0_uart1_resources), 722794d15b2SStanislav Samsonov }; 723794d15b2SStanislav Samsonov 724794d15b2SStanislav Samsonov void __init mv78xx0_uart1_init(void) 725794d15b2SStanislav Samsonov { 726794d15b2SStanislav Samsonov platform_device_register(&mv78xx0_uart1); 727794d15b2SStanislav Samsonov } 728794d15b2SStanislav Samsonov 729794d15b2SStanislav Samsonov 730794d15b2SStanislav Samsonov /***************************************************************************** 731794d15b2SStanislav Samsonov * UART2 732794d15b2SStanislav Samsonov ****************************************************************************/ 733794d15b2SStanislav Samsonov static struct plat_serial8250_port mv78xx0_uart2_data[] = { 734794d15b2SStanislav Samsonov { 735794d15b2SStanislav Samsonov .mapbase = UART2_PHYS_BASE, 736794d15b2SStanislav Samsonov .membase = (char *)UART2_VIRT_BASE, 737794d15b2SStanislav Samsonov .irq = IRQ_MV78XX0_UART_2, 738794d15b2SStanislav Samsonov .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 739794d15b2SStanislav Samsonov .iotype = UPIO_MEM, 740794d15b2SStanislav Samsonov .regshift = 2, 741794d15b2SStanislav Samsonov .uartclk = 0, 742794d15b2SStanislav Samsonov }, { 743794d15b2SStanislav Samsonov }, 744794d15b2SStanislav Samsonov }; 745794d15b2SStanislav Samsonov 746794d15b2SStanislav Samsonov static struct resource mv78xx0_uart2_resources[] = { 747794d15b2SStanislav Samsonov { 748794d15b2SStanislav Samsonov .start = UART2_PHYS_BASE, 749794d15b2SStanislav Samsonov .end = UART2_PHYS_BASE + 0xff, 750794d15b2SStanislav Samsonov .flags = IORESOURCE_MEM, 751794d15b2SStanislav Samsonov }, { 752794d15b2SStanislav Samsonov .start = IRQ_MV78XX0_UART_2, 753794d15b2SStanislav Samsonov .end = IRQ_MV78XX0_UART_2, 754794d15b2SStanislav Samsonov .flags = IORESOURCE_IRQ, 755794d15b2SStanislav Samsonov }, 756794d15b2SStanislav Samsonov }; 757794d15b2SStanislav Samsonov 758794d15b2SStanislav Samsonov static struct platform_device mv78xx0_uart2 = { 759794d15b2SStanislav Samsonov .name = "serial8250", 760794d15b2SStanislav Samsonov .id = 2, 761794d15b2SStanislav Samsonov .dev = { 762794d15b2SStanislav Samsonov .platform_data = mv78xx0_uart2_data, 763794d15b2SStanislav Samsonov }, 764794d15b2SStanislav Samsonov .resource = mv78xx0_uart2_resources, 765794d15b2SStanislav Samsonov .num_resources = ARRAY_SIZE(mv78xx0_uart2_resources), 766794d15b2SStanislav Samsonov }; 767794d15b2SStanislav Samsonov 768794d15b2SStanislav Samsonov void __init mv78xx0_uart2_init(void) 769794d15b2SStanislav Samsonov { 770794d15b2SStanislav Samsonov platform_device_register(&mv78xx0_uart2); 771794d15b2SStanislav Samsonov } 772794d15b2SStanislav Samsonov 773794d15b2SStanislav Samsonov 774794d15b2SStanislav Samsonov /***************************************************************************** 775794d15b2SStanislav Samsonov * UART3 776794d15b2SStanislav Samsonov ****************************************************************************/ 777794d15b2SStanislav Samsonov static struct plat_serial8250_port mv78xx0_uart3_data[] = { 778794d15b2SStanislav Samsonov { 779794d15b2SStanislav Samsonov .mapbase = UART3_PHYS_BASE, 780794d15b2SStanislav Samsonov .membase = (char *)UART3_VIRT_BASE, 781794d15b2SStanislav Samsonov .irq = IRQ_MV78XX0_UART_3, 782794d15b2SStanislav Samsonov .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 783794d15b2SStanislav Samsonov .iotype = UPIO_MEM, 784794d15b2SStanislav Samsonov .regshift = 2, 785794d15b2SStanislav Samsonov .uartclk = 0, 786794d15b2SStanislav Samsonov }, { 787794d15b2SStanislav Samsonov }, 788794d15b2SStanislav Samsonov }; 789794d15b2SStanislav Samsonov 790794d15b2SStanislav Samsonov static struct resource mv78xx0_uart3_resources[] = { 791794d15b2SStanislav Samsonov { 792794d15b2SStanislav Samsonov .start = UART3_PHYS_BASE, 793794d15b2SStanislav Samsonov .end = UART3_PHYS_BASE + 0xff, 794794d15b2SStanislav Samsonov .flags = IORESOURCE_MEM, 795794d15b2SStanislav Samsonov }, { 796794d15b2SStanislav Samsonov .start = IRQ_MV78XX0_UART_3, 797794d15b2SStanislav Samsonov .end = IRQ_MV78XX0_UART_3, 798794d15b2SStanislav Samsonov .flags = IORESOURCE_IRQ, 799794d15b2SStanislav Samsonov }, 800794d15b2SStanislav Samsonov }; 801794d15b2SStanislav Samsonov 802794d15b2SStanislav Samsonov static struct platform_device mv78xx0_uart3 = { 803794d15b2SStanislav Samsonov .name = "serial8250", 804794d15b2SStanislav Samsonov .id = 3, 805794d15b2SStanislav Samsonov .dev = { 806794d15b2SStanislav Samsonov .platform_data = mv78xx0_uart3_data, 807794d15b2SStanislav Samsonov }, 808794d15b2SStanislav Samsonov .resource = mv78xx0_uart3_resources, 809794d15b2SStanislav Samsonov .num_resources = ARRAY_SIZE(mv78xx0_uart3_resources), 810794d15b2SStanislav Samsonov }; 811794d15b2SStanislav Samsonov 812794d15b2SStanislav Samsonov void __init mv78xx0_uart3_init(void) 813794d15b2SStanislav Samsonov { 814794d15b2SStanislav Samsonov platform_device_register(&mv78xx0_uart3); 815794d15b2SStanislav Samsonov } 816794d15b2SStanislav Samsonov 817794d15b2SStanislav Samsonov 818794d15b2SStanislav Samsonov /***************************************************************************** 819794d15b2SStanislav Samsonov * Time handling 820794d15b2SStanislav Samsonov ****************************************************************************/ 821794d15b2SStanislav Samsonov static void mv78xx0_timer_init(void) 822794d15b2SStanislav Samsonov { 823794d15b2SStanislav Samsonov orion_time_init(IRQ_MV78XX0_TIMER_1, get_tclk()); 824794d15b2SStanislav Samsonov } 825794d15b2SStanislav Samsonov 826794d15b2SStanislav Samsonov struct sys_timer mv78xx0_timer = { 827794d15b2SStanislav Samsonov .init = mv78xx0_timer_init, 828794d15b2SStanislav Samsonov }; 829794d15b2SStanislav Samsonov 830794d15b2SStanislav Samsonov 831794d15b2SStanislav Samsonov /***************************************************************************** 832794d15b2SStanislav Samsonov * General 833794d15b2SStanislav Samsonov ****************************************************************************/ 834cfdeb637SLennert Buytenhek static char * __init mv78xx0_id(void) 835cfdeb637SLennert Buytenhek { 836cfdeb637SLennert Buytenhek u32 dev, rev; 837cfdeb637SLennert Buytenhek 838cfdeb637SLennert Buytenhek mv78xx0_pcie_id(&dev, &rev); 839cfdeb637SLennert Buytenhek 840cfdeb637SLennert Buytenhek if (dev == MV78X00_Z0_DEV_ID) { 841cfdeb637SLennert Buytenhek if (rev == MV78X00_REV_Z0) 842cfdeb637SLennert Buytenhek return "MV78X00-Z0"; 843cfdeb637SLennert Buytenhek else 844cfdeb637SLennert Buytenhek return "MV78X00-Rev-Unsupported"; 845cfdeb637SLennert Buytenhek } else if (dev == MV78100_DEV_ID) { 846cfdeb637SLennert Buytenhek if (rev == MV78100_REV_A0) 847cfdeb637SLennert Buytenhek return "MV78100-A0"; 848662aecedSLennert Buytenhek else if (rev == MV78100_REV_A1) 849662aecedSLennert Buytenhek return "MV78100-A1"; 850cfdeb637SLennert Buytenhek else 851cfdeb637SLennert Buytenhek return "MV78100-Rev-Unsupported"; 852cfdeb637SLennert Buytenhek } else if (dev == MV78200_DEV_ID) { 853cfdeb637SLennert Buytenhek if (rev == MV78100_REV_A0) 854cfdeb637SLennert Buytenhek return "MV78200-A0"; 855cfdeb637SLennert Buytenhek else 856cfdeb637SLennert Buytenhek return "MV78200-Rev-Unsupported"; 857cfdeb637SLennert Buytenhek } else { 858cfdeb637SLennert Buytenhek return "Device-Unknown"; 859cfdeb637SLennert Buytenhek } 860cfdeb637SLennert Buytenhek } 861cfdeb637SLennert Buytenhek 862794d15b2SStanislav Samsonov static int __init is_l2_writethrough(void) 863794d15b2SStanislav Samsonov { 864794d15b2SStanislav Samsonov return !!(readl(CPU_CONTROL) & L2_WRITETHROUGH); 865794d15b2SStanislav Samsonov } 866794d15b2SStanislav Samsonov 867794d15b2SStanislav Samsonov void __init mv78xx0_init(void) 868794d15b2SStanislav Samsonov { 869794d15b2SStanislav Samsonov int core_index; 870794d15b2SStanislav Samsonov int hclk; 871794d15b2SStanislav Samsonov int pclk; 872794d15b2SStanislav Samsonov int l2clk; 873794d15b2SStanislav Samsonov int tclk; 874794d15b2SStanislav Samsonov 875794d15b2SStanislav Samsonov core_index = mv78xx0_core_index(); 876794d15b2SStanislav Samsonov hclk = get_hclk(); 877794d15b2SStanislav Samsonov get_pclk_l2clk(hclk, core_index, &pclk, &l2clk); 878794d15b2SStanislav Samsonov tclk = get_tclk(); 879794d15b2SStanislav Samsonov 880cfdeb637SLennert Buytenhek printk(KERN_INFO "%s ", mv78xx0_id()); 881cfdeb637SLennert Buytenhek printk("core #%d, ", core_index); 882794d15b2SStanislav Samsonov printk("PCLK = %dMHz, ", (pclk + 499999) / 1000000); 883794d15b2SStanislav Samsonov printk("L2 = %dMHz, ", (l2clk + 499999) / 1000000); 884794d15b2SStanislav Samsonov printk("HCLK = %dMHz, ", (hclk + 499999) / 1000000); 885794d15b2SStanislav Samsonov printk("TCLK = %dMHz\n", (tclk + 499999) / 1000000); 886794d15b2SStanislav Samsonov 887794d15b2SStanislav Samsonov mv78xx0_setup_cpu_mbus(); 888794d15b2SStanislav Samsonov 889794d15b2SStanislav Samsonov #ifdef CONFIG_CACHE_FEROCEON_L2 890794d15b2SStanislav Samsonov feroceon_l2_init(is_l2_writethrough()); 891794d15b2SStanislav Samsonov #endif 892794d15b2SStanislav Samsonov 893794d15b2SStanislav Samsonov mv78xx0_ge00_shared_data.t_clk = tclk; 894794d15b2SStanislav Samsonov mv78xx0_ge01_shared_data.t_clk = tclk; 895794d15b2SStanislav Samsonov mv78xx0_ge10_shared_data.t_clk = tclk; 896794d15b2SStanislav Samsonov mv78xx0_ge11_shared_data.t_clk = tclk; 897794d15b2SStanislav Samsonov mv78xx0_uart0_data[0].uartclk = tclk; 898794d15b2SStanislav Samsonov mv78xx0_uart1_data[0].uartclk = tclk; 899794d15b2SStanislav Samsonov mv78xx0_uart2_data[0].uartclk = tclk; 900794d15b2SStanislav Samsonov mv78xx0_uart3_data[0].uartclk = tclk; 901794d15b2SStanislav Samsonov } 902