xref: /openbmc/linux/arch/arm/mach-mmp/addr-map.h (revision b501fd7b)
1b501fd7bSArnd Bergmann /*
2b501fd7bSArnd Bergmann  *   Common address map definitions
3b501fd7bSArnd Bergmann  *
4b501fd7bSArnd Bergmann  * This program is free software; you can redistribute it and/or modify
5b501fd7bSArnd Bergmann  * it under the terms of the GNU General Public License version 2 as
6b501fd7bSArnd Bergmann  * published by the Free Software Foundation.
7b501fd7bSArnd Bergmann  */
8b501fd7bSArnd Bergmann 
9b501fd7bSArnd Bergmann #ifndef __ASM_MACH_ADDR_MAP_H
10b501fd7bSArnd Bergmann #define __ASM_MACH_ADDR_MAP_H
11b501fd7bSArnd Bergmann 
12b501fd7bSArnd Bergmann /* APB - Application Subsystem Peripheral Bus
13b501fd7bSArnd Bergmann  *
14b501fd7bSArnd Bergmann  * NOTE: the DMA controller registers are actually on the AXI fabric #1
15b501fd7bSArnd Bergmann  * slave port to AHB/APB bridge, due to its close relationship to those
16b501fd7bSArnd Bergmann  * peripherals on APB, let's count it into the ABP mapping area.
17b501fd7bSArnd Bergmann  */
18b501fd7bSArnd Bergmann #define APB_PHYS_BASE		0xd4000000
19b501fd7bSArnd Bergmann #define APB_VIRT_BASE		IOMEM(0xfe000000)
20b501fd7bSArnd Bergmann #define APB_PHYS_SIZE		0x00200000
21b501fd7bSArnd Bergmann 
22b501fd7bSArnd Bergmann #define AXI_PHYS_BASE		0xd4200000
23b501fd7bSArnd Bergmann #define AXI_VIRT_BASE		IOMEM(0xfe200000)
24b501fd7bSArnd Bergmann #define AXI_PHYS_SIZE		0x00200000
25b501fd7bSArnd Bergmann 
26b501fd7bSArnd Bergmann /* Static Memory Controller - Chip Select 0 and 1 */
27b501fd7bSArnd Bergmann #define SMC_CS0_PHYS_BASE	0x80000000
28b501fd7bSArnd Bergmann #define SMC_CS0_PHYS_SIZE	0x10000000
29b501fd7bSArnd Bergmann #define SMC_CS1_PHYS_BASE	0x90000000
30b501fd7bSArnd Bergmann #define SMC_CS1_PHYS_SIZE	0x10000000
31b501fd7bSArnd Bergmann 
32b501fd7bSArnd Bergmann #define APMU_VIRT_BASE		(AXI_VIRT_BASE + 0x82800)
33b501fd7bSArnd Bergmann #define APMU_REG(x)		(APMU_VIRT_BASE + (x))
34b501fd7bSArnd Bergmann 
35b501fd7bSArnd Bergmann #define APBC_VIRT_BASE		(APB_VIRT_BASE + 0x015000)
36b501fd7bSArnd Bergmann #define APBC_REG(x)		(APBC_VIRT_BASE + (x))
37b501fd7bSArnd Bergmann 
38b501fd7bSArnd Bergmann #define MPMU_VIRT_BASE		(APB_VIRT_BASE + 0x50000)
39b501fd7bSArnd Bergmann #define MPMU_REG(x)		(MPMU_VIRT_BASE + (x))
40b501fd7bSArnd Bergmann 
41b501fd7bSArnd Bergmann #define CIU_VIRT_BASE		(AXI_VIRT_BASE + 0x82c00)
42b501fd7bSArnd Bergmann #define CIU_REG(x)		(CIU_VIRT_BASE + (x))
43b501fd7bSArnd Bergmann 
44b501fd7bSArnd Bergmann #endif /* __ASM_MACH_ADDR_MAP_H */
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