1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * arch/arm/mach-mediatek/platsmp.c 4 * 5 * Copyright (c) 2014 Mediatek Inc. 6 * Author: Shunli Wang <shunli.wang@mediatek.com> 7 * Yingjoe Chen <yingjoe.chen@mediatek.com> 8 */ 9 #include <linux/io.h> 10 #include <linux/memblock.h> 11 #include <linux/of.h> 12 #include <linux/of_address.h> 13 #include <linux/string.h> 14 #include <linux/threads.h> 15 16 #define MTK_MAX_CPU 8 17 #define MTK_SMP_REG_SIZE 0x1000 18 19 struct mtk_smp_boot_info { 20 unsigned long smp_base; 21 unsigned int jump_reg; 22 unsigned int core_keys[MTK_MAX_CPU - 1]; 23 unsigned int core_regs[MTK_MAX_CPU - 1]; 24 }; 25 26 static const struct mtk_smp_boot_info mtk_mt8135_tz_boot = { 27 0x80002000, 0x3fc, 28 { 0x534c4131, 0x4c415332, 0x41534c33 }, 29 { 0x3f8, 0x3f8, 0x3f8 }, 30 }; 31 32 static const struct mtk_smp_boot_info mtk_mt6589_boot = { 33 0x10002000, 0x34, 34 { 0x534c4131, 0x4c415332, 0x41534c33 }, 35 { 0x38, 0x3c, 0x40 }, 36 }; 37 38 static const struct mtk_smp_boot_info mtk_mt7623_boot = { 39 0x10202000, 0x34, 40 { 0x534c4131, 0x4c415332, 0x41534c33 }, 41 { 0x38, 0x3c, 0x40 }, 42 }; 43 44 static const struct of_device_id mtk_tz_smp_boot_infos[] __initconst = { 45 { .compatible = "mediatek,mt8135", .data = &mtk_mt8135_tz_boot }, 46 { .compatible = "mediatek,mt8127", .data = &mtk_mt8135_tz_boot }, 47 { .compatible = "mediatek,mt2701", .data = &mtk_mt8135_tz_boot }, 48 {}, 49 }; 50 51 static const struct of_device_id mtk_smp_boot_infos[] __initconst = { 52 { .compatible = "mediatek,mt6589", .data = &mtk_mt6589_boot }, 53 { .compatible = "mediatek,mt7623", .data = &mtk_mt7623_boot }, 54 { .compatible = "mediatek,mt7629", .data = &mtk_mt7623_boot }, 55 {}, 56 }; 57 58 static void __iomem *mtk_smp_base; 59 static const struct mtk_smp_boot_info *mtk_smp_info; 60 61 static int mtk_boot_secondary(unsigned int cpu, struct task_struct *idle) 62 { 63 if (!mtk_smp_base) 64 return -EINVAL; 65 66 if (!mtk_smp_info->core_keys[cpu-1]) 67 return -EINVAL; 68 69 writel_relaxed(mtk_smp_info->core_keys[cpu-1], 70 mtk_smp_base + mtk_smp_info->core_regs[cpu-1]); 71 72 arch_send_wakeup_ipi_mask(cpumask_of(cpu)); 73 74 return 0; 75 } 76 77 static void __init __mtk_smp_prepare_cpus(unsigned int max_cpus, int trustzone) 78 { 79 int i, num; 80 const struct of_device_id *infos; 81 82 if (trustzone) { 83 num = ARRAY_SIZE(mtk_tz_smp_boot_infos); 84 infos = mtk_tz_smp_boot_infos; 85 } else { 86 num = ARRAY_SIZE(mtk_smp_boot_infos); 87 infos = mtk_smp_boot_infos; 88 } 89 90 /* Find smp boot info for this SoC */ 91 for (i = 0; i < num; i++) { 92 if (of_machine_is_compatible(infos[i].compatible)) { 93 mtk_smp_info = infos[i].data; 94 break; 95 } 96 } 97 98 if (!mtk_smp_info) { 99 pr_err("%s: Device is not supported\n", __func__); 100 return; 101 } 102 103 if (trustzone) { 104 /* smp_base(trustzone-bootinfo) is reserved by device tree */ 105 mtk_smp_base = phys_to_virt(mtk_smp_info->smp_base); 106 } else { 107 mtk_smp_base = ioremap(mtk_smp_info->smp_base, MTK_SMP_REG_SIZE); 108 if (!mtk_smp_base) { 109 pr_err("%s: Can't remap %lx\n", __func__, 110 mtk_smp_info->smp_base); 111 return; 112 } 113 } 114 115 /* 116 * write the address of slave startup address into the system-wide 117 * jump register 118 */ 119 writel_relaxed(__pa_symbol(secondary_startup_arm), 120 mtk_smp_base + mtk_smp_info->jump_reg); 121 } 122 123 static void __init mtk_tz_smp_prepare_cpus(unsigned int max_cpus) 124 { 125 __mtk_smp_prepare_cpus(max_cpus, 1); 126 } 127 128 static void __init mtk_smp_prepare_cpus(unsigned int max_cpus) 129 { 130 __mtk_smp_prepare_cpus(max_cpus, 0); 131 } 132 133 static const struct smp_operations mt81xx_tz_smp_ops __initconst = { 134 .smp_prepare_cpus = mtk_tz_smp_prepare_cpus, 135 .smp_boot_secondary = mtk_boot_secondary, 136 }; 137 CPU_METHOD_OF_DECLARE(mt81xx_tz_smp, "mediatek,mt81xx-tz-smp", &mt81xx_tz_smp_ops); 138 139 static const struct smp_operations mt6589_smp_ops __initconst = { 140 .smp_prepare_cpus = mtk_smp_prepare_cpus, 141 .smp_boot_secondary = mtk_boot_secondary, 142 }; 143 CPU_METHOD_OF_DECLARE(mt6589_smp, "mediatek,mt6589-smp", &mt6589_smp_ops); 144